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@ -479,7 +479,7 @@ void phy::set_config_scell(asn1::rrc::scell_to_add_mod_r10_s* scell_config)
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scell_sync.at(m->radio_idx - 1)->set_scell_cell(cc_idx, &cell, earfcn);
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} else {
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// Change frequency only if the earfcn was modified
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if (common.scell_earfcn[cc_idx - 1] != earfcn) {
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if (common.scell_cfg[cc_idx].earfcn != earfcn) {
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float dl_freq = srslte_band_fd(earfcn) * 1e6f;
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float ul_freq = srslte_band_fu(srslte_band_ul_earfcn(earfcn)) * 1e6f;
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for (uint32_t p = 0; p < common.args->nof_rx_ant; p++) {
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@ -490,11 +490,10 @@ void phy::set_config_scell(asn1::rrc::scell_to_add_mod_r10_s* scell_config)
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}
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// Store SCell earfcn and pci
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common.scell_earfcn[cc_idx - 1] = earfcn;
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common.scell_pci[cc_idx - 1] = cell.id;
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// Set SCell as configured
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common.scell_configured[cc_idx] = true;
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common.scell_cfg[cc_idx].earfcn = earfcn;
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common.scell_cfg[cc_idx].pci = cell.id;
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common.scell_cfg[cc_idx].configured = true;
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common.scell_cfg[cc_idx].enabled = false;
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} else {
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log_h->console("Received SCell configuration for index %d but there are not enough CC workers available\n",
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scell_config->s_cell_idx_r10);
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