From f653472aa81a2df97f101e9553c9d377e11083b3 Mon Sep 17 00:00:00 2001 From: Xavier Arteaga Date: Fri, 19 Jul 2019 16:23:00 +0200 Subject: [PATCH] SRSUE: SCell parameters condensed in a single structure --- srsue/hdr/phy/phy_common.h | 14 ++++++++------ srsue/src/phy/cc_worker.cc | 4 ++-- srsue/src/phy/phy.cc | 11 +++++------ srsue/src/phy/phy_common.cc | 5 ++--- srsue/src/phy/sf_worker.cc | 10 +++++----- 5 files changed, 22 insertions(+), 22 deletions(-) diff --git a/srsue/hdr/phy/phy_common.h b/srsue/hdr/phy/phy_common.h index eb4c41302..89714ab29 100644 --- a/srsue/hdr/phy/phy_common.h +++ b/srsue/hdr/phy/phy_common.h @@ -78,13 +78,15 @@ public: uint32_t pcell_report_period; bool pcell_first_measurement; - // SCell EARFCN and PCI list - uint32_t scell_earfcn[SRSLTE_MAX_CARRIERS - 1] = {}; - uint32_t scell_pci[SRSLTE_MAX_CARRIERS - 1] = {}; + // SCell EARFCN, PCI, configured and enabled list + typedef struct { + uint32_t earfcn = 0; + uint32_t pci = 0; + bool configured = false; + bool enabled = false; + } scell_cfg_t; + scell_cfg_t scell_cfg[SRSLTE_MAX_CARRIERS]; - // SCell enable for Activation / Deactivation - bool scell_configured[SRSLTE_MAX_CARRIERS]; - bool scell_enable[SRSLTE_MAX_CARRIERS]; /* Entry index 0 is reserved, do NOT use it for PCell */ bool multiple_csi_request_enabled; /* True means cross scheduling enabled */ bool cif_enabled; /* True means cross scheduling enabled */ bool srs_request_enabled; diff --git a/srsue/src/phy/cc_worker.cc b/srsue/src/phy/cc_worker.cc index 7c1e02073..36c94052b 100644 --- a/srsue/src/phy/cc_worker.cc +++ b/srsue/src/phy/cc_worker.cc @@ -694,7 +694,7 @@ bool cc_worker::work_ul(srslte_uci_data_t* uci_data) set_uci_aperiodic_cqi(uci_data); } else { /* Check PCell and enabled secondary cells */ - if (cc_idx == 0 || phy->scell_enable[cc_idx]) { + if (cc_idx == 0 || phy->scell_cfg[cc_idx].enabled) { set_uci_periodic_cqi(uci_data); } } @@ -918,7 +918,7 @@ void cc_worker::set_uci_ack(srslte_uci_data_t* uci_data, // Only PCell generates ACK for all SCell for (uint32_t cc_idx = 0; cc_idx < phy->args->nof_carriers; cc_idx++) { - if (cc_idx == 0 || phy->scell_configured[cc_idx]) { + if (cc_idx == 0 || phy->scell_cfg[cc_idx].configured) { phy->get_dl_pending_ack(&sf_cfg_ul, cc_idx, &ack_info.cc[cc_idx]); nof_configured_carriers++; } diff --git a/srsue/src/phy/phy.cc b/srsue/src/phy/phy.cc index 65f08e2dc..5558d1257 100644 --- a/srsue/src/phy/phy.cc +++ b/srsue/src/phy/phy.cc @@ -479,7 +479,7 @@ void phy::set_config_scell(asn1::rrc::scell_to_add_mod_r10_s* scell_config) scell_sync.at(m->radio_idx - 1)->set_scell_cell(cc_idx, &cell, earfcn); } else { // Change frequency only if the earfcn was modified - if (common.scell_earfcn[cc_idx - 1] != earfcn) { + if (common.scell_cfg[cc_idx].earfcn != earfcn) { float dl_freq = srslte_band_fd(earfcn) * 1e6f; float ul_freq = srslte_band_fu(srslte_band_ul_earfcn(earfcn)) * 1e6f; for (uint32_t p = 0; p < common.args->nof_rx_ant; p++) { @@ -490,11 +490,10 @@ void phy::set_config_scell(asn1::rrc::scell_to_add_mod_r10_s* scell_config) } // Store SCell earfcn and pci - common.scell_earfcn[cc_idx - 1] = earfcn; - common.scell_pci[cc_idx - 1] = cell.id; - - // Set SCell as configured - common.scell_configured[cc_idx] = true; + common.scell_cfg[cc_idx].earfcn = earfcn; + common.scell_cfg[cc_idx].pci = cell.id; + common.scell_cfg[cc_idx].configured = true; + common.scell_cfg[cc_idx].enabled = false; } else { log_h->console("Received SCell configuration for index %d but there are not enough CC workers available\n", scell_config->s_cell_idx_r10); diff --git a/srsue/src/phy/phy_common.cc b/srsue/src/phy/phy_common.cc index 7d469903a..f7eac17ed 100644 --- a/srsue/src/phy/phy_common.cc +++ b/srsue/src/phy/phy_common.cc @@ -706,6 +706,7 @@ void phy_common::reset() ZERO_OBJECT(avg_snr_db_cqi); ZERO_OBJECT(avg_rsrp); ZERO_OBJECT(avg_rsrp_dbm); + ZERO_OBJECT(scell_cfg); avg_rsrq_db = 0; pcell_report_period = 20; @@ -714,8 +715,6 @@ void phy_common::reset() is_first_of_burst[i] = true; } - ZERO_OBJECT(scell_configured); - ZERO_OBJECT(scell_enable); multiple_csi_request_enabled = false; cif_enabled = false; srs_request_enabled = false; @@ -897,7 +896,7 @@ bool phy_common::is_mbsfn_sf(srslte_mbsfn_cfg_t* cfg, uint32_t phy_tti) void phy_common::enable_scell(uint32_t cc_idx, bool enable) { if (cc_idx < SRSLTE_MAX_CARRIERS) { - scell_enable[cc_idx] = enable; + scell_cfg[cc_idx].enabled = enable; } } diff --git a/srsue/src/phy/sf_worker.cc b/srsue/src/phy/sf_worker.cc index 7ab0e1df7..80b437297 100644 --- a/srsue/src/phy/sf_worker.cc +++ b/srsue/src/phy/sf_worker.cc @@ -228,7 +228,7 @@ void sf_worker::work_imp() if (carrier_idx == 0 && phy->is_mbsfn_sf(&mbsfn_cfg, tti)) { cc_workers[0]->work_dl_mbsfn(mbsfn_cfg); // Don't do chest_ok in mbsfn since it trigger measurements } else { - if ((carrier_idx == 0) || phy->scell_enable[carrier_idx]) { + if ((carrier_idx == 0) || phy->scell_cfg[carrier_idx].enabled) { rx_signal_ok = cc_workers[carrier_idx]->work_dl_regular(); } } @@ -348,13 +348,13 @@ void sf_worker::update_measurements() // Send report for PCell phy->stack->new_phy_meas(phy->avg_rsrp_dbm[0], phy->avg_rsrq_db, tti); } else { - // Send report for SCell (if it they are enabled) - if (phy->scell_enable[cc_idx]) { + // Send report for SCell (if enabled) + if (phy->scell_cfg[cc_idx].enabled) { phy->stack->new_phy_meas(phy->avg_rsrp_dbm[cc_idx], phy->avg_rsrq_db, tti, - phy->scell_earfcn[cc_idx - 1], - phy->scell_pci[cc_idx - 1]); + phy->scell_cfg[cc_idx].earfcn, + phy->scell_cfg[cc_idx].pci); } } }