233 Commits (2baccc8b13ae851038fef278fc35624cdc7ad349)

Author SHA1 Message Date
Xavier Arteaga 2baccc8b13 Set NR-PDSCH default table to 256QAM 4 years ago
Xavier Arteaga 3ee667c4a5 SRSUE: added NR-PDSCH constellation in GUI 4 years ago
Xavier Arteaga 59114206ae SRSUE: Unify PRACH reconfiguration conditions 4 years ago
Ismael Gomez a6423442c2
Refactor NR RA files and fix header includes all over library (#2162)
* Refactor NR resource allocation classes. Use DCI instead of grant for dummy PDSCH UE/eNB test

* Minor refactors in NR workers and ue_dl

* Fix include issues

* fix compilation issues
4 years ago
Xavier Arteaga b3200d9ef5 Renaming common UL/DL DMRS related types and initial NR PUSCH implementation 4 years ago
Xavier Arteaga 909e5de34f Fix NR workers 4 years ago
David Rupprecht 62b558fccf Move rat type to common header
Removed phy measurement from rrc interface phy

Updated rrc interface for handling measurements
4 years ago
Xavier Arteaga d5d3594f49 Removed unused attribute 4 years ago
Xavier Arteaga f9643843a0 SRSENB/UE Fixed NR workers 4 years ago
Xavier Arteaga ac930003be SRSUE: Integrated NR workers 4 years ago
Xavier Arteaga a908fb6c5b Fix NR srsue/srsenb. Initial PHY NR in SRSENB. 4 years ago
Xavier Arteaga 2b2db90933 SRSUE: initial NR workers 4 years ago
Xavier Arteaga eed9405e40 Moved NR MAX MIMO layers to carrier 4 years ago
Xavier Arteaga c6798653be SRSUE: created initial PHY LTE worker pool 4 years ago
Andre Puschmann 07d2bc4fe8 change license header to agnostic version with hint to root LICENSE file 4 years ago
Xavier Arteaga 53d8319d2b SRSUE: protect secondary serving cell synch from concurrent access 4 years ago
Xavier Arteaga 287e651ef1 SRSUE: Protect nullptr buffer in secondary serving cell synch 4 years ago
Xavier Arteaga 959f37ae81 SRSUE: Renamed PHY scell_state to cell_state 4 years ago
Xavier Arteaga 4b8cd7ce92 SRSUE: protect scell state 4 years ago
Xavier Arteaga c5cb4d9984 SRSUE: Added time accurate SCell activation 4 years ago
Xavier Arteaga f64c268a69 SRSUE: Refactored MAC/RRC SCell Activation/Deactivation 4 years ago
Xavier Arteaga 32ea840a30 INTRA: better ring-buffer protection 4 years ago
Xavier Arteaga 369cffec00 More deterministic SCell search test 4 years ago
Ismael Gomez c75c463263
Use SNR instead of SINR for RLF threshold (#1769)
* Use SNR instead of SINR for RLF threshold

* Send in/out-sync only for cc_idx=0
4 years ago
Ismael Gomez b94d24ed98
Take into account CRS from neigbhour cells when measuring interference (#1757)
* Take into account CRS from neigbhour cells when measuring interference

* fix std::isnormal compilation

* Fixed compilation of test

* Address comments

* Remove unused overrides
4 years ago
Andre Puschmann 1afc137032
[REBASE] Make PHY non-blocking and fefactor HO procedure (#1753)
* Make PHY non-blocking and fefactor HO procedure

* makes entire PHY non-blocking through command interface
* adds dedicated queue for cell_search/cell_select commands
* refactor HO procedure to run faster, in one stack cycle. Looks closer to the specs
* force ue to always apply SIB2 configuration during reestablishment
* Run update_measurements in all workers

Co-authored-by: Ismael Gomez <ismagom@gmail.com>
4 years ago
Ismael Gomez 5968157ea5
Protect better the access to shared variables in phy_common and metrics (#1750) 4 years ago
faluco 5acc1c9a73 - Cleaned up style in the PRACH class:
* Removed magic numbers.
* Reduced indentation of statements with early exists.
* Removed elses after a return statement.
* Trimmed unnecessary include files.
* Default initialized members in the class.
4 years ago
faluco 79f5b62551 - Calculate PRACH buffers on the fly when required instead of pregenerating all of them. 4 years ago
faluco 5e8a4c898d
Bring back the circular array object. (#1712) 4 years ago
Xavier Arteaga 52355024e7 SRSUE PHY: move mutex lock to cc worker and unlock for stack calls 4 years ago
Andre Puschmann 1199a79851 fix Scell sync for large cells
the PSS detection needs more temporary buffer than a full subframe.
we therefore need to allocate and initialize the sync object with
larger maximum size to support Scell search of large cells, e.g.
20 MHz

this fixes issue #1538
5 years ago
Xavier Arteaga 0192130742 SRSUE/SRSENB: UCI bits are carrier by the lowest serving cell index
SRSENB: Fix UCI in lowest serving cell index PUSCH transmission
5 years ago
Andre Puschmann d16897c09a scell_sync: fix missing dtor freeing sync object 5 years ago
Xavier Arteaga f8cc2d176d Fix typo 5 years ago
Xavier Arteaga 2f0c38fc70 SRSUE: avoid deadlock while configuring cell from stack 5 years ago
Xavier Arteaga 0e415260e9 SRSUE: scell_sync vector changed to map 5 years ago
Xavier Arteaga e0e8405285 SRSUE: initial scell sync
SRSUE: SCell Synch feedbacks delay

SRSUE: Implemented SCell Radio offset correction
5 years ago
Xavier Arteaga f04cf2090a Integrates number of samples in radio buffer
Fix minor issue

Radio: Fix minor bug and add unit test
5 years ago
Xavier Arteaga 89b24b54e5 Refactored radio class for acommodating multiple RF devices 5 years ago
Francisco Paisana 0d38c33a60 rename ue phy nr class 5 years ago
Francisco Paisana 27e5d98ef9 added vnf phy nr 5 years ago
Xavier Arteaga ac0e347d94 SRSUE: refactored sync.cc and clean up 5 years ago
Xavier Arteaga dc927b745a SRSUE Removed async_scell_recv.h 5 years ago
faluco 7ff251f112 - Fixed warnings caught by Clang 9.0.0 5 years ago
Francisco Paisana 12b2ea7dde remove warnings for base classes with no virtual dtors 5 years ago
Andre Puschmann 1e0c8ead4c srsue,sync: fix TTI gap calculation and reporting
The current TTI gap calculation assumes strict continuity
of radio time stamps, even when retuning, changing sample rate, etc.

This is certainly desireble but not necessaritly the case and may cause
issues when negative time gaps or too large gaps are detected and reported
to the stack.

this patch makes the assumption that valid TTI jumps are between 1ms
and 1s and that larger gaps are the result of screwed time-stamps
or too long radio operations.
5 years ago
Xavier Arteaga 58803d1b3e Added UL EARFCN map and UE PHY interface cleanup 5 years ago
Xavier Arteaga 11a2d2cc4a Fix and tidy up time offset in srsue 5 years ago
Xavier Arteaga 198684ce32 SRSUE: all TA control logic into a single class and faster TA response 5 years ago