gnb,rrc: replace hard-coded PCI with actual value in rrc_cfg

srsenb/hdr/stack/rrc/rrc_nr.h

@@ -144,6 +144,7 @@ public:
   };
 
 private:
+  static constexpr uint32_t UE_PSCELL_CC_IDX = 0; // first NR cell is always Primary Secondary Cell for UE
   rrc_nr_cfg_t cfg = {};
 
   // interfaces

srsenb/src/stack/rrc/rrc_nr.cc

@@ -500,6 +500,8 @@ void rrc_nr::ue::send_dl_ccch(dl_ccch_msg_s* dl_ccch_msg)
 // Helper for the RRC Reconfiguration sender to pack hard-coded config
 int rrc_nr::ue::pack_secondary_cell_group_config_common(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack)
 {
+  auto& pscell_cfg          = parent->cfg.cell_list.at(UE_PSCELL_CC_IDX);
+
   // RLC for DRB1 (with fixed LCID)
   cell_group_cfg_pack.rlc_bearer_to_add_mod_list_present = true;
   cell_group_cfg_pack.rlc_bearer_to_add_mod_list.resize(1);
@@ -845,7 +847,7 @@ int rrc_nr::ue::pack_secondary_cell_group_config_common(asn1::rrc_nr::cell_group
   cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.dmrs_type_a_position =
       asn1::rrc_nr::serving_cell_cfg_common_s::dmrs_type_a_position_opts::pos2;
   cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.pci_present                    = true;
-  cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.pci                            = 500;
+  cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.pci = pscell_cfg.phy_cell.carrier.pci;
   cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.ssb_subcarrier_spacing_present = true;
   cell_group_cfg_pack.sp_cell_cfg.recfg_with_sync.sp_cell_cfg_common.ssb_subcarrier_spacing =
       subcarrier_spacing_opts::khz30;