Minor NR configuration fixes

master
Xavier Arteaga 3 years ago committed by Andre Puschmann
parent a31a40184d
commit f250c83a66

@ -1498,7 +1498,7 @@ int set_derived_args_nr(all_args_t* args_, rrc_nr_cfg_t* rrc_cfg_, phy_cfg_t* ph
cfg.phy_cell.prach.is_nr = true; cfg.phy_cell.prach.is_nr = true;
cfg.phy_cell.prach.config_idx = 0; cfg.phy_cell.prach.config_idx = 0;
cfg.phy_cell.prach.root_seq_idx = 0; cfg.phy_cell.prach.root_seq_idx = 0;
cfg.phy_cell.prach.freq_offset = phy_cfg_->prach_cnfg.prach_cfg_info.prach_freq_offset; cfg.phy_cell.prach.freq_offset = 1;
cfg.phy_cell.prach.num_ra_preambles = cfg.phy_cell.num_ra_preambles; cfg.phy_cell.prach.num_ra_preambles = cfg.phy_cell.num_ra_preambles;
cfg.phy_cell.prach.hs_flag = phy_cfg_->prach_cnfg.prach_cfg_info.high_speed_flag; cfg.phy_cell.prach.hs_flag = phy_cfg_->prach_cnfg.prach_cfg_info.high_speed_flag;
cfg.phy_cell.prach.tdd_config.configured = (cfg.duplex_mode == SRSRAN_DUPLEX_MODE_TDD); cfg.phy_cell.prach.tdd_config.configured = (cfg.duplex_mode == SRSRAN_DUPLEX_MODE_TDD);

@ -240,6 +240,7 @@ int fill_serv_cell_common_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, ser
serv_common.ss_pbch_block_pwr = 0; serv_common.ss_pbch_block_pwr = 0;
serv_common.n_timing_advance_offset_present = true; serv_common.n_timing_advance_offset_present = true;
serv_common.n_timing_advance_offset = asn1::rrc_nr::serving_cell_cfg_common_s::n_timing_advance_offset_opts::n0; serv_common.n_timing_advance_offset = asn1::rrc_nr::serving_cell_cfg_common_s::n_timing_advance_offset_opts::n0;
serv_common.n_timing_advance_offset_present = true;
serv_common.dmrs_type_a_position = asn1::rrc_nr::serving_cell_cfg_common_s::dmrs_type_a_position_opts::pos2; serv_common.dmrs_type_a_position = asn1::rrc_nr::serving_cell_cfg_common_s::dmrs_type_a_position_opts::pos2;
serv_common.pci_present = true; serv_common.pci_present = true;

@ -1143,7 +1143,7 @@ int rrc_nr::ue::pack_recfg_with_sync_sp_cell_cfg_common_ul_cfg_common_init_ul_bw
rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true; rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one(); rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one();
rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb.one() = rach_cfg_common_pack.setup().ssb_per_rach_occasion_and_cb_preambs_per_ssb.one() =
asn1::rrc_nr::rach_cfg_common_s::ssb_per_rach_occasion_and_cb_preambs_per_ssb_c_::one_opts::n8; asn1::rrc_nr::rach_cfg_common_s::ssb_per_rach_occasion_and_cb_preambs_per_ssb_c_::one_opts::n64;
return SRSRAN_SUCCESS; return SRSRAN_SUCCESS;
} }

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