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@ -150,9 +150,9 @@ void mac_nr::rach_detected(const rach_info_t& rach_info)
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srsenb::sched_nr_interface::dl_sched_rar_info_t rar_info = {};
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srsenb::sched_nr_interface::dl_sched_rar_info_t rar_info = {};
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rar_info.preamble_idx = rach_info.preamble;
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rar_info.preamble_idx = rach_info.preamble;
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rar_info.temp_crnti = rnti;
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rar_info.temp_crnti = rnti;
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rar_info.prach_slot = slot_point(0, rach_info.slot_index);
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rar_info.prach_slot = slot_point{NUMEROLOGY_IDX, rach_info.slot_index};
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// TODO: fill remaining fields as required
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// TODO: fill remaining fields as required
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sched.dl_rach_info(enb_cc_idx, rar_info);
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// sched.dl_rach_info(enb_cc_idx, rar_info);
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logger.info("RACH: slot=%d, cc=%d, preamble=%d, offset=%d, temp_crnti=0x%x",
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logger.info("RACH: slot=%d, cc=%d, preamble=%d, offset=%d, temp_crnti=0x%x",
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rach_info.slot_index,
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rach_info.slot_index,
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@ -272,15 +272,7 @@ int mac_nr::get_dl_sched(const srsran_slot_cfg_t& slot_cfg, dl_sched_t& dl_sched
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pdsch_slot++;
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pdsch_slot++;
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}
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}
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int ret = sched.get_dl_sched(pdsch_slot, 0, dl_sched);
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return sched.get_dl_sched(pdsch_slot, 0, dl_sched);
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for (pdsch_t& pdsch : dl_sched.pdsch) {
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// Set TBS
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// Select grant and set data
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pdsch.data[0] = nullptr; // FIXME: add ptr to PDU
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pdsch.data[1] = nullptr;
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}
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return SRSRAN_SUCCESS;
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}
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}
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int mac_nr::get_ul_sched(const srsran_slot_cfg_t& slot_cfg, ul_sched_t& ul_sched)
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int mac_nr::get_ul_sched(const srsran_slot_cfg_t& slot_cfg, ul_sched_t& ul_sched)
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@ -299,17 +291,40 @@ int mac_nr::get_ul_sched(const srsran_slot_cfg_t& slot_cfg, ul_sched_t& ul_sched
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return SRSRAN_SUCCESS;
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return SRSRAN_SUCCESS;
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}
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}
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int mac_nr::pucch_info(const srsran_slot_cfg_t& slot_cfg, const mac_interface_phy_nr::pucch_info_t& pucch_info)
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int mac_nr::pucch_info(const srsran_slot_cfg_t& slot_cfg, const mac_interface_phy_nr::pucch_info_t& pucch_info)
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{
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{
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// FIXME: provide CRC/ACK feedback
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if (not handle_uci_data(pucch_info.uci_data.cfg.pucch.rnti, pucch_info.uci_data.cfg, pucch_info.uci_data.value)) {
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// sched.dl_ack_info(rnti_, cc, pid, tb_idx, ack);
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logger.error("Error handling UCI data from PUCCH reception");
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// sched.ul_crc_info(rnti_, cc, pid, crc);
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return SRSRAN_ERROR;
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}
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return SRSRAN_SUCCESS;
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return SRSRAN_SUCCESS;
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}
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}
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bool mac_nr::handle_uci_data(const uint16_t rnti, const srsran_uci_cfg_nr_t& cfg, const srsran_uci_value_nr_t& value)
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{
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// Process HARQ-ACK
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for (uint32_t i = 0; i < cfg.ack.count; i++) {
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const srsran_harq_ack_bit_t* ack_bit = &cfg.ack.bits[i];
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bool is_ok = (value.ack[i] == 1) and value.valid;
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sched.dl_ack_info(rnti, 0, ack_bit->pid, 0, is_ok);
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}
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return true;
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}
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int mac_nr::pusch_info(const srsran_slot_cfg_t& slot_cfg, const mac_interface_phy_nr::pusch_info_t& pusch_info)
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int mac_nr::pusch_info(const srsran_slot_cfg_t& slot_cfg, const mac_interface_phy_nr::pusch_info_t& pusch_info)
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{
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{
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// FIXME: does the PUSCH info call include received PDUs?
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uint16_t rnti = pusch_info.rnti;
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uint16_t rnti = pusch_info.rnti;
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// Handle UCI data
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if (not handle_uci_data(rnti, pusch_info.uci_cfg, pusch_info.pusch_data.uci)) {
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logger.error("Error handling UCI data from PUCCH reception");
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return SRSRAN_ERROR;
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}
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sched.ul_crc_info(rnti, 0, pusch_info.pid, pusch_info.pusch_data.tb[0].crc);
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// FIXME: move PDU from PHY
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srsran::unique_byte_buffer_t rx_pdu;
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srsran::unique_byte_buffer_t rx_pdu;
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auto process_pdu_task = [this, rnti](srsran::unique_byte_buffer_t& pdu) {
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auto process_pdu_task = [this, rnti](srsran::unique_byte_buffer_t& pdu) {
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srsran::rwlock_read_guard lock(rwlock);
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srsran::rwlock_read_guard lock(rwlock);
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