Batch of LGTM fixes.

master
faluco 3 years ago committed by Ismael Gomez
parent 529e2bdf55
commit edf0926a2f

@ -332,7 +332,7 @@ int main(int argc, char** argv)
// PSCCH Channel estimation // PSCCH Channel estimation
srsran_chest_sl_cfg_t pscch_chest_sl_cfg = {}; srsran_chest_sl_cfg_t pscch_chest_sl_cfg = {};
srsran_chest_sl_t pscch_chest = {}; srsran_chest_sl_t pscch_chest = {};
if (srsran_chest_sl_init(&pscch_chest, SRSRAN_SIDELINK_PSCCH, cell_sl, sl_comm_resource_pool) != SRSRAN_SUCCESS) { if (srsran_chest_sl_init(&pscch_chest, SRSRAN_SIDELINK_PSCCH, cell_sl, &sl_comm_resource_pool) != SRSRAN_SUCCESS) {
ERROR("Error in chest PSCCH init"); ERROR("Error in chest PSCCH init");
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
@ -344,7 +344,7 @@ int main(int argc, char** argv)
srsran_chest_sl_cfg_t pssch_chest_sl_cfg = {}; srsran_chest_sl_cfg_t pssch_chest_sl_cfg = {};
srsran_chest_sl_t pssch_chest = {}; srsran_chest_sl_t pssch_chest = {};
if (srsran_chest_sl_init(&pssch_chest, SRSRAN_SIDELINK_PSSCH, cell_sl, sl_comm_resource_pool) != SRSRAN_SUCCESS) { if (srsran_chest_sl_init(&pssch_chest, SRSRAN_SIDELINK_PSSCH, cell_sl, &sl_comm_resource_pool) != SRSRAN_SUCCESS) {
ERROR("Error in chest PSSCH init"); ERROR("Error in chest PSSCH init");
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }

@ -79,14 +79,14 @@ public:
class pdcp_interface_rrc_nr class pdcp_interface_rrc_nr
{ {
public: public:
virtual void reset(uint16_t rnti) = 0; virtual void reset(uint16_t rnti) = 0;
virtual void add_user(uint16_t rnti) = 0; virtual void add_user(uint16_t rnti) = 0;
virtual void rem_user(uint16_t rnti) = 0; virtual void rem_user(uint16_t rnti) = 0;
virtual void write_sdu(uint16_t rnti, uint32_t lcid, srsran::unique_byte_buffer_t sdu) = 0; virtual void write_sdu(uint16_t rnti, uint32_t lcid, srsran::unique_byte_buffer_t sdu) = 0;
virtual void add_bearer(uint16_t rnti, uint32_t lcid, srsran::pdcp_config_t cnfg) = 0; virtual void add_bearer(uint16_t rnti, uint32_t lcid, srsran::pdcp_config_t cnfg) = 0;
virtual void config_security(uint16_t rnti, uint32_t lcid, srsran::as_security_config_t sec_cfg) = 0; virtual void config_security(uint16_t rnti, uint32_t lcid, const srsran::as_security_config_t& sec_cfg) = 0;
virtual void enable_integrity(uint16_t rnti, uint32_t lcid) = 0; virtual void enable_integrity(uint16_t rnti, uint32_t lcid) = 0;
virtual void enable_encryption(uint16_t rnti, uint32_t lcid) = 0; virtual void enable_encryption(uint16_t rnti, uint32_t lcid) = 0;
}; };
class pdcp_interface_sdap_nr class pdcp_interface_sdap_nr

@ -76,10 +76,10 @@ typedef struct SRSRAN_API {
} srsran_chest_sl_t; } srsran_chest_sl_t;
SRSRAN_API int srsran_chest_sl_init(srsran_chest_sl_t* q, SRSRAN_API int srsran_chest_sl_init(srsran_chest_sl_t* q,
srsran_sl_channels_t channel, srsran_sl_channels_t channel,
srsran_cell_sl_t cell, srsran_cell_sl_t cell,
srsran_sl_comm_resource_pool_t sl_comm_resource_pool); const srsran_sl_comm_resource_pool_t* sl_comm_resource_pool);
SRSRAN_API int srsran_chest_sl_set_cell(srsran_chest_sl_t* q, srsran_cell_sl_t cell); SRSRAN_API int srsran_chest_sl_set_cell(srsran_chest_sl_t* q, srsran_cell_sl_t cell);

@ -5025,7 +5025,6 @@ LIBLTE_ERROR_ENUM liblte_mme_pack_attach_request_msg(LIBLTE_MME_ATTACH_REQUEST_M
if (attach_req->ms_cm3_present) { if (attach_req->ms_cm3_present) {
*msg_ptr = LIBLTE_MME_MS_CLASSMARK_3_IEI; *msg_ptr = LIBLTE_MME_MS_CLASSMARK_3_IEI;
msg_ptr++; msg_ptr++;
liblte_mme_pack_mobile_station_classmark_3_ie(&attach_req->ms_cm3, &msg_ptr);
} }
// Supported Codecs // Supported Codecs
@ -5217,7 +5216,6 @@ LIBLTE_ERROR_ENUM liblte_mme_unpack_attach_request_msg(LIBLTE_BYTE_MSG_STRUCT*
// Mobile Station Classmark 3 // Mobile Station Classmark 3
if (LIBLTE_MME_MS_CLASSMARK_3_IEI == *msg_ptr) { if (LIBLTE_MME_MS_CLASSMARK_3_IEI == *msg_ptr) {
msg_ptr++; msg_ptr++;
liblte_mme_unpack_mobile_station_classmark_3_ie(&msg_ptr, &attach_req->ms_cm3);
attach_req->ms_cm3_present = true; attach_req->ms_cm3_present = true;
} else { } else {
attach_req->ms_cm3_present = false; attach_req->ms_cm3_present = false;

@ -28,7 +28,7 @@
#define ROT(a, k) (((a) << k) | ((a) >> (32 - k))) #define ROT(a, k) (((a) << k) | ((a) >> (32 - k)))
/* the s-boxes */ /* the s-boxes */
u8 S0[256] = { static const u8 S0[256] = {
0x3e, 0x72, 0x5b, 0x47, 0xca, 0xe0, 0x00, 0x33, 0x04, 0xd1, 0x54, 0x98, 0x09, 0xb9, 0x6d, 0xcb, 0x7b, 0x1b, 0xf9, 0x3e, 0x72, 0x5b, 0x47, 0xca, 0xe0, 0x00, 0x33, 0x04, 0xd1, 0x54, 0x98, 0x09, 0xb9, 0x6d, 0xcb, 0x7b, 0x1b, 0xf9,
0x32, 0xaf, 0x9d, 0x6a, 0xa5, 0xb8, 0x2d, 0xfc, 0x1d, 0x08, 0x53, 0x03, 0x90, 0x4d, 0x4e, 0x84, 0x99, 0xe4, 0xce, 0x32, 0xaf, 0x9d, 0x6a, 0xa5, 0xb8, 0x2d, 0xfc, 0x1d, 0x08, 0x53, 0x03, 0x90, 0x4d, 0x4e, 0x84, 0x99, 0xe4, 0xce,
0xd9, 0x91, 0xdd, 0xb6, 0x85, 0x48, 0x8b, 0x29, 0x6e, 0xac, 0xcd, 0xc1, 0xf8, 0x1e, 0x73, 0x43, 0x69, 0xc6, 0xb5, 0xd9, 0x91, 0xdd, 0xb6, 0x85, 0x48, 0x8b, 0x29, 0x6e, 0xac, 0xcd, 0xc1, 0xf8, 0x1e, 0x73, 0x43, 0x69, 0xc6, 0xb5,
@ -44,7 +44,7 @@ u8 S0[256] = {
0x25, 0x05, 0x3f, 0x0c, 0x30, 0xea, 0x70, 0xb7, 0xa1, 0xe8, 0xa9, 0x65, 0x8d, 0x27, 0x1a, 0xdb, 0x81, 0xb3, 0xa0, 0x25, 0x05, 0x3f, 0x0c, 0x30, 0xea, 0x70, 0xb7, 0xa1, 0xe8, 0xa9, 0x65, 0x8d, 0x27, 0x1a, 0xdb, 0x81, 0xb3, 0xa0,
0xf4, 0x45, 0x7a, 0x19, 0xdf, 0xee, 0x78, 0x34, 0x60}; 0xf4, 0x45, 0x7a, 0x19, 0xdf, 0xee, 0x78, 0x34, 0x60};
u8 S1[256] = { static const u8 S1[256] = {
0x55, 0xc2, 0x63, 0x71, 0x3b, 0xc8, 0x47, 0x86, 0x9f, 0x3c, 0xda, 0x5b, 0x29, 0xaa, 0xfd, 0x77, 0x8c, 0xc5, 0x94, 0x55, 0xc2, 0x63, 0x71, 0x3b, 0xc8, 0x47, 0x86, 0x9f, 0x3c, 0xda, 0x5b, 0x29, 0xaa, 0xfd, 0x77, 0x8c, 0xc5, 0x94,
0x0c, 0xa6, 0x1a, 0x13, 0x00, 0xe3, 0xa8, 0x16, 0x72, 0x40, 0xf9, 0xf8, 0x42, 0x44, 0x26, 0x68, 0x96, 0x81, 0xd9, 0x0c, 0xa6, 0x1a, 0x13, 0x00, 0xe3, 0xa8, 0x16, 0x72, 0x40, 0xf9, 0xf8, 0x42, 0x44, 0x26, 0x68, 0x96, 0x81, 0xd9,
0x45, 0x3e, 0x10, 0x76, 0xc6, 0xa7, 0x8b, 0x39, 0x43, 0xe1, 0x3a, 0xb5, 0x56, 0x2a, 0xc0, 0x6d, 0xb3, 0x05, 0x22, 0x45, 0x3e, 0x10, 0x76, 0xc6, 0xa7, 0x8b, 0x39, 0x43, 0xe1, 0x3a, 0xb5, 0x56, 0x2a, 0xc0, 0x6d, 0xb3, 0x05, 0x22,
@ -61,22 +61,22 @@ u8 S1[256] = {
0xd7, 0xb0, 0x25, 0xac, 0xaf, 0x12, 0x03, 0xe2, 0xf2}; 0xd7, 0xb0, 0x25, 0xac, 0xaf, 0x12, 0x03, 0xe2, 0xf2};
/* the constants D */ /* the constants D */
u32 EK_d[16] = {0x44D7, static const u32 EK_d[16] = {0x44D7,
0x26BC, 0x26BC,
0x626B, 0x626B,
0x135E, 0x135E,
0x5789, 0x5789,
0x35E2, 0x35E2,
0x7135, 0x7135,
0x09AF, 0x09AF,
0x4D78, 0x4D78,
0x2F13, 0x2F13,
0x6BC4, 0x6BC4,
0x1AF1, 0x1AF1,
0x5E26, 0x5E26,
0x3C4D, 0x3C4D,
0x789A, 0x789A,
0x47AC}; 0x47AC};
/* ——————————————————————- */ /* ——————————————————————- */
/* c = a + b mod (2^31 1) */ /* c = a + b mod (2^31 1) */

@ -935,10 +935,10 @@ float srsran_chest_sl_estimate_noise(srsran_chest_sl_t* q)
return q->noise_estimated; return q->noise_estimated;
} }
int srsran_chest_sl_init(srsran_chest_sl_t* q, int srsran_chest_sl_init(srsran_chest_sl_t* q,
srsran_sl_channels_t channel, srsran_sl_channels_t channel,
srsran_cell_sl_t cell, srsran_cell_sl_t cell,
srsran_sl_comm_resource_pool_t sl_comm_resource_pool) const srsran_sl_comm_resource_pool_t* sl_comm_resource_pool)
{ {
int ret = SRSRAN_ERROR_INVALID_INPUTS; int ret = SRSRAN_ERROR_INVALID_INPUTS;
if (q != NULL) { if (q != NULL) {
@ -946,7 +946,7 @@ int srsran_chest_sl_init(srsran_chest_sl_t* q,
q->channel = channel; q->channel = channel;
q->cell = cell; q->cell = cell;
q->sl_comm_resource_pool = sl_comm_resource_pool; q->sl_comm_resource_pool = *sl_comm_resource_pool;
switch (channel) { switch (channel) {
case SRSRAN_SIDELINK_PSBCH: case SRSRAN_SIDELINK_PSBCH:

@ -27,54 +27,56 @@
#include "srsran/phy/utils/vector.h" #include "srsran/phy/utils/vector.h"
// n_dmrs_2 table 5.5.2.1.1-1 from 36.211 // n_dmrs_2 table 5.5.2.1.1-1 from 36.211
uint32_t n_dmrs_2[8] = {0, 6, 3, 4, 2, 8, 10, 9}; static const uint32_t n_dmrs_2[8] = {0, 6, 3, 4, 2, 8, 10, 9};
// n_dmrs_1 table 5.5.2.1.1-2 from 36.211 // n_dmrs_1 table 5.5.2.1.1-2 from 36.211
uint32_t n_dmrs_1[8] = {0, 2, 3, 4, 6, 8, 9, 10}; static const uint32_t n_dmrs_1[8] = {0, 2, 3, 4, 6, 8, 9, 10};
/* Orthogonal sequences for PUCCH formats 1a, 1b and 1c. Table 5.5.2.2.1-2 /* Orthogonal sequences for PUCCH formats 1a, 1b and 1c. Table 5.5.2.2.1-2
*/ */
float w_arg_pucch_format1_cpnorm[3][3] = {{0, 0, 0}, {0, 2 * M_PI / 3, 4 * M_PI / 3}, {0, 4 * M_PI / 3, 2 * M_PI / 3}}; static const float w_arg_pucch_format1_cpnorm[3][3] = {{0, 0, 0},
{0, 2 * M_PI / 3, 4 * M_PI / 3},
{0, 4 * M_PI / 3, 2 * M_PI / 3}};
float w_arg_pucch_format1_cpext[3][2] = {{0, 0}, {0, M_PI}, {0, 0}}; static const float w_arg_pucch_format1_cpext[3][2] = {{0, 0}, {0, M_PI}, {0, 0}};
float w_arg_pucch_format2_cpnorm[2] = {0, 0}; static const float w_arg_pucch_format2_cpnorm[2] = {0, 0};
float w_arg_pucch_format2_cpext[1] = {0}; static const float w_arg_pucch_format2_cpext[1] = {0};
uint32_t pucch_dmrs_symbol_format1_cpnorm[3] = {2, 3, 4}; static const uint32_t pucch_dmrs_symbol_format1_cpnorm[3] = {2, 3, 4};
uint32_t pucch_dmrs_symbol_format1_cpext[2] = {2, 3}; static const uint32_t pucch_dmrs_symbol_format1_cpext[2] = {2, 3};
uint32_t pucch_dmrs_symbol_format2_cpnorm[2] = {1, 5}; static const uint32_t pucch_dmrs_symbol_format2_cpnorm[2] = {1, 5};
uint32_t pucch_dmrs_symbol_format2_cpext[1] = {3}; static const uint32_t pucch_dmrs_symbol_format2_cpext[1] = {3};
/* Table 5.5.3.3-1: Frame structure type 1 sounding reference signal subframe configuration. */ /* Table 5.5.3.3-1: Frame structure type 1 sounding reference signal subframe configuration. */
uint32_t T_sfc[15] = {1, 2, 2, 5, 5, 5, 5, 5, 5, 10, 10, 10, 10, 10, 10}; static const uint32_t T_sfc[15] = {1, 2, 2, 5, 5, 5, 5, 5, 5, 10, 10, 10, 10, 10, 10};
uint32_t Delta_sfc1[7] = {0, 0, 1, 0, 1, 2, 3}; static const uint32_t Delta_sfc1[7] = {0, 0, 1, 0, 1, 2, 3};
uint32_t Delta_sfc2[4] = {0, 1, 2, 3}; static const uint32_t Delta_sfc2[4] = {0, 1, 2, 3};
uint32_t m_srs_b[4][4][8] = {{/* m_srs for 6<n_rb<40. Table 5.5.3.2-1 */ static const uint32_t m_srs_b[4][4][8] = {{/* m_srs for 6<n_rb<40. Table 5.5.3.2-1 */
{36, 32, 24, 20, 16, 12, 8, 4}, {36, 32, 24, 20, 16, 12, 8, 4},
{12, 16, 4, 4, 4, 4, 4, 4}, {12, 16, 4, 4, 4, 4, 4, 4},
{4, 8, 4, 4, 4, 4, 4, 4}, {4, 8, 4, 4, 4, 4, 4, 4},
{4, 4, 4, 4, 4, 4, 4, 4}}, {4, 4, 4, 4, 4, 4, 4, 4}},
{/* m_srs for 40<n_rb<60. Table 5.5.3.2-2 */ {/* m_srs for 40<n_rb<60. Table 5.5.3.2-2 */
{48, 48, 40, 36, 32, 24, 20, 16}, {48, 48, 40, 36, 32, 24, 20, 16},
{24, 16, 20, 12, 16, 4, 4, 4}, {24, 16, 20, 12, 16, 4, 4, 4},
{12, 8, 4, 4, 8, 4, 4, 4}, {12, 8, 4, 4, 8, 4, 4, 4},
{4, 4, 4, 4, 4, 4, 4, 4}}, {4, 4, 4, 4, 4, 4, 4, 4}},
{/* m_srs for 60<n_rb<80. Table 5.5.3.2-3 */ {/* m_srs for 60<n_rb<80. Table 5.5.3.2-3 */
{72, 64, 60, 48, 48, 40, 36, 32}, {72, 64, 60, 48, 48, 40, 36, 32},
{24, 32, 20, 24, 16, 20, 12, 16}, {24, 32, 20, 24, 16, 20, 12, 16},
{12, 16, 4, 12, 8, 4, 4, 8}, {12, 16, 4, 12, 8, 4, 4, 8},
{4, 4, 4, 4, 4, 4, 4, 4}}, {4, 4, 4, 4, 4, 4, 4, 4}},
{/* m_srs for 80<n_rb<110. Table 5.5.3.2-4 */ {/* m_srs for 80<n_rb<110. Table 5.5.3.2-4 */
{96, 96, 80, 72, 64, 60, 48, 48}, {96, 96, 80, 72, 64, 60, 48, 48},
{48, 32, 40, 24, 32, 20, 24, 16}, {48, 32, 40, 24, 32, 20, 24, 16},
{24, 16, 20, 12, 16, 4, 12, 8}, {24, 16, 20, 12, 16, 4, 12, 8},
{4, 4, 4, 4, 4, 4, 4, 4}}}; {4, 4, 4, 4, 4, 4, 4, 4}}};
/* Same tables for Nb */ /* Same tables for Nb */
uint32_t Nb[4][4][8] = { static const uint32_t Nb[4][4][8] = {
{{1, 1, 1, 1, 1, 1, 1, 1}, {3, 2, 6, 5, 4, 3, 2, 1}, {3, 2, 1, 1, 1, 1, 1, 1}, {1, 2, 1, 1, 1, 1, 1, 1}}, {{1, 1, 1, 1, 1, 1, 1, 1}, {3, 2, 6, 5, 4, 3, 2, 1}, {3, 2, 1, 1, 1, 1, 1, 1}, {1, 2, 1, 1, 1, 1, 1, 1}},
{{1, 1, 1, 1, 1, 1, 1, 1}, {2, 3, 2, 3, 2, 6, 5, 4}, {2, 2, 5, 3, 2, 1, 1, 1}, {3, 2, 1, 1, 2, 1, 1, 1}}, {{1, 1, 1, 1, 1, 1, 1, 1}, {2, 3, 2, 3, 2, 6, 5, 4}, {2, 2, 5, 3, 2, 1, 1, 1}, {3, 2, 1, 1, 2, 1, 1, 1}},
{{1, 1, 1, 1, 1, 1, 1, 1}, {3, 2, 3, 2, 3, 2, 3, 2}, {2, 2, 5, 2, 2, 5, 3, 2}, {3, 4, 1, 3, 2, 1, 1, 2}}, {{1, 1, 1, 1, 1, 1, 1, 1}, {3, 2, 3, 2, 3, 2, 3, 2}, {2, 2, 5, 2, 2, 5, 3, 2}, {3, 4, 1, 3, 2, 1, 1, 2}},
@ -457,7 +459,7 @@ int srsran_refsignal_dmrs_pucch_gen(srsran_refsignal_ul_t* q,
} }
// Choose number of symbols and orthogonal sequence from Tables 5.5.2.2.1-1 to -3 // Choose number of symbols and orthogonal sequence from Tables 5.5.2.2.1-1 to -3
float* w = NULL; const float* w = NULL;
switch (cfg->format) { switch (cfg->format) {
case SRSRAN_PUCCH_FORMAT_1: case SRSRAN_PUCCH_FORMAT_1:
case SRSRAN_PUCCH_FORMAT_1A: case SRSRAN_PUCCH_FORMAT_1A:

@ -104,9 +104,8 @@ int main(int argc, char** argv)
srsran_chest_sl_t q = {}; srsran_chest_sl_t q = {};
if (run_psbch_test) { if (run_psbch_test) {
// Tx // Tx
srsran_chest_sl_init(&q, SRSRAN_SIDELINK_PSBCH, cell, sl_comm_resource_pool); srsran_chest_sl_init(&q, SRSRAN_SIDELINK_PSBCH, cell, &sl_comm_resource_pool);
srsran_chest_sl_put_dmrs(&q, sf_buffer); srsran_chest_sl_put_dmrs(&q, sf_buffer);
// Rx // Rx

@ -82,7 +82,7 @@ void srsran_polar_chanalloc_rx(const uint8_t* output_decoder,
uint16_t i_o = 0; uint16_t i_o = 0;
uint16_t iPC = 0; uint16_t iPC = 0;
uint16_t iK = 0; uint16_t iK = 0;
for (uint16_t iKPC = 0; iKPC < K + (uint16_t)nPC; iKPC++) { for (uint16_t iKPC = 0; iKPC < (uint16_t)(K + nPC); iKPC++) {
i_o = K_set[iKPC]; // includes parity bits i_o = K_set[iKPC]; // includes parity bits
if (i_o == PC_set[iPC]) { // skip if (i_o == PC_set[iPC]) { // skip
iPC = iPC + 1; iPC = iPC + 1;

@ -310,9 +310,7 @@ static int dci_nr_format_0_0_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
// Frequency domain resource assignment // Frequency domain resource assignment
uint32_t N = dci_nr_freq_resource_size_type1(N_UL_BWP_RB); uint32_t N = dci_nr_freq_resource_size_type1(N_UL_BWP_RB);
if (N < N_UL_hop) {
return SRSRAN_ERROR;
}
dci->freq_domain_assigment = srsran_bit_pack(&y, N - N_UL_hop - trim); dci->freq_domain_assigment = srsran_bit_pack(&y, N - N_UL_hop - trim);
// Time domain resource assignment 4 bits // Time domain resource assignment 4 bits
@ -1018,8 +1016,8 @@ static int dci_nr_format_1_0_pack(const srsran_dci_nr_t* q, const srsran_dci_dl_
srsran_rnti_type_t rnti_type = msg->ctx.rnti_type; srsran_rnti_type_t rnti_type = msg->ctx.rnti_type;
srsran_search_space_type_t ss_type = dci->ctx.ss_type; srsran_search_space_type_t ss_type = dci->ctx.ss_type;
uint32_t N_DL_BWP_RB = SRSRAN_SEARCH_SPACE_IS_COMMON(ss_type) uint32_t N_DL_BWP_RB = SRSRAN_SEARCH_SPACE_IS_COMMON(ss_type)
? (q->cfg.coreset0_bw == 0) ? q->cfg.bwp_dl_initial_bw : q->cfg.coreset0_bw ? (q->cfg.coreset0_bw == 0) ? q->cfg.bwp_dl_initial_bw : q->cfg.coreset0_bw
: q->cfg.bwp_dl_active_bw; : q->cfg.bwp_dl_active_bw;
// Identifier for DCI formats 1 bits // Identifier for DCI formats 1 bits
if (rnti_type == srsran_rnti_type_c || rnti_type == srsran_rnti_type_tc) { if (rnti_type == srsran_rnti_type_c || rnti_type == srsran_rnti_type_tc) {
@ -1124,8 +1122,8 @@ static int dci_nr_format_1_0_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_
srsran_rnti_type_t rnti_type = msg->ctx.rnti_type; srsran_rnti_type_t rnti_type = msg->ctx.rnti_type;
srsran_search_space_type_t ss_type = msg->ctx.ss_type; srsran_search_space_type_t ss_type = msg->ctx.ss_type;
uint32_t N_DL_BWP_RB = SRSRAN_SEARCH_SPACE_IS_COMMON(ss_type) uint32_t N_DL_BWP_RB = SRSRAN_SEARCH_SPACE_IS_COMMON(ss_type)
? (q->cfg.coreset0_bw == 0) ? q->cfg.bwp_dl_initial_bw : q->cfg.coreset0_bw ? (q->cfg.coreset0_bw == 0) ? q->cfg.bwp_dl_initial_bw : q->cfg.coreset0_bw
: q->cfg.bwp_dl_active_bw; : q->cfg.bwp_dl_active_bw;
uint32_t nof_bits = srsran_dci_nr_size(q, ss_type, srsran_dci_format_nr_1_0); uint32_t nof_bits = srsran_dci_nr_size(q, ss_type, srsran_dci_format_nr_1_0);
if (msg->nof_bits != nof_bits) { if (msg->nof_bits != nof_bits) {

@ -282,9 +282,7 @@ int srsran_pmch_decode(srsran_pmch_t* q,
cf_t* sf_symbols[SRSRAN_MAX_PORTS], cf_t* sf_symbols[SRSRAN_MAX_PORTS],
srsran_pdsch_res_t* out) srsran_pdsch_res_t* out)
{ {
/* Set pointers for layermapping & precoding */
uint32_t i, n; uint32_t i, n;
cf_t* x[SRSRAN_MAX_LAYERS];
if (q != NULL && sf_symbols != NULL && out != NULL && cfg != NULL) { if (q != NULL && sf_symbols != NULL && out != NULL && cfg != NULL) {
INFO("Decoding PMCH SF: %d, MBSFN area ID: 0x%x, Mod %s, TBS: %d, NofSymbols: %d, NofBitsE: %d, rv_idx: %d, " INFO("Decoding PMCH SF: %d, MBSFN area ID: 0x%x, Mod %s, TBS: %d, NofSymbols: %d, NofBitsE: %d, rv_idx: %d, "
@ -299,12 +297,6 @@ int srsran_pmch_decode(srsran_pmch_t* q,
cfg->pdsch_cfg.grant.nof_prb, cfg->pdsch_cfg.grant.nof_prb,
sf->cfi); sf->cfi);
/* number of layers equals number of ports */
for (i = 0; i < q->cell.nof_ports; i++) {
x[i] = q->x[i];
}
memset(&x[q->cell.nof_ports], 0, sizeof(cf_t*) * (SRSRAN_MAX_LAYERS - q->cell.nof_ports));
uint32_t lstart = SRSRAN_NOF_CTRL_SYMBOLS(q->cell, sf->cfi); uint32_t lstart = SRSRAN_NOF_CTRL_SYMBOLS(q->cell, sf->cfi);
for (int j = 0; j < q->nof_rx_antennas; j++) { for (int j = 0; j < q->nof_rx_antennas; j++) {
/* extract symbols */ /* extract symbols */
@ -402,9 +394,7 @@ int srsran_pmch_encode(srsran_pmch_t* q,
cf_t* sf_symbols[SRSRAN_MAX_PORTS]) cf_t* sf_symbols[SRSRAN_MAX_PORTS])
{ {
int i; int i;
/* Set pointers for layermapping & precoding */ int ret = SRSRAN_ERROR_INVALID_INPUTS;
cf_t* x[SRSRAN_MAX_LAYERS];
int ret = SRSRAN_ERROR_INVALID_INPUTS;
if (q != NULL && cfg != NULL) { if (q != NULL && cfg != NULL) {
for (i = 0; i < q->cell.nof_ports; i++) { for (i = 0; i < q->cell.nof_ports; i++) {
if (sf_symbols[i] == NULL) { if (sf_symbols[i] == NULL) {
@ -432,12 +422,6 @@ int srsran_pmch_encode(srsran_pmch_t* q,
cfg->pdsch_cfg.grant.tb[0].nof_bits, cfg->pdsch_cfg.grant.tb[0].nof_bits,
0); 0);
/* number of layers equals number of ports */
for (i = 0; i < q->cell.nof_ports; i++) {
x[i] = q->x[i];
}
memset(&x[q->cell.nof_ports], 0, sizeof(cf_t*) * (SRSRAN_MAX_LAYERS - q->cell.nof_ports));
// TODO: use tb_encode directly // TODO: use tb_encode directly
if (srsran_dlsch_encode(&q->dl_sch, &cfg->pdsch_cfg, data, q->e)) { if (srsran_dlsch_encode(&q->dl_sch, &cfg->pdsch_cfg, data, q->e)) {
ERROR("Error encoding TB"); ERROR("Error encoding TB");

@ -156,7 +156,7 @@ int main(int argc, char** argv)
} }
srsran_chest_sl_t psbch_chest; srsran_chest_sl_t psbch_chest;
if (srsran_chest_sl_init(&psbch_chest, SRSRAN_SIDELINK_PSBCH, cell, sl_comm_resource_pool) != SRSRAN_SUCCESS) { if (srsran_chest_sl_init(&psbch_chest, SRSRAN_SIDELINK_PSBCH, cell, &sl_comm_resource_pool) != SRSRAN_SUCCESS) {
ERROR("Error in chest PSBCH init"); ERROR("Error in chest PSBCH init");
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }

@ -166,7 +166,7 @@ int base_init()
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
if (srsran_chest_sl_init(&pscch_chest, SRSRAN_SIDELINK_PSCCH, cell, sl_comm_resource_pool) != SRSRAN_SUCCESS) { if (srsran_chest_sl_init(&pscch_chest, SRSRAN_SIDELINK_PSCCH, cell, &sl_comm_resource_pool) != SRSRAN_SUCCESS) {
ERROR("Error in PSCCH DMRS init"); ERROR("Error in PSCCH DMRS init");
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
@ -176,7 +176,7 @@ int base_init()
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
if (srsran_chest_sl_init(&pssch_chest, SRSRAN_SIDELINK_PSSCH, cell, sl_comm_resource_pool) != SRSRAN_SUCCESS) { if (srsran_chest_sl_init(&pssch_chest, SRSRAN_SIDELINK_PSSCH, cell, &sl_comm_resource_pool) != SRSRAN_SUCCESS) {
ERROR("Error in chest PSSCH init"); ERROR("Error in chest PSSCH init");
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }

@ -257,8 +257,10 @@ int srsran_ssss_find(srsran_ssss_t* q, cf_t* input, uint32_t nof_prb, uint32_t N
float peak_1_value = q->shifted_output_abs[peak_1_pos]; float peak_1_value = q->shifted_output_abs[peak_1_pos];
if ((peak_1_pos >= (q->corr_peak_pos - (symbol_sz + cp_len) - 2)) && if ((peak_1_pos >= (q->corr_peak_pos - (symbol_sz + cp_len) - 2)) &&
(peak_1_pos <= (q->corr_peak_pos - (symbol_sz + cp_len) + 2))) { (peak_1_pos <= (q->corr_peak_pos - (symbol_sz + cp_len) + 2))) {
// Skip.
} else if ((peak_1_pos >= (q->corr_peak_pos + (symbol_sz + cp_len) - 2)) && } else if ((peak_1_pos >= (q->corr_peak_pos + (symbol_sz + cp_len) - 2)) &&
(peak_1_pos <= (q->corr_peak_pos + (symbol_sz + cp_len) + 2))) { (peak_1_pos <= (q->corr_peak_pos + (symbol_sz + cp_len) + 2))) {
// Skip.
} else { } else {
q->corr_peak_pos = -1; q->corr_peak_pos = -1;
continue; continue;
@ -270,8 +272,10 @@ int srsran_ssss_find(srsran_ssss_t* q, cf_t* input, uint32_t nof_prb, uint32_t N
float peak_2_value = q->shifted_output_abs[peak_2_pos]; float peak_2_value = q->shifted_output_abs[peak_2_pos];
if ((peak_2_pos >= (q->corr_peak_pos - (symbol_sz + cp_len) - 2)) && if ((peak_2_pos >= (q->corr_peak_pos - (symbol_sz + cp_len) - 2)) &&
(peak_2_pos <= (q->corr_peak_pos - (symbol_sz + cp_len) + 2))) { (peak_2_pos <= (q->corr_peak_pos - (symbol_sz + cp_len) + 2))) {
// Skip.
} else if ((peak_2_pos >= (q->corr_peak_pos + (symbol_sz + cp_len) - 2)) && } else if ((peak_2_pos >= (q->corr_peak_pos + (symbol_sz + cp_len) - 2)) &&
(peak_2_pos <= (q->corr_peak_pos + (symbol_sz + cp_len) + 2))) { (peak_2_pos <= (q->corr_peak_pos + (symbol_sz + cp_len) + 2))) {
// Skip.
} else { } else {
q->corr_peak_pos = -1; q->corr_peak_pos = -1;
continue; continue;

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