|
|
|
@ -51,6 +51,7 @@ bwp_params_t::bwp_params_t(const cell_cfg_t& cell, const sched_args_t& sched_cfg
|
|
|
|
|
|
|
|
|
|
P = get_P(cfg.rb_width, cfg.pdsch.rbg_size_cfg_1);
|
|
|
|
|
N_rbg = get_nof_rbgs(cfg.rb_width, cfg.start_rb, cfg.pdsch.rbg_size_cfg_1);
|
|
|
|
|
cached_empty_prb_mask.resize(cfg.rb_width);
|
|
|
|
|
|
|
|
|
|
// Derive params of individual slots
|
|
|
|
|
uint32_t nof_slots = SRSRAN_NSLOTS_PER_FRAME_NR(cfg.numerology_idx);
|
|
|
|
@ -91,19 +92,30 @@ bwp_params_t::bwp_params_t(const cell_cfg_t& cell, const sched_args_t& sched_cfg
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (uint32_t ss_id = 0; ss_id < SRSRAN_UE_DL_NR_MAX_NOF_SEARCH_SPACE; ++ss_id) {
|
|
|
|
|
if (cell_cfg.bwps[0].pdcch.search_space_present[ss_id]) {
|
|
|
|
|
auto& ss = cell_cfg.bwps[0].pdcch.search_space[ss_id];
|
|
|
|
|
auto& coreset = cell_cfg.bwps[0].pdcch.coreset[ss.coreset_id];
|
|
|
|
|
common_cce_list.emplace(ss_id);
|
|
|
|
|
bwp_cce_pos_list& ss_cce_list = common_cce_list[ss_id];
|
|
|
|
|
for (uint32_t sl = 0; sl < SRSRAN_NOF_SF_X_FRAME; ++sl) {
|
|
|
|
|
for (uint32_t agg_idx = 0; agg_idx < MAX_NOF_AGGR_LEVELS; ++agg_idx) {
|
|
|
|
|
ss_cce_list[sl][agg_idx].resize(SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR);
|
|
|
|
|
int n = srsran_pdcch_nr_locations_coreset(
|
|
|
|
|
&coreset, &ss, SRSRAN_SIRNTI, agg_idx, sl, ss_cce_list[sl][agg_idx].data());
|
|
|
|
|
srsran_assert(n >= 0, "Failed to configure DCI locations of search space id=%d", ss_id);
|
|
|
|
|
ss_cce_list[sl][agg_idx].resize(n);
|
|
|
|
|
}
|
|
|
|
|
if (not cell_cfg.bwps[0].pdcch.search_space_present[ss_id]) {
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
auto& ss = cell_cfg.bwps[0].pdcch.search_space[ss_id];
|
|
|
|
|
auto& coreset = cell_cfg.bwps[0].pdcch.coreset[ss.coreset_id];
|
|
|
|
|
common_cce_list.emplace(ss_id);
|
|
|
|
|
bwp_cce_pos_list& ss_cce_list = common_cce_list[ss_id];
|
|
|
|
|
for (uint32_t sl = 0; sl < SRSRAN_NOF_SF_X_FRAME; ++sl) {
|
|
|
|
|
for (uint32_t agg_idx = 0; agg_idx < MAX_NOF_AGGR_LEVELS; ++agg_idx) {
|
|
|
|
|
ss_cce_list[sl][agg_idx].resize(SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR);
|
|
|
|
|
int n = srsran_pdcch_nr_locations_coreset(
|
|
|
|
|
&coreset, &ss, SRSRAN_SIRNTI, agg_idx, sl, ss_cce_list[sl][agg_idx].data());
|
|
|
|
|
srsran_assert(n >= 0, "Failed to configure DCI locations of search space id=%d", ss_id);
|
|
|
|
|
ss_cce_list[sl][agg_idx].resize(n);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (SRSRAN_SEARCH_SPACE_IS_COMMON(ss.type)) {
|
|
|
|
|
used_common_prb_masks.emplace(ss_id, cached_empty_prb_mask);
|
|
|
|
|
uint32_t coreset_start = srsran_coreset_start_rb(&cfg.pdcch.coreset[ss.coreset_id]);
|
|
|
|
|
used_common_prb_masks[ss_id].fill(0, coreset_start, true);
|
|
|
|
|
if (ss.coreset_id == 0) {
|
|
|
|
|
uint32_t coreset0_bw = srsran_coreset_get_bw(&cfg.pdcch.coreset[0]);
|
|
|
|
|
used_common_prb_masks[ss_id].fill(coreset_start + coreset0_bw, cfg.rb_width, true);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|