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@ -107,7 +107,6 @@ void sched_ue::init(uint16_t rnti_, const std::vector<sched_cell_params_t>& cell
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void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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{
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{
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{
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// for the first configured cc, set it as primary cc
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// for the first configured cc, set it as primary cc
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if (cfg.supported_cc_list.empty()) {
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if (cfg.supported_cc_list.empty()) {
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uint32_t primary_cc_idx = 0;
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uint32_t primary_cc_idx = 0;
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@ -124,8 +123,16 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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// update configuration
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// update configuration
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std::vector<sched::ue_cfg_t::cc_cfg_t> prev_supported_cc_list = std::move(cfg.supported_cc_list);
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std::vector<sched::ue_cfg_t::cc_cfg_t> prev_supported_cc_list = std::move(cfg.supported_cc_list);
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sched::ue_cfg_t::conn_state_t prev_state = cfg.conn_state;
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cfg = cfg_;
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cfg = cfg_;
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// update in connection state detected
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if (prev_state != cfg.conn_state) {
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if (cfg.conn_state == sched_interface::ue_cfg_t::ue_id_rx) {
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conres_state = ra_state_t::conres_sched_pending;
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}
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}
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// update bearer cfgs
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// update bearer cfgs
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for (uint32_t i = 0; i < sched_interface::MAX_LC; ++i) {
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for (uint32_t i = 0; i < sched_interface::MAX_LC; ++i) {
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set_bearer_cfg_unlocked(i, cfg.ue_bearers[i]);
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set_bearer_cfg_unlocked(i, cfg.ue_bearers[i]);
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@ -145,7 +152,7 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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if (ue_idx == 0) {
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if (ue_idx == 0) {
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// PCell was changed possibly due to handover. Schedule a new ConRes CE to be transmitted after the Msg3
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// PCell was changed possibly due to handover. Schedule a new ConRes CE to be transmitted after the Msg3
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conres_state = ra_state_t::conres_sched_pending;
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conres_state = ra_state_t::conres_sched_pending;
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log_h->info("SCHED: PCell has changed. ConRes CE scheduled\n");
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log_h->info("SCHED: PCell has changed for rnti=0x%x. ConRes CE scheduled\n", rnti);
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}
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}
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} else {
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} else {
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// The SCell internal configuration may have changed
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// The SCell internal configuration may have changed
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@ -157,7 +164,6 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
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pending_ces.emplace_back(srslte::sch_subh::SCELL_ACTIVATION);
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pending_ces.emplace_back(srslte::sch_subh::SCELL_ACTIVATION);
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log_h->info("SCHED: Enqueueing SCell Activation CMD for rnti=0x%x\n", rnti);
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log_h->info("SCHED: Enqueueing SCell Activation CMD for rnti=0x%x\n", rnti);
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}
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}
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}
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}
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}
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void sched_ue::reset()
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void sched_ue::reset()
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@ -308,10 +314,6 @@ void sched_ue::set_ul_crc(srslte::tti_point tti_rx, uint32_t enb_cc_idx, bool cr
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auto ret = carriers[p.second].harq_ent.set_ul_crc(tti_rx, 0, crc_res);
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auto ret = carriers[p.second].harq_ent.set_ul_crc(tti_rx, 0, crc_res);
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if (not ret.first) {
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if (not ret.first) {
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log_h->warning("Received UL CRC for invalid tti_rx=%d\n", (int)tti_rx.to_uint());
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log_h->warning("Received UL CRC for invalid tti_rx=%d\n", (int)tti_rx.to_uint());
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} else {
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if (conres_state == ra_state_t::wait_msg3_ack and ret.second == msg3_pid and crc_res) {
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conres_state = ra_state_t::conres_sched_pending;
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}
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}
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}
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} else {
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} else {
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log_h->warning("Received UL CRC for invalid cell index %d\n", enb_cc_idx);
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log_h->warning("Received UL CRC for invalid cell index %d\n", enb_cc_idx);
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@ -1097,12 +1099,6 @@ uint32_t sched_ue::get_aggr_level(uint32_t ue_cc_idx, uint32_t nof_bits)
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return carriers[ue_cc_idx].get_aggr_level(nof_bits);
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return carriers[ue_cc_idx].get_aggr_level(nof_bits);
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}
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}
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void sched_ue::sched_conres_ce(uint32_t msg3_tti_tx_ul)
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{
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msg3_pid = carriers[0].harq_ent.get_ul_harq(msg3_tti_tx_ul)->get_id();
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conres_state = ra_state_t::wait_msg3_ack;
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}
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void sched_ue::finish_tti(const tti_params_t& tti_params, uint32_t enb_cc_idx)
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void sched_ue::finish_tti(const tti_params_t& tti_params, uint32_t enb_cc_idx)
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{
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{
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auto p = get_cell_index(enb_cc_idx);
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auto p = get_cell_index(enb_cc_idx);
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