rrc,gnb: remove srsran_prach_cfg_t from gnb rrc config struct

master
Francisco Paisana 3 years ago
parent c4cc94df17
commit e8902c785f

@ -81,7 +81,10 @@ void to_asn1(asn1::rrc_nr::plmn_id_s* asn1_type, const plmn_id_t& cfg);
/***************************
* PHY Config
**************************/
bool make_phy_rach_cfg(const asn1::rrc_nr::rach_cfg_common_s& asn1_type, srsran_prach_cfg_t* prach_cfg);
bool make_phy_rach_cfg(const asn1::rrc_nr::rach_cfg_common_s& asn1_type,
srsran_duplex_mode_t duplex_mode,
srsran_prach_cfg_t* prach_cfg);
bool fill_rach_cfg_common(const srsran_prach_cfg_t& prach_cfg, asn1::rrc_nr::rach_cfg_common_s& asn1_type);
bool make_phy_tdd_cfg(const asn1::rrc_nr::tdd_ul_dl_cfg_common_s& tdd_ul_dl_cfg_common,
srsran_duplex_config_nr_t* srsran_duplex_config_nr);

@ -272,14 +272,22 @@ srsran::pdcp_config_t make_drb_pdcp_config_t(const uint8_t bearer_id, bool is_ue
return cfg;
}
bool make_phy_rach_cfg(const rach_cfg_common_s& asn1_type, srsran_prach_cfg_t* prach_cfg)
bool make_phy_rach_cfg(const rach_cfg_common_s& asn1_type,
srsran_duplex_mode_t duplex_mode,
srsran_prach_cfg_t* prach_cfg)
{
prach_cfg->is_nr = true;
prach_cfg->config_idx = asn1_type.rach_cfg_generic.prach_cfg_idx;
prach_cfg->zero_corr_zone = (uint32_t)asn1_type.rach_cfg_generic.zero_correlation_zone_cfg;
prach_cfg->num_ra_preambles = 64; // Hard-coded
prach_cfg->num_ra_preambles = 64;
if (asn1_type.total_nof_ra_preambs_present) {
prach_cfg->num_ra_preambles = asn1_type.total_nof_ra_preambs;
}
prach_cfg->hs_flag = false; // Hard-coded
prach_cfg->tdd_config = {}; // Hard-coded
prach_cfg->tdd_config = {};
if (duplex_mode == SRSRAN_DUPLEX_MODE_TDD) {
prach_cfg->tdd_config.configured = true;
}
// As the current PRACH is based on LTE, the freq-offset shall be subtracted 1 for aligning with NR bandwidth
// For example. A 52 PRB cell with an freq_offset of 1 will match a LTE 50 PRB cell with freq_offset of 0
@ -289,11 +297,12 @@ bool make_phy_rach_cfg(const rach_cfg_common_s& asn1_type, srsran_prach_cfg_t* p
return false;
}
switch (prach_cfg->root_seq_idx = asn1_type.prach_root_seq_idx.type()) {
switch (asn1_type.prach_root_seq_idx.type().value) {
case rach_cfg_common_s::prach_root_seq_idx_c_::types_opts::l839:
prach_cfg->root_seq_idx = (uint32_t)asn1_type.prach_root_seq_idx.l839();
break;
case rach_cfg_common_s::prach_root_seq_idx_c_::types_opts::l139:
prach_cfg->root_seq_idx = (uint32_t)asn1_type.prach_root_seq_idx.l139();
default:
asn1::log_error("Not-implemented option for prach_root_seq_idx type %s",
asn1_type.prach_root_seq_idx.type().to_string());
@ -303,6 +312,40 @@ bool make_phy_rach_cfg(const rach_cfg_common_s& asn1_type, srsran_prach_cfg_t* p
return true;
};
bool fill_rach_cfg_common(const srsran_prach_cfg_t& prach_cfg, asn1::rrc_nr::rach_cfg_common_s& asn1_type)
{
asn1_type = {};
// rach-ConfigGeneric
asn1_type.rach_cfg_generic.prach_cfg_idx = prach_cfg.config_idx;
asn1_type.rach_cfg_generic.msg1_fdm.value = rach_cfg_generic_s::msg1_fdm_opts::one;
asn1_type.rach_cfg_generic.msg1_freq_start = prach_cfg.freq_offset;
asn1_type.rach_cfg_generic.zero_correlation_zone_cfg = prach_cfg.zero_corr_zone;
asn1_type.rach_cfg_generic.preamb_rx_target_pwr = -110;
asn1_type.rach_cfg_generic.preamb_trans_max.value = rach_cfg_generic_s::preamb_trans_max_opts::n7;
asn1_type.rach_cfg_generic.pwr_ramp_step.value = rach_cfg_generic_s::pwr_ramp_step_opts::db4;
asn1_type.rach_cfg_generic.ra_resp_win.value = rach_cfg_generic_s::ra_resp_win_opts::sl10;
// totalNumberOfRA-Preambles
if (prach_cfg.num_ra_preambles != 64) {
asn1_type.total_nof_ra_preambs_present = true;
asn1_type.total_nof_ra_preambs = prach_cfg.num_ra_preambles;
}
// ssb-perRACH-OccasionAndCB-PreamblesPerSSB
asn1_type.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
if (not asn1::number_to_enum(asn1_type.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one(),
prach_cfg.num_ra_preambles)) {
asn1::log_error("Invalid number of RA preambles=%d", prach_cfg.num_ra_preambles);
return false;
}
asn1_type.ra_contention_resolution_timer.value = rach_cfg_common_s::ra_contention_resolution_timer_opts::sf64;
asn1_type.prach_root_seq_idx.set_l839() = prach_cfg.root_seq_idx;
asn1_type.restricted_set_cfg.value = rach_cfg_common_s::restricted_set_cfg_opts::unrestricted_set;
return true;
}
bool make_phy_tdd_cfg(const tdd_ul_dl_cfg_common_s& tdd_ul_dl_cfg_common,
srsran_duplex_config_nr_t* in_srsran_duplex_config_nr)
{

@ -1593,9 +1593,6 @@ int set_derived_args_nr(all_args_t* args_, rrc_nr_cfg_t* rrc_nr_cfg_, phy_cfg_t*
// phy_cell_cfg.root_seq_idx = cfg.root_seq_idx;
// PRACH
cfg.phy_cell.prach.hs_flag = phy_cfg_->prach_cnfg.prach_cfg_info.high_speed_flag;
// PDSCH
cfg.phy_cell.pdsch.rs_power = phy_cfg_->pdsch_cnfg.ref_sig_pwr;
cfg.phy_cell.pdsch.p_b = phy_cfg_->pdsch_cnfg.p_b;

@ -63,7 +63,6 @@ struct sched_nr_bwp_cfg_t {
srsran_sch_hl_cfg_nr_t pdsch = {};
srsran_sch_hl_cfg_nr_t pusch = {};
srsran_pucch_nr_hl_cfg_t pucch = {};
srsran_prach_cfg_t prach = {};
srsran_harq_ack_cfg_hl_t harq_ack = {};
uint32_t rar_window_size = 10; // See TS 38.331, ra-ResponseWindow: {1, 2, 4, 8, 10, 20, 40, 80}
uint32_t numerology_idx = 0;

@ -75,7 +75,9 @@ srsran::phy_cfg_nr_t get_common_ue_phy_cfg(const sched_nr_cell_cfg_t& cfg)
ue_phy_cfg.pdsch = cfg.bwps[0].pdsch;
ue_phy_cfg.pusch = cfg.bwps[0].pusch;
ue_phy_cfg.pucch = cfg.bwps[0].pucch;
ue_phy_cfg.prach = cfg.bwps[0].prach;
srsran::make_phy_rach_cfg(cfg.ul_cfg_common.init_ul_bwp.rach_cfg_common.setup(),
cfg.tdd_ul_dl_cfg_common.has_value() ? SRSRAN_DUPLEX_MODE_TDD : SRSRAN_DUPLEX_MODE_FDD,
&ue_phy_cfg.prach);
ue_phy_cfg.harq_ack = cfg.bwps[0].harq_ack;
ue_phy_cfg.csi = {}; // disable CSI until RA is complete
ue_phy_cfg.carrier.pci = cfg.pci;

@ -60,6 +60,8 @@ inline sched_nr_cell_cfg_t get_default_cell_cfg(const srsran::phy_cfg_nr_t& phy_
phy_cfg.carrier.offset_to_carrier;
cell_cfg.dl_cfg_common.init_dl_bwp.generic_params.subcarrier_spacing =
(asn1::rrc_nr::subcarrier_spacing_opts::options)phy_cfg.carrier.scs;
cell_cfg.ul_cfg_common.init_ul_bwp.rach_cfg_common_present = true;
srsran::fill_rach_cfg_common(phy_cfg.prach, cell_cfg.ul_cfg_common.init_ul_bwp.rach_cfg_common.set_setup());
cell_cfg.dl_cell_nof_prb = phy_cfg.carrier.nof_prb;
cell_cfg.nof_layers = phy_cfg.carrier.max_mimo_layers;
cell_cfg.ssb_periodicity_ms = phy_cfg.ssb.periodicity_ms;
@ -77,7 +79,6 @@ inline sched_nr_cell_cfg_t get_default_cell_cfg(const srsran::phy_cfg_nr_t& phy_
cell_cfg.bwps[0].pdsch = phy_cfg.pdsch;
cell_cfg.bwps[0].pusch = phy_cfg.pusch;
cell_cfg.bwps[0].pucch = phy_cfg.pucch;
cell_cfg.bwps[0].prach = phy_cfg.prach;
cell_cfg.bwps[0].harq_ack = phy_cfg.harq_ack;
cell_cfg.bwps[0].rb_width = phy_cfg.carrier.nof_prb;

@ -796,11 +796,48 @@ int fill_freq_info_ul_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, freq_in
return SRSRAN_SUCCESS;
}
int fill_rach_cfg_common(const rrc_nr_cfg_t& cfg, uint32_t cc, rach_cfg_common_s& rach)
{
// rach-ConfigGeneric
rach.rach_cfg_generic.prach_cfg_idx = 0;
if (cfg.cell_list[cc].duplex_mode == SRSRAN_DUPLEX_MODE_TDD) {
// Note: Give more time margin to fit RAR
rach.rach_cfg_generic.prach_cfg_idx = 8;
}
rach.rach_cfg_generic.msg1_fdm.value = rach_cfg_generic_s::msg1_fdm_opts::one;
rach.rach_cfg_generic.msg1_freq_start = 1; // zero not supported with current PRACH implementation
rach.rach_cfg_generic.zero_correlation_zone_cfg = 0;
rach.rach_cfg_generic.preamb_rx_target_pwr = -110;
rach.rach_cfg_generic.preamb_trans_max.value = rach_cfg_generic_s::preamb_trans_max_opts::n7;
rach.rach_cfg_generic.pwr_ramp_step.value = rach_cfg_generic_s::pwr_ramp_step_opts::db4;
rach.rach_cfg_generic.ra_resp_win.value = rach_cfg_generic_s::ra_resp_win_opts::sl10;
// totalNumberOfRA-Preambles
if (cfg.cell_list[cc].phy_cell.num_ra_preambles != 64) {
rach.total_nof_ra_preambs_present = true;
rach.total_nof_ra_preambs = cfg.cell_list[cc].phy_cell.num_ra_preambles;
}
// ssb-perRACH-OccasionAndCB-PreamblesPerSSB
rach.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
if (not asn1::number_to_enum(rach.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one(),
cfg.cell_list[cc].phy_cell.num_ra_preambles)) {
get_logger(cfg).error("Invalid number of RA preambles=%d", cfg.cell_list[cc].phy_cell.num_ra_preambles);
return -1;
}
rach.ra_contention_resolution_timer.value = rach_cfg_common_s::ra_contention_resolution_timer_opts::sf64;
rach.prach_root_seq_idx.set_l839() = cfg.cell_list[cc].phy_cell.root_seq_idx;
rach.restricted_set_cfg.value = rach_cfg_common_s::restricted_set_cfg_opts::unrestricted_set;
return SRSRAN_SUCCESS;
}
/// Fill InitUlBwp with gNB config
int fill_init_ul_bwp_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, bwp_ul_common_s& init_ul_bwp)
{
init_ul_bwp.rach_cfg_common_present = true;
set_rach_cfg_common(cfg.cell_list[cc].phy_cell.prach, init_ul_bwp.rach_cfg_common.set_setup());
HANDLE_ERROR(fill_rach_cfg_common(cfg, cc, init_ul_bwp.rach_cfg_common.set_setup()));
// TODO: Add missing fields
@ -1120,36 +1157,37 @@ void fill_dl_cfg_common_sib(const rrc_nr_cfg_t& cfg, uint32_t cc, dl_cfg_common_
out.pcch_cfg.ns.value = pcch_cfg_s::ns_opts::one;
}
void fill_ul_cfg_common_sib(const rrc_cell_cfg_nr_t& cell_cfg, ul_cfg_common_sib_s& cfg)
void fill_ul_cfg_common_sib(const rrc_nr_cfg_t& cfg, uint32_t cc, ul_cfg_common_sib_s& out)
{
auto& cell_cfg = cfg.cell_list[cc];
srsran::srsran_band_helper band_helper;
cfg.freq_info_ul.freq_band_list.resize(1);
cfg.freq_info_ul.freq_band_list[0].freq_band_ind_nr_present = true;
cfg.freq_info_ul.freq_band_list[0].freq_band_ind_nr = cell_cfg.band;
out.freq_info_ul.freq_band_list.resize(1);
out.freq_info_ul.freq_band_list[0].freq_band_ind_nr_present = true;
out.freq_info_ul.freq_band_list[0].freq_band_ind_nr = cell_cfg.band;
cfg.freq_info_ul.absolute_freq_point_a_present = true;
cfg.freq_info_ul.absolute_freq_point_a =
out.freq_info_ul.absolute_freq_point_a_present = true;
out.freq_info_ul.absolute_freq_point_a =
band_helper.get_abs_freq_point_a_arfcn(cell_cfg.phy_cell.carrier.nof_prb, cell_cfg.ul_arfcn);
cfg.freq_info_ul.scs_specific_carrier_list.resize(1);
cfg.freq_info_ul.scs_specific_carrier_list[0].offset_to_carrier = cell_cfg.phy_cell.carrier.offset_to_carrier;
cfg.freq_info_ul.scs_specific_carrier_list[0].subcarrier_spacing =
out.freq_info_ul.scs_specific_carrier_list.resize(1);
out.freq_info_ul.scs_specific_carrier_list[0].offset_to_carrier = cell_cfg.phy_cell.carrier.offset_to_carrier;
out.freq_info_ul.scs_specific_carrier_list[0].subcarrier_spacing =
(subcarrier_spacing_opts::options)cell_cfg.phy_cell.carrier.scs;
cfg.freq_info_ul.scs_specific_carrier_list[0].carrier_bw = cell_cfg.phy_cell.carrier.nof_prb;
out.freq_info_ul.scs_specific_carrier_list[0].carrier_bw = cell_cfg.phy_cell.carrier.nof_prb;
cfg.freq_info_ul.p_max_present = true;
cfg.freq_info_ul.p_max = 10;
out.freq_info_ul.p_max_present = true;
out.freq_info_ul.p_max = 10;
cfg.init_ul_bwp.generic_params.location_and_bw = 14025;
cfg.init_ul_bwp.generic_params.subcarrier_spacing.value =
out.init_ul_bwp.generic_params.location_and_bw = 14025;
out.init_ul_bwp.generic_params.subcarrier_spacing.value =
(subcarrier_spacing_opts::options)cell_cfg.phy_cell.carrier.scs;
cfg.init_ul_bwp.rach_cfg_common_present = true;
set_rach_cfg_common(cell_cfg.phy_cell.prach, cfg.init_ul_bwp.rach_cfg_common.set_setup());
out.init_ul_bwp.rach_cfg_common_present = true;
fill_rach_cfg_common(cfg, cc, out.init_ul_bwp.rach_cfg_common.set_setup());
cfg.init_ul_bwp.pusch_cfg_common_present = true;
pusch_cfg_common_s& pusch = cfg.init_ul_bwp.pusch_cfg_common.set_setup();
out.init_ul_bwp.pusch_cfg_common_present = true;
pusch_cfg_common_s& pusch = out.init_ul_bwp.pusch_cfg_common.set_setup();
pusch.pusch_time_domain_alloc_list.resize(1);
pusch.pusch_time_domain_alloc_list[0].k2_present = true;
pusch.pusch_time_domain_alloc_list[0].k2 = 4;
@ -1158,15 +1196,15 @@ void fill_ul_cfg_common_sib(const rrc_cell_cfg_nr_t& cell_cfg, ul_cfg_common_sib
pusch.p0_nominal_with_grant_present = true;
pusch.p0_nominal_with_grant = -76;
cfg.init_ul_bwp.pucch_cfg_common_present = true;
pucch_cfg_common_s& pucch = cfg.init_ul_bwp.pucch_cfg_common.set_setup();
out.init_ul_bwp.pucch_cfg_common_present = true;
pucch_cfg_common_s& pucch = out.init_ul_bwp.pucch_cfg_common.set_setup();
pucch.pucch_res_common_present = true;
pucch.pucch_res_common = 11;
pucch.pucch_group_hop.value = pucch_cfg_common_s::pucch_group_hop_opts::neither;
pucch.p0_nominal_present = true;
pucch.p0_nominal = -90;
cfg.time_align_timer_common.value = time_align_timer_opts::infinity;
out.time_align_timer_common.value = time_align_timer_opts::infinity;
}
int fill_serv_cell_cfg_common_sib(const rrc_nr_cfg_t& cfg, uint32_t cc, serving_cell_cfg_common_sib_s& out)
@ -1176,7 +1214,7 @@ int fill_serv_cell_cfg_common_sib(const rrc_nr_cfg_t& cfg, uint32_t cc, serving_
fill_dl_cfg_common_sib(cfg, cc, out.dl_cfg_common);
out.ul_cfg_common_present = true;
fill_ul_cfg_common_sib(cell_cfg, out.ul_cfg_common);
fill_ul_cfg_common_sib(cfg, cc, out.ul_cfg_common);
out.ssb_positions_in_burst.in_one_group.from_number(0x80);

@ -277,7 +277,9 @@ void rrc_nr::config_phy()
bool ret = srsran::fill_phy_pdcch_cfg(
cell_ctxt->master_cell_group->sp_cell_cfg.sp_cell_cfg_ded.init_dl_bwp.pdcch_cfg.setup(), &common_cfg.pdcch);
srsran_assert(ret, "Failed to generate Dedicated PDCCH config");
common_cfg.prach = cfg.cell_list[0].phy_cell.prach;
srsran::make_phy_rach_cfg(du_cfg->cell(0).serv_cell_cfg_common().ul_cfg_common.init_ul_bwp.rach_cfg_common.setup(),
cfg.cell_list[0].duplex_mode,
&common_cfg.prach);
common_cfg.duplex_mode = cfg.cell_list[0].duplex_mode;
ret = srsran::fill_phy_ssb_cfg(
cfg.cell_list[0].phy_cell.carrier, du_cfg->cell(0).serv_cell_cfg_common(), &common_cfg.ssb);

@ -114,16 +114,6 @@ void generate_default_nr_phy_cell(phy_cell_cfg_nr_t& phy_cell)
phy_cell.ul_freq_hz = 0;
phy_cell.num_ra_preambles = 8;
// PRACH
phy_cell.prach.is_nr = true;
phy_cell.prach.config_idx = 0;
phy_cell.prach.root_seq_idx = 1;
phy_cell.prach.freq_offset = 1; // msg1-FrequencyStart (zero not supported with current PRACH implementation)
phy_cell.prach.zero_corr_zone = 0;
phy_cell.prach.num_ra_preambles = phy_cell.num_ra_preambles;
phy_cell.prach.hs_flag = false;
phy_cell.prach.tdd_config.configured = false;
// PDSCH
phy_cell.pdsch.rs_power = 0;
phy_cell.pdsch.p_b = 0;
@ -304,14 +294,6 @@ int set_derived_nr_cell_params(bool is_sa, rrc_cell_cfg_nr_t& cell)
cell.pdcch_cfg_common.ra_search_space_present = true;
cell.pdcch_cfg_common.ra_search_space = ss1.search_space_id;
// Derive remaining PHY cell params
cell.phy_cell.prach.num_ra_preambles = cell.phy_cell.num_ra_preambles;
cell.phy_cell.prach.tdd_config.configured = (cell.duplex_mode == SRSRAN_DUPLEX_MODE_TDD);
if (cell.duplex_mode == SRSRAN_DUPLEX_MODE_TDD) {
// Note: Give more time margin to fit RAR
cell.phy_cell.prach.config_idx = 8;
}
return check_nr_cell_cfg_valid(cell, is_sa);
}

@ -457,6 +457,8 @@ void rrc_nr::handle_sib1(const sib1_s& sib1)
// Apply RACH Config Common
if (not make_phy_rach_cfg(sib1.serving_cell_cfg_common.ul_cfg_common.init_ul_bwp.rach_cfg_common.setup(),
sib1.serving_cell_cfg_common.tdd_ul_dl_cfg_common_present ? SRSRAN_DUPLEX_MODE_TDD
: SRSRAN_DUPLEX_MODE_FDD,
&phy_cfg.prach)) {
logger.warning("Could not set phy rach config.");
return;
@ -1355,7 +1357,8 @@ bool rrc_nr::apply_ul_common_cfg(const asn1::rrc_nr::ul_cfg_common_s& ul_cfg_com
mac->set_config(rach_cfg_nr);
// Make the RACH configuration for PHY
if (not make_phy_rach_cfg(ul_cfg_common.init_ul_bwp.rach_cfg_common.setup(), &phy_cfg.prach)) {
if (not make_phy_rach_cfg(
ul_cfg_common.init_ul_bwp.rach_cfg_common.setup(), SRSRAN_DUPLEX_MODE_FDD, &phy_cfg.prach)) {
logger.warning("Error parsing rach_cfg_common");
return false;
}
@ -1640,8 +1643,9 @@ bool rrc_nr::update_sp_cell_cfg(const sp_cell_cfg_s& sp_cell_cfg)
if (recfg_with_sync.sp_cell_cfg_common.tdd_ul_dl_cfg_common_present) {
logger.debug("TDD UL DL config present, using TDD");
srsran_duplex_config_nr_t duplex;
if (make_phy_tdd_cfg(recfg_with_sync.sp_cell_cfg_common.tdd_ul_dl_cfg_common, &duplex) == true) {
if (make_phy_tdd_cfg(recfg_with_sync.sp_cell_cfg_common.tdd_ul_dl_cfg_common, &duplex)) {
phy_cfg.duplex = duplex;
phy_cfg.prach.tdd_config.configured = true;
} else {
logger.warning("Warning while building duplex structure");
return false;

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