Enable NR RRC MCS table selection

lib/include/srsran/phy/phch/phch_cfg_nr.h

@@ -184,6 +184,7 @@ typedef struct SRSRAN_API {
   bool     scrambling_id_present;
   uint32_t scambling_id; // Identifier used to initialize data scrambling (0-1023)
 
+  srsran_mcs_table_t     mcs_table;
   srsran_dmrs_sch_type_t dmrs_type;
   srsran_dmrs_sch_len_t  dmrs_max_length;
   struct {

lib/src/phy/phch/ra_nr.c

@@ -677,6 +677,7 @@ int srsran_ra_dl_dci_to_grant_nr(const srsran_carrier_nr_t*    carrier,
   pdsch_grant->tb[0].rv        = dci_dl->rv;
   pdsch_grant->tb[0].mcs       = dci_dl->mcs;
   pdsch_grant->tb[0].ndi       = dci_dl->ndi;
+  pdsch_cfg->sch_cfg.mcs_table = pdsch_hl_cfg->mcs_table;
 
   // 5.1.4 PDSCH resource mapping
   if (ra_dl_resource_mapping(carrier, slot, pdsch_hl_cfg, pdsch_cfg) < SRSRAN_SUCCESS) {
@@ -790,6 +791,7 @@ int srsran_ra_ul_dci_to_grant_nr(const srsran_carrier_nr_t*    carrier,
   pusch_grant->tb[0].rv        = dci_ul->rv;
   pusch_grant->tb[0].mcs       = dci_ul->mcs;
   pusch_grant->tb[0].ndi       = dci_ul->ndi;
+  pusch_cfg->sch_cfg.mcs_table = pusch_hl_cfg->mcs_table;
 
   // 5.1.6.2 DM-RS reception procedure
   if (ra_ul_dmrs(pusch_hl_cfg, dci_ul, pusch_cfg) < SRSRAN_SUCCESS) {

srsue/src/stack/rrc/rrc_nr.cc

@@ -606,6 +606,23 @@ bool rrc_nr::apply_sp_cell_init_dl_pdcch(const asn1::rrc_nr::pdcch_cfg_s& pdcch_
 
 bool rrc_nr::apply_sp_cell_init_dl_pdsch(const asn1::rrc_nr::pdsch_cfg_s& pdsch_cfg)
 {
+  if (pdsch_cfg.mcs_table_present) {
+    switch (pdsch_cfg.mcs_table) {
+      case pdsch_cfg_s::mcs_table_opts::qam256:
+        phy_cfg.pdsch.mcs_table = srsran_mcs_table_256qam;
+        break;
+      case pdsch_cfg_s::mcs_table_opts::qam64_low_se:
+        phy_cfg.pdsch.mcs_table = srsran_mcs_table_qam64LowSE;
+        break;
+      case pdsch_cfg_s::mcs_table_opts::nulltype:
+        logger.warning("Warning while selecting pdsch mcs_table");
+        return false;
+    }
+  } else {
+    // If the field is absent the UE applies the value 64QAM.
+    phy_cfg.pdsch.mcs_table = srsran_mcs_table_64qam;
+  }
+
   if (pdsch_cfg.dmrs_dl_for_pdsch_map_type_a_present) {
     if (pdsch_cfg.dmrs_dl_for_pdsch_map_type_a.type() == setup_release_c<dmrs_dl_cfg_s>::types_opts::setup) {
       srsran_dmrs_sch_add_pos_t srsran_dmrs_sch_add_pos;
@@ -1016,6 +1033,23 @@ bool rrc_nr::apply_sp_cell_ded_ul_pucch(const asn1::rrc_nr::pucch_cfg_s& pucch_c
 
 bool rrc_nr::apply_sp_cell_ded_ul_pusch(const asn1::rrc_nr::pusch_cfg_s& pusch_cfg)
 {
+  if (pusch_cfg.mcs_table_present) {
+    switch (pusch_cfg.mcs_table) {
+      case pusch_cfg_s::mcs_table_opts::qam256:
+        phy_cfg.pusch.mcs_table = srsran_mcs_table_256qam;
+        break;
+      case pusch_cfg_s::mcs_table_opts::qam64_low_se:
+        phy_cfg.pusch.mcs_table = srsran_mcs_table_qam64LowSE;
+        break;
+      case pusch_cfg_s::mcs_table_opts::nulltype:
+        logger.warning("Warning while selecting pdsch mcs_table");
+        return false;
+    }
+  } else {
+    // If the field is absent the UE applies the value 64QAM.
+    phy_cfg.pusch.mcs_table = srsran_mcs_table_64qam;
+  }
+
   srsran_resource_alloc_t resource_alloc;
   if (make_phy_pusch_alloc_type(pusch_cfg, &resource_alloc) == true) {
     phy_cfg.pusch.alloc = resource_alloc;