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srsRAN_4G
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Fix CORESET0 related PDSCH resource allocation procedure

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master
Xavier Arteaga 3 years ago committed by Xavier Arteaga
parent 36207db615
commit cfe2b305a1
9 changed files with 54 additions and 26 deletions
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16
lib/include/srsran/phy/phch/dci_nr.h
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@ -111,12 +111,13 @@ typedef struct SRSRAN_API {
* @brief Describes the NR DCI search context * @brief Describes the NR DCI search context
*/ */
typedef struct SRSRAN_API { typedef struct SRSRAN_API {
srsran_dci_location_t location; ///< DCI location srsran_dci_location_t location; ///< DCI location
srsran_search_space_type_t ss_type; ///< Search space type srsran_search_space_type_t ss_type; ///< Search space type
uint32_t coreset_id; ///< CORESET identifier uint32_t coreset_id; ///< CORESET identifier
srsran_rnti_type_t rnti_type; ///< RNTI type uint32_t coreset_start_rb; ///< CORESET lowest RB index in the resource grid
srsran_dci_format_nr_t format; ///< DCI format srsran_rnti_type_t rnti_type; ///< RNTI type
uint16_t rnti; ///< UE temporal RNTI srsran_dci_format_nr_t format; ///< DCI format
uint16_t rnti; ///< UE temporal RNTI
} srsran_dci_ctx_t; } srsran_dci_ctx_t;
/** /**
@ -182,6 +183,9 @@ typedef struct SRSRAN_API {
uint32_t cbg_flush; ///< CBG flushing out information (CBGFI) uint32_t cbg_flush; ///< CBG flushing out information (CBGFI)
uint32_t dmrs_id; ///< DMRS sequence initialization uint32_t dmrs_id; ///< DMRS sequence initialization
// DL context from unpacking. Required for resource allocation
uint32_t coreset0_bw; ///< CORESET0 size used for frequency resource allocation
} srsran_dci_dl_nr_t; } srsran_dci_dl_nr_t;
/** /**

26
lib/src/common/phy_cfg_nr.cc
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@ -223,12 +223,13 @@ bool phy_cfg_nr_t::get_dci_ctx_pdsch_rnti_c(uint32_t ss_id,
const srsran_search_space_t& ss = pdcch.search_space[ss_id]; const srsran_search_space_t& ss = pdcch.search_space[ss_id];
// Fill context // Fill context
ctx.location = location; ctx.location = location;
ctx.ss_type = ss.type; ctx.ss_type = ss.type;
ctx.coreset_id = ss.coreset_id; ctx.coreset_id = ss.coreset_id;
ctx.rnti_type = srsran_rnti_type_c; ctx.coreset_start_rb = srsran_coreset_start_rb(&pdcch.coreset[ss.coreset_id]);
ctx.format = format; ctx.rnti_type = srsran_rnti_type_c;
ctx.rnti = rnti; ctx.format = format;
ctx.rnti = rnti;
return true; return true;
} }
@ -248,12 +249,13 @@ bool phy_cfg_nr_t::get_dci_ctx_pusch_rnti_c(uint32_t ss_id,
const srsran_search_space_t& ss = pdcch.search_space[ss_id]; const srsran_search_space_t& ss = pdcch.search_space[ss_id];
// Fill context // Fill context
ctx.location = location; ctx.location = location;
ctx.ss_type = ss.type; ctx.ss_type = ss.type;
ctx.coreset_id = ss.coreset_id; ctx.coreset_id = ss.coreset_id;
ctx.rnti_type = srsran_rnti_type_c; ctx.coreset_start_rb = srsran_coreset_start_rb(&pdcch.coreset[ss.coreset_id]);
ctx.format = format; ctx.rnti_type = srsran_rnti_type_c;
ctx.rnti = rnti; ctx.format = format;
ctx.rnti = rnti;
return true; return true;
} }

3
lib/src/phy/phch/dci_nr.c
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@ -1990,7 +1990,8 @@ int srsran_dci_nr_dl_unpack(const srsran_dci_nr_t* q, srsran_dci_msg_nr_t* msg,
} }
// Copy DCI MSG fields // Copy DCI MSG fields
dci->ctx = msg->ctx; dci->ctx = msg->ctx;
dci->coreset0_bw = q->cfg.coreset0_bw;
// Pack DCI // Pack DCI
switch (msg->ctx.format) { switch (msg->ctx.format) {

20
lib/src/phy/phch/ra_dl_nr.c
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@ -292,10 +292,26 @@ int srsran_ra_dl_nr_freq(const srsran_carrier_nr_t* carrier,
return SRSRAN_ERROR_INVALID_INPUTS; return SRSRAN_ERROR_INVALID_INPUTS;
} }
// For a PDSCH scheduled with a DCI format 1_0 in any type of PDCCH common search space, regardless of which
// bandwidth part is the active bandwidth part, RB numbering starts from the lowest RB of the CORESET in which the
// DCI was received; otherwise RB numbering starts from the lowest RB in the determined downlink bandwidth part.
uint32_t start_rb = 0;
if (dci_dl->ctx.format == srsran_dci_format_nr_1_0 && SRSRAN_SEARCH_SPACE_IS_COMMON(dci_dl->ctx.ss_type)) {
start_rb = dci_dl->ctx.coreset_start_rb;
}
// when DCI format 1_0 is decoded in any common search space in which case the size of CORESET 0 shall be used if
// CORESET 0 is configured for the cell and the size of initial DL bandwidth part shall be used if CORESET 0 is not
// configured for the cell.
uint32_t type1_bwp_sz = carrier->nof_prb;
if (SRSRAN_SEARCH_SPACE_IS_COMMON(dci_dl->ctx.ss_type) && dci_dl->coreset0_bw != 0) {
type1_bwp_sz = dci_dl->coreset0_bw;
}
// The UE shall assume that when the scheduling grant is received with DCI format 1_0 , then downlink resource // The UE shall assume that when the scheduling grant is received with DCI format 1_0 , then downlink resource
// allocation type 1 is used. // allocation type 1 is used.
if (dci_dl->ctx.format == srsran_dci_format_nr_1_0) { if (dci_dl->ctx.format == srsran_dci_format_nr_1_0) {
return ra_helper_freq_type1(carrier->nof_prb, dci_dl->freq_domain_assigment, grant); return ra_helper_freq_type1(type1_bwp_sz, start_rb, dci_dl->freq_domain_assigment, grant);
} }
// If the scheduling DCI is configured to indicate the downlink resource allocation type as part of the Frequency // If the scheduling DCI is configured to indicate the downlink resource allocation type as part of the Frequency
@ -309,7 +325,7 @@ int srsran_ra_dl_nr_freq(const srsran_carrier_nr_t* carrier,
// Otherwise the UE shall use the downlink frequency resource allocation type as defined by the higher layer parameter // Otherwise the UE shall use the downlink frequency resource allocation type as defined by the higher layer parameter
// resourceAllocation. // resourceAllocation.
if (cfg->alloc == srsran_resource_alloc_type1) { if (cfg->alloc == srsran_resource_alloc_type1) {
return ra_helper_freq_type1(carrier->nof_prb, dci_dl->freq_domain_assigment, grant); return ra_helper_freq_type1(type1_bwp_sz, start_rb, dci_dl->freq_domain_assigment, grant);
} }
if (cfg->alloc == srsran_resource_alloc_type0) { if (cfg->alloc == srsran_resource_alloc_type0) {

5
lib/src/phy/phch/ra_helper.h
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@ -61,7 +61,7 @@ static int ra_helper_freq_type0(const srsran_carrier_nr_t* carrier,
return 0; return 0;
} }
static int ra_helper_freq_type1(uint32_t N_bwp_size, uint32_t riv, srsran_sch_grant_nr_t* grant) static int ra_helper_freq_type1(uint32_t N_bwp_size, uint32_t start_rb, uint32_t riv, srsran_sch_grant_nr_t* grant)
{ {
uint32_t start = 0; uint32_t start = 0;
uint32_t len = 0; uint32_t len = 0;
@ -72,6 +72,9 @@ static int ra_helper_freq_type1(uint32_t N_bwp_size, uint32_t riv, srsran_sch_gr
return SRSRAN_ERROR; return SRSRAN_ERROR;
} }
// Apply numbering start
start += start_rb;
for (uint32_t i = 0; i < start; i++) { for (uint32_t i = 0; i < start; i++) {
grant->prb_idx[i] = false; grant->prb_idx[i] = false;
} }

6
lib/src/phy/phch/ra_ul_nr.c
Unescape Escape View File

@ -440,13 +440,13 @@ int srsran_ra_ul_nr_freq(const srsran_carrier_nr_t* carrier,
// TS 38.213 PUSCH scheduled by RAR UL grant // TS 38.213 PUSCH scheduled by RAR UL grant
if (dci_ul->ctx.format == srsran_dci_format_nr_rar) { if (dci_ul->ctx.format == srsran_dci_format_nr_rar) {
return ra_helper_freq_type1(carrier->nof_prb, dci_ul->freq_domain_assigment, grant); return ra_helper_freq_type1(carrier->nof_prb, 0, dci_ul->freq_domain_assigment, grant);
} }
// The UE shall assume that when the scheduling PDCCH is received with DCI format 0_0, then uplink resource // The UE shall assume that when the scheduling PDCCH is received with DCI format 0_0, then uplink resource
// allocation type 1 is used. // allocation type 1 is used.
if (dci_ul->ctx.format == srsran_dci_format_nr_0_0) { if (dci_ul->ctx.format == srsran_dci_format_nr_0_0) {
return ra_helper_freq_type1(carrier->nof_prb, dci_ul->freq_domain_assigment, grant); return ra_helper_freq_type1(carrier->nof_prb, 0, dci_ul->freq_domain_assigment, grant);
} }
// If the scheduling DCI is configured to indicate the uplink resource allocation type as part of the Frequency domain // If the scheduling DCI is configured to indicate the uplink resource allocation type as part of the Frequency domain
@ -459,7 +459,7 @@ int srsran_ra_ul_nr_freq(const srsran_carrier_nr_t* carrier,
// Otherwise the UE shall use the uplink frequency resource allocation type as defined by the higher layer parameter // Otherwise the UE shall use the uplink frequency resource allocation type as defined by the higher layer parameter
// resourceAllocation. // resourceAllocation.
if (cfg->alloc == srsran_resource_alloc_type1) { if (cfg->alloc == srsran_resource_alloc_type1) {
return ra_helper_freq_type1(carrier->nof_prb, dci_ul->freq_domain_assigment, grant); return ra_helper_freq_type1(carrier->nof_prb, 0, dci_ul->freq_domain_assigment, grant);
} }
if (cfg->alloc == srsran_resource_alloc_type0) { if (cfg->alloc == srsran_resource_alloc_type0) {

1
lib/src/phy/ue/ue_dl_nr.c
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@ -387,6 +387,7 @@ static int ue_dl_nr_find_dci_ss(srsran_ue_dl_nr_t* q,
ctx.location.ncce = candidates[ncce_idx]; ctx.location.ncce = candidates[ncce_idx];
ctx.ss_type = search_space->type; ctx.ss_type = search_space->type;
ctx.coreset_id = search_space->coreset_id; ctx.coreset_id = search_space->coreset_id;
ctx.coreset_start_rb = srsran_coreset_start_rb(&q->cfg.coreset[search_space->coreset_id]);
ctx.rnti_type = rnti_type; ctx.rnti_type = rnti_type;
ctx.rnti = rnti; ctx.rnti = rnti;
ctx.format = dci_format; ctx.format = dci_format;

1
lib/test/phy/phy_dl_nr_test.c
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@ -168,6 +168,7 @@ static int work_gnb_dl(srsran_gnb_dl_t* gnb_dl,
dci_dl.ctx.location = *dci_location; dci_dl.ctx.location = *dci_location;
dci_dl.ctx.ss_type = search_space->type; dci_dl.ctx.ss_type = search_space->type;
dci_dl.ctx.coreset_id = 1; dci_dl.ctx.coreset_id = 1;
dci_dl.ctx.coreset_start_rb = 0;
dci_dl.freq_domain_assigment = 0; dci_dl.freq_domain_assigment = 0;
dci_dl.time_domain_assigment = 0; dci_dl.time_domain_assigment = 0;
dci_dl.vrb_to_prb_mapping = 0; dci_dl.vrb_to_prb_mapping = 0;

2
srsenb/src/stack/mac/nr/sched_nr_grant_allocator.cc
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@ -343,4 +343,4 @@ alloc_result bwp_slot_allocator::verify_pusch_space(bwp_slot_grid& pusch_grid, b
} }
} // namespace sched_nr_impl } // namespace sched_nr_impl
} // namespace srsenb } // namespace srsenb

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