sched,feature: Enable setting the target PHR below which the maximum UL grant size starts decreasing

master
Francisco 4 years ago committed by Francisco Paisana
parent 486823e5de
commit ceaef3523f

@ -61,6 +61,7 @@ struct cell_cfg_t {
int target_pusch_sinr_db; int target_pusch_sinr_db;
uint32_t initial_dl_cqi; uint32_t initial_dl_cqi;
bool enable_phr_handling; bool enable_phr_handling;
int min_phr_thres;
asn1::rrc::mob_ctrl_info_s::t304_e_ t304; asn1::rrc::mob_ctrl_info_s::t304_e_ t304;
std::vector<scell_cfg_t> scell_list; std::vector<scell_cfg_t> scell_list;
rrc_meas_cfg_t meas_cfg; rrc_meas_cfg_t meas_cfg;

@ -80,6 +80,7 @@ public:
/* pusch configuration */ /* pusch configuration */
srsran_pusch_hopping_cfg_t pusch_hopping_cfg; srsran_pusch_hopping_cfg_t pusch_hopping_cfg;
float target_pusch_ul_sinr; float target_pusch_ul_sinr;
int min_phr_thres;
bool enable_phr_handling; bool enable_phr_handling;
bool enable_64qam; bool enable_64qam;

@ -40,6 +40,7 @@ public:
float target_pucch_snr_dB_ = -1.0, float target_pucch_snr_dB_ = -1.0,
float target_pusch_sn_dB_ = -1.0, float target_pusch_sn_dB_ = -1.0,
bool phr_handling_flag_ = false, bool phr_handling_flag_ = false,
int min_phr_thres_ = 0,
uint32_t min_tpc_tti_interval_ = 1, uint32_t min_tpc_tti_interval_ = 1,
float ul_snr_avg_alpha = 0.05, float ul_snr_avg_alpha = 0.05,
int init_ul_snr_value = 5) : int init_ul_snr_value = 5) :
@ -47,6 +48,7 @@ public:
nof_prb(cell_nof_prb), nof_prb(cell_nof_prb),
target_pucch_snr_dB(target_pucch_snr_dB_), target_pucch_snr_dB(target_pucch_snr_dB_),
target_pusch_snr_dB(target_pusch_sn_dB_), target_pusch_snr_dB(target_pusch_sn_dB_),
min_phr_thres(min_phr_thres_),
snr_estim_list( snr_estim_list(
{ul_ch_snr_estim{ul_snr_avg_alpha, init_ul_snr_value}, ul_ch_snr_estim{ul_snr_avg_alpha, init_ul_snr_value}}), {ul_ch_snr_estim{ul_snr_avg_alpha, init_ul_snr_value}, ul_ch_snr_estim{ul_snr_avg_alpha, init_ul_snr_value}}),
phr_handling_flag(phr_handling_flag_), phr_handling_flag(phr_handling_flag_),
@ -83,7 +85,7 @@ public:
max_prbs_cached = PHR_NEG_NOF_PRB; max_prbs_cached = PHR_NEG_NOF_PRB;
int phr_x_prb = std::roundf(last_phr + 10.0F * log10f(grant_nof_prbs)); // get what the PHR would be if Nprb=1 int phr_x_prb = std::roundf(last_phr + 10.0F * log10f(grant_nof_prbs)); // get what the PHR would be if Nprb=1
for (int n = nof_prb; n > PHR_NEG_NOF_PRB; --n) { for (int n = nof_prb; n > PHR_NEG_NOF_PRB; --n) {
if (phr_x_prb >= 10 * log10f(n)) { if (phr_x_prb >= 10 * log10f(n) + min_phr_thres) {
max_prbs_cached = n; max_prbs_cached = n;
break; break;
} }
@ -193,6 +195,7 @@ private:
uint32_t nof_prb; uint32_t nof_prb;
uint32_t min_tpc_tti_interval = 1; uint32_t min_tpc_tti_interval = 1;
float target_pucch_snr_dB, target_pusch_snr_dB; float target_pucch_snr_dB, target_pusch_snr_dB;
int min_phr_thres;
bool phr_handling_flag; bool phr_handling_flag;
srslog::basic_logger& logger; srslog::basic_logger& logger;

@ -65,6 +65,8 @@ cell_list =
//meas_gap_offset_subframe = [6, 12, 18, 24, 30]; //meas_gap_offset_subframe = [6, 12, 18, 24, 30];
// target_pusch_sinr = -1; // target_pusch_sinr = -1;
// target_pucch_sinr = -1; // target_pucch_sinr = -1;
// enable_phr_handling = false;
// min_phr_thres = 0;
// allowed_meas_bw = 6; // allowed_meas_bw = 6;
// t304 = 2000; // in msec. possible values: 50, 100, 150, 200, 500, 1000, 2000 // t304 = 2000; // in msec. possible values: 50, 100, 150, 200, 500, 1000, 2000

@ -771,6 +771,7 @@ static int parse_cell_list(all_args_t* args, rrc_cfg_t* rrc_cfg, Setting& root)
HANDLEPARSERCODE(parse_default_field(cell_cfg.target_pusch_sinr_db, cellroot, "target_pusch_sinr", -1)); HANDLEPARSERCODE(parse_default_field(cell_cfg.target_pusch_sinr_db, cellroot, "target_pusch_sinr", -1));
HANDLEPARSERCODE(parse_default_field(cell_cfg.target_pucch_sinr_db, cellroot, "target_pucch_sinr", -1)); HANDLEPARSERCODE(parse_default_field(cell_cfg.target_pucch_sinr_db, cellroot, "target_pucch_sinr", -1));
HANDLEPARSERCODE(parse_default_field(cell_cfg.enable_phr_handling, cellroot, "enable_phr_handling", false)); HANDLEPARSERCODE(parse_default_field(cell_cfg.enable_phr_handling, cellroot, "enable_phr_handling", false));
HANDLEPARSERCODE(parse_default_field(cell_cfg.min_phr_thres, cellroot, "min_phr_thres", 0));
parse_default_field(cell_cfg.meas_cfg.allowed_meas_bw, cellroot, "allowed_meas_bw", 6u); parse_default_field(cell_cfg.meas_cfg.allowed_meas_bw, cellroot, "allowed_meas_bw", 6u);
srsran_assert(srsran::is_lte_cell_nof_prb(cell_cfg.meas_cfg.allowed_meas_bw), "Invalid measurement Bandwidth"); srsran_assert(srsran::is_lte_cell_nof_prb(cell_cfg.meas_cfg.allowed_meas_bw), "Invalid measurement Bandwidth");
HANDLEPARSERCODE(asn1_parsers::default_number_to_enum( HANDLEPARSERCODE(asn1_parsers::default_number_to_enum(

@ -40,6 +40,7 @@ sched_ue_cell::sched_ue_cell(uint16_t rnti_, const sched_cell_params_t& cell_cfg
cell_cfg->cfg.target_pucch_ul_sinr, cell_cfg->cfg.target_pucch_ul_sinr,
cell_cfg->cfg.target_pusch_ul_sinr, cell_cfg->cfg.target_pusch_ul_sinr,
cell_cfg->cfg.enable_phr_handling, cell_cfg->cfg.enable_phr_handling,
cell_cfg->cfg.min_phr_thres,
cell_cfg->sched_cfg->min_tpc_tti_interval, cell_cfg->sched_cfg->min_tpc_tti_interval,
cell_cfg->sched_cfg->ul_snr_avg_alpha, cell_cfg->sched_cfg->ul_snr_avg_alpha,
cell_cfg->sched_cfg->init_ul_snr_value), cell_cfg->sched_cfg->init_ul_snr_value),

@ -635,6 +635,7 @@ void rrc::config_mac()
item.target_pucch_ul_sinr = cfg.cell_list[ccidx].target_pucch_sinr_db; item.target_pucch_ul_sinr = cfg.cell_list[ccidx].target_pucch_sinr_db;
item.target_pusch_ul_sinr = cfg.cell_list[ccidx].target_pusch_sinr_db; item.target_pusch_ul_sinr = cfg.cell_list[ccidx].target_pusch_sinr_db;
item.enable_phr_handling = cfg.cell_list[ccidx].enable_phr_handling; item.enable_phr_handling = cfg.cell_list[ccidx].enable_phr_handling;
item.min_phr_thres = cfg.cell_list[ccidx].min_phr_thres;
item.delta_pucch_shift = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.delta_pucch_shift.to_number(); item.delta_pucch_shift = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.delta_pucch_shift.to_number();
item.ncs_an = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.ncs_an; item.ncs_an = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.ncs_an;
item.n1pucch_an = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.n1_pucch_an; item.n1pucch_an = cfg.sibs[1].sib2().rr_cfg_common.pucch_cfg_common.n1_pucch_an;

@ -274,6 +274,7 @@ sched_sim_events rand_sim_params(uint32_t nof_ttis)
sim_gen.sim_args.cell_cfg[0].target_pucch_ul_sinr = pick_random_uniform({10, 15, 20, -1}); sim_gen.sim_args.cell_cfg[0].target_pucch_ul_sinr = pick_random_uniform({10, 15, 20, -1});
sim_gen.sim_args.cell_cfg[0].target_pusch_ul_sinr = pick_random_uniform({10, 15, 20, -1}); sim_gen.sim_args.cell_cfg[0].target_pusch_ul_sinr = pick_random_uniform({10, 15, 20, -1});
sim_gen.sim_args.cell_cfg[0].enable_phr_handling = false; sim_gen.sim_args.cell_cfg[0].enable_phr_handling = false;
sim_gen.sim_args.cell_cfg[0].min_phr_thres = 0;
sim_gen.sim_args.default_ue_sim_cfg.ue_cfg = generate_default_ue_cfg(); sim_gen.sim_args.default_ue_sim_cfg.ue_cfg = generate_default_ue_cfg();
sim_gen.sim_args.default_ue_sim_cfg.periodic_cqi = true; sim_gen.sim_args.default_ue_sim_cfg.periodic_cqi = true;
sim_gen.sim_args.default_ue_sim_cfg.ue_cfg.maxharq_tx = std::uniform_int_distribution<>{1, 5}(srsenb::get_rand_gen()); sim_gen.sim_args.default_ue_sim_cfg.ue_cfg.maxharq_tx = std::uniform_int_distribution<>{1, 5}(srsenb::get_rand_gen());

@ -52,6 +52,8 @@ inline srsenb::sched_interface::cell_cfg_t generate_default_cell_cfg(uint32_t no
cell_cfg.initial_dl_cqi = 6; cell_cfg.initial_dl_cqi = 6;
cell_cfg.target_pusch_ul_sinr = -1; cell_cfg.target_pusch_ul_sinr = -1;
cell_cfg.target_pucch_ul_sinr = -1; cell_cfg.target_pucch_ul_sinr = -1;
cell_cfg.enable_phr_handling = false;
cell_cfg.min_phr_thres = 0;
cell_cfg.nrb_cqi = 1; cell_cfg.nrb_cqi = 1;
cell_cfg.n1pucch_an = 12; cell_cfg.n1pucch_an = 12;
cell_cfg.delta_pucch_shift = 1; cell_cfg.delta_pucch_shift = 1;

@ -28,6 +28,7 @@ void test_neg_phr_scenario()
sched_interface::cell_cfg_t cell_cfg = generate_default_cell_cfg(50); sched_interface::cell_cfg_t cell_cfg = generate_default_cell_cfg(50);
cell_cfg.target_pucch_ul_sinr = 20; cell_cfg.target_pucch_ul_sinr = 20;
cell_cfg.target_pusch_ul_sinr = 20; cell_cfg.target_pusch_ul_sinr = 20;
cell_cfg.min_phr_thres = 0;
cell_cfg.enable_phr_handling = true; cell_cfg.enable_phr_handling = true;
sched_interface::sched_args_t sched_cfg = {}; sched_interface::sched_args_t sched_cfg = {};
sched_cell_params_t cell_params; sched_cell_params_t cell_params;
@ -37,11 +38,14 @@ void test_neg_phr_scenario()
sched_ue_cell ue_cc(0x46, cell_params, tti_point(0)); sched_ue_cell ue_cc(0x46, cell_params, tti_point(0));
ue_cc.set_ue_cfg(ue_cfg); ue_cc.set_ue_cfg(ue_cfg);
float snr = 0; float snr = 20;
ue_cc.set_ul_snr(tti_point(0), snr, 0); tti_point tti{0};
ue_cc.set_ul_snr(tti_point(0), snr, 1); for (; ue_cc.tpc_fsm.get_ul_snr_estim(0) < snr - 2; ++tti) {
ue_cc.set_ul_snr(tti, snr, 0);
ue_cc.set_ul_snr(tti, snr, 1);
ue_cc.tpc_fsm.set_phr(-5, 1); ue_cc.tpc_fsm.set_phr(-5, 1);
ue_cc.new_tti(tti_point(0)); ue_cc.new_tti(tti);
}
uint32_t req_bytes = 10000; uint32_t req_bytes = 10000;
uint32_t pending_prbs = get_required_prb_ul(ue_cc, req_bytes); uint32_t pending_prbs = get_required_prb_ul(ue_cc, req_bytes);

Loading…
Cancel
Save