rrc,nr: make gnb cell CSI NZP configuration consistent with UE NSA configuration.

master
Francisco Paisana 3 years ago
parent 410cec7557
commit b58915d7ed

@ -56,6 +56,7 @@ struct nzp_csi_rs_res_s;
struct pdsch_serving_cell_cfg_s; struct pdsch_serving_cell_cfg_s;
struct freq_info_dl_s; struct freq_info_dl_s;
struct serving_cell_cfg_common_s; struct serving_cell_cfg_common_s;
struct serving_cell_cfg_s;
} // namespace rrc_nr } // namespace rrc_nr
} // namespace asn1 } // namespace asn1
@ -113,6 +114,7 @@ bool make_phy_carrier_cfg(const asn1::rrc_nr::freq_info_dl_s& freq_info_dl, srsr
bool make_phy_ssb_cfg(const srsran_carrier_nr_t& carrier, bool make_phy_ssb_cfg(const srsran_carrier_nr_t& carrier,
const asn1::rrc_nr::serving_cell_cfg_common_s& serv_cell_cfg, const asn1::rrc_nr::serving_cell_cfg_common_s& serv_cell_cfg,
phy_cfg_nr_t::ssb_cfg_t* ssb); phy_cfg_nr_t::ssb_cfg_t* ssb);
bool make_pdsch_cfg_from_serv_cell(asn1::rrc_nr::serving_cell_cfg_s& serv_cell, srsran_sch_hl_cfg_nr_t* sch_hl);
/*************************** /***************************
* MAC Config * MAC Config

@ -1475,6 +1475,46 @@ bool make_phy_ssb_cfg(const srsran_carrier_nr_t& carrier,
return true; return true;
} }
bool make_pdsch_cfg_from_serv_cell(asn1::rrc_nr::serving_cell_cfg_s& serv_cell, srsran_sch_hl_cfg_nr_t* sch_hl)
{
if (serv_cell.csi_meas_cfg_present and
serv_cell.csi_meas_cfg.type().value ==
setup_release_c< ::asn1::rrc_nr::csi_meas_cfg_s>::types_opts::options::setup) {
auto& setup = serv_cell.csi_meas_cfg.setup();
if (setup.nzp_csi_rs_res_set_to_add_mod_list_present) {
for (auto& nzp_set : setup.nzp_csi_rs_res_set_to_add_mod_list) {
auto& uecfg_set = sch_hl->nzp_csi_rs_sets[nzp_set.nzp_csi_res_set_id];
uecfg_set.trs_info = nzp_set.trs_info_present;
uecfg_set.count = nzp_set.nzp_csi_rs_res.size();
for (uint8_t nzp_rs_idx : nzp_set.nzp_csi_rs_res) {
auto& res = uecfg_set.data[nzp_rs_idx];
if (not srsran::make_phy_nzp_csi_rs_resource(setup.nzp_csi_rs_res_to_add_mod_list[nzp_rs_idx], &res)) {
return false;
}
}
}
}
}
if (serv_cell.init_dl_bwp.pdsch_cfg_present and
serv_cell.init_dl_bwp.pdsch_cfg.type() == setup_release_c<pdsch_cfg_s>::types_opts::setup) {
const auto& setup = serv_cell.init_dl_bwp.pdsch_cfg.setup();
if (setup.p_zp_csi_rs_res_set_present) {
auto& setup_set = setup.p_zp_csi_rs_res_set.setup();
sch_hl->p_zp_csi_rs_set.count = setup_set.zp_csi_rs_res_id_list.size();
for (uint8_t zp_res_id : setup_set.zp_csi_rs_res_id_list) {
const asn1::rrc_nr::zp_csi_rs_res_s& setup_res = setup.zp_csi_rs_res_to_add_mod_list[zp_res_id];
auto& res = sch_hl->p_zp_csi_rs_set.data[zp_res_id];
if (not srsran::make_phy_zp_csi_rs_resource(setup_res, &res)) {
return false;
}
}
}
}
return true;
}
} // namespace srsran } // namespace srsran
namespace srsenb { namespace srsenb {

@ -30,8 +30,8 @@
#include "srsenb/hdr/phy/enb_phy_base.h" #include "srsenb/hdr/phy/enb_phy_base.h"
#include "srsenb/hdr/stack/enb_stack_base.h" #include "srsenb/hdr/stack/enb_stack_base.h"
#include "srsenb/hdr/stack/rrc/nr/rrc_config_nr.h"
#include "srsenb/hdr/stack/rrc/rrc_config.h" #include "srsenb/hdr/stack/rrc/rrc_config.h"
#include "srsenb/hdr/stack/rrc/rrc_config_nr.h"
#include "srsenb/hdr/stack/mac/sched_interface.h" #include "srsenb/hdr/stack/mac/sched_interface.h"
#include "srsran/common/bcd_helpers.h" #include "srsran/common/bcd_helpers.h"

@ -0,0 +1,25 @@
/**
*
* \section COPYRIGHT
*
* Copyright 2013-2021 Software Radio Systems Limited
*
* By using this file, you agree to the terms and conditions set
* forth in the LICENSE file which can be found at the top level of
* the distribution.
*
*/
#ifndef SRSRAN_CELL_ASN1_CONFIG_H
#define SRSRAN_CELL_ASN1_CONFIG_H
#include "rrc_config_nr.h"
#include "srsran/asn1/rrc_nr.h"
namespace srsenb {
int fill_serv_cell_from_enb_cfg(const rrc_nr_cfg_t& cfg, asn1::rrc_nr::serving_cell_cfg_s& serv_cell);
}
#endif // SRSRAN_CELL_ASN1_CONFIG_H

@ -13,6 +13,7 @@
#ifndef SRSRAN_RRC_CONFIG_NR_H #ifndef SRSRAN_RRC_CONFIG_NR_H
#define SRSRAN_RRC_CONFIG_NR_H #define SRSRAN_RRC_CONFIG_NR_H
#include "../rrc_config_common.h"
#include "srsran/asn1/rrc_nr.h" #include "srsran/asn1/rrc_nr.h"
#include "srsran/interfaces/gnb_rrc_nr_interfaces.h" #include "srsran/interfaces/gnb_rrc_nr_interfaces.h"
#include "srsue/hdr/phy/phy_common.h" #include "srsue/hdr/phy/phy_common.h"

@ -14,9 +14,9 @@
#define SRSENB_RRC_NR_H #define SRSENB_RRC_NR_H
#include "rrc_config_common.h" #include "rrc_config_common.h"
#include "rrc_config_nr.h"
#include "rrc_metrics.h" #include "rrc_metrics.h"
#include "srsenb/hdr/stack/enb_stack_base.h" #include "srsenb/hdr/stack/enb_stack_base.h"
#include "srsenb/hdr/stack/rrc/nr/rrc_config_nr.h"
#include "srsran/asn1/rrc_nr.h" #include "srsran/asn1/rrc_nr.h"
#include "srsran/common/block_queue.h" #include "srsran/common/block_queue.h"
#include "srsran/common/buffer_pool.h" #include "srsran/common/buffer_pool.h"
@ -148,10 +148,6 @@ public:
int pack_sp_cell_cfg_ded_csi_meas_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack); int pack_sp_cell_cfg_ded_csi_meas_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);
int pack_sp_cell_cfg_ded_csi_meas_cfg_csi_report_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack); int pack_sp_cell_cfg_ded_csi_meas_cfg_csi_report_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);
int pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_to_add_mod_list(
asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);
int pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_set_to_add_mod_list(
asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);
int pack_recfg_with_sync(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack); int pack_recfg_with_sync(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);
int pack_recfg_with_sync_sp_cell_cfg_common(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack); int pack_recfg_with_sync_sp_cell_cfg_common(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack);

@ -21,8 +21,8 @@
#include <string.h> #include <string.h>
#include <string> #include <string>
#include "srsenb/hdr/stack/rrc/nr/rrc_config_nr.h"
#include "srsenb/hdr/stack/rrc/rrc.h" #include "srsenb/hdr/stack/rrc/rrc.h"
#include "srsenb/hdr/stack/rrc/rrc_config_nr.h"
#include "srsran/asn1/asn1_utils.h" #include "srsran/asn1/asn1_utils.h"
namespace srsenb { namespace srsenb {

@ -9,5 +9,5 @@
set(SOURCES rrc.cc rrc_ue.cc rrc_mobility.cc rrc_cell_cfg.cc rrc_bearer_cfg.cc mac_controller.cc ue_rr_cfg.cc ue_meas_cfg.cc rrc_endc.cc) set(SOURCES rrc.cc rrc_ue.cc rrc_mobility.cc rrc_cell_cfg.cc rrc_bearer_cfg.cc mac_controller.cc ue_rr_cfg.cc ue_meas_cfg.cc rrc_endc.cc)
add_library(srsenb_rrc STATIC ${SOURCES}) add_library(srsenb_rrc STATIC ${SOURCES})
set(SOURCES rrc_nr.cc) set(SOURCES rrc_nr.cc nr/cell_asn1_config.cc)
add_library(srsgnb_rrc STATIC ${SOURCES}) add_library(srsgnb_rrc STATIC ${SOURCES})

@ -0,0 +1,176 @@
/**
*
* \section COPYRIGHT
*
* Copyright 2013-2021 Software Radio Systems Limited
*
* By using this file, you agree to the terms and conditions set
* forth in the LICENSE file which can be found at the top level of
* the distribution.
*
*/
#include "srsenb/hdr/stack/rrc/nr/cell_asn1_config.h"
using namespace asn1::rrc_nr;
namespace srsenb {
int fill_csi_meas_from_enb_cfg(const rrc_nr_cfg_t& cfg, csi_meas_cfg_s& csi_meas_cfg)
{
// Fill NZP-CSI Resources
csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list_present = true;
if (cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD) {
csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list.resize(5);
auto& nzp_csi_res = csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list;
// item 0
nzp_csi_res[0].nzp_csi_rs_res_id = 0;
nzp_csi_res[0].res_map.freq_domain_alloc.set_row2();
nzp_csi_res[0].res_map.freq_domain_alloc.row2().from_number(0b100000000000);
nzp_csi_res[0].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[0].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[0].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[0].res_map.density.set_one();
nzp_csi_res[0].res_map.freq_band.start_rb = 0;
nzp_csi_res[0].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[0].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[0].scrambling_id = cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[0].periodicity_and_offset_present = true;
nzp_csi_res[0].periodicity_and_offset.set_slots80();
nzp_csi_res[0].periodicity_and_offset.slots80() = 1;
// optional
nzp_csi_res[0].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[0].qcl_info_periodic_csi_rs = 0;
// item 1
nzp_csi_res[1].nzp_csi_rs_res_id = 1;
nzp_csi_res[1].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[1].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[1].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[1].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[1].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[1].res_map.density.set_three();
nzp_csi_res[1].res_map.freq_band.start_rb = 0;
nzp_csi_res[1].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[1].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[1].scrambling_id = cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[1].periodicity_and_offset_present = true;
nzp_csi_res[1].periodicity_and_offset.set_slots40();
nzp_csi_res[1].periodicity_and_offset.slots40() = 11;
// optional
nzp_csi_res[1].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[1].qcl_info_periodic_csi_rs = 0;
// item 2
nzp_csi_res[2].nzp_csi_rs_res_id = 2;
nzp_csi_res[2].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[2].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[2].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[2].res_map.first_ofdm_symbol_in_time_domain = 8;
nzp_csi_res[2].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[2].res_map.density.set_three();
nzp_csi_res[2].res_map.freq_band.start_rb = 0;
nzp_csi_res[2].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[2].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[2].scrambling_id = cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[2].periodicity_and_offset_present = true;
nzp_csi_res[2].periodicity_and_offset.set_slots40();
nzp_csi_res[2].periodicity_and_offset.slots40() = 11;
// optional
nzp_csi_res[2].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[2].qcl_info_periodic_csi_rs = 0;
// item 3
nzp_csi_res[3].nzp_csi_rs_res_id = 3;
nzp_csi_res[3].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[3].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[3].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[3].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[3].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[3].res_map.density.set_three();
nzp_csi_res[3].res_map.freq_band.start_rb = 0;
nzp_csi_res[3].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[3].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[3].scrambling_id = cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[3].periodicity_and_offset_present = true;
nzp_csi_res[3].periodicity_and_offset.set_slots40();
nzp_csi_res[3].periodicity_and_offset.slots40() = 12;
// optional
nzp_csi_res[3].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[3].qcl_info_periodic_csi_rs = 0;
// item 4
nzp_csi_res[4].nzp_csi_rs_res_id = 4;
nzp_csi_res[4].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[4].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[4].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[4].res_map.first_ofdm_symbol_in_time_domain = 8;
nzp_csi_res[4].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[4].res_map.density.set_three();
nzp_csi_res[4].res_map.freq_band.start_rb = 0;
nzp_csi_res[4].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[4].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[4].scrambling_id = cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[4].periodicity_and_offset_present = true;
nzp_csi_res[4].periodicity_and_offset.set_slots40();
nzp_csi_res[4].periodicity_and_offset.slots40() = 12;
// optional
nzp_csi_res[4].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[4].qcl_info_periodic_csi_rs = 0;
} else {
csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list.resize(1);
auto& nzp_csi_res = csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list;
nzp_csi_res[0].nzp_csi_rs_res_id = 0;
nzp_csi_res[0].res_map.freq_domain_alloc.set_row2();
nzp_csi_res[0].res_map.freq_domain_alloc.row2().from_number(0b100000000000);
nzp_csi_res[0].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[0].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[0].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[0].res_map.density.set_one();
nzp_csi_res[0].res_map.freq_band.start_rb = 0;
nzp_csi_res[0].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[0].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[0].periodicity_and_offset_present = true;
nzp_csi_res[0].periodicity_and_offset.set_slots80() = 0;
// optional
nzp_csi_res[0].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[0].qcl_info_periodic_csi_rs = 0;
}
// Fill NZP-CSI Resource Sets
csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list_present = true;
if (cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD) {
csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list.resize(2);
auto& nzp_csi_res_set = csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list;
// item 0
nzp_csi_res_set[0].nzp_csi_res_set_id = 0;
nzp_csi_res_set[0].nzp_csi_rs_res.resize(1);
nzp_csi_res_set[0].nzp_csi_rs_res[0] = 0;
// item 1
nzp_csi_res_set[1].nzp_csi_res_set_id = 1;
nzp_csi_res_set[1].nzp_csi_rs_res.resize(4);
nzp_csi_res_set[1].nzp_csi_rs_res[0] = 1;
nzp_csi_res_set[1].nzp_csi_rs_res[1] = 2;
nzp_csi_res_set[1].nzp_csi_rs_res[2] = 3;
nzp_csi_res_set[1].nzp_csi_rs_res[3] = 4;
// Skip TRS info
} else {
csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list.resize(1);
auto& nzp_csi_res_set = csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list;
nzp_csi_res_set[0].nzp_csi_res_set_id = 0;
nzp_csi_res_set[0].nzp_csi_rs_res.resize(1);
nzp_csi_res_set[0].nzp_csi_rs_res[0] = 0;
// Skip TRS info
}
return SRSRAN_SUCCESS;
}
int fill_serv_cell_from_enb_cfg(const rrc_nr_cfg_t& cfg, serving_cell_cfg_s& serv_cell)
{
serv_cell.csi_meas_cfg_present = true;
return fill_csi_meas_from_enb_cfg(cfg, serv_cell.csi_meas_cfg.set_setup());
}
} // namespace srsenb

@ -12,6 +12,7 @@
#include "srsenb/hdr/stack/rrc/rrc_nr.h" #include "srsenb/hdr/stack/rrc/rrc_nr.h"
#include "srsenb/hdr/common/common_enb.h" #include "srsenb/hdr/common/common_enb.h"
#include "srsenb/hdr/stack/rrc/nr/cell_asn1_config.h"
#include "srsenb/test/mac/nr/sched_nr_cfg_generators.h" #include "srsenb/test/mac/nr/sched_nr_cfg_generators.h"
#include "srsran/asn1/rrc_nr_utils.h" #include "srsran/asn1/rrc_nr_utils.h"
#include "srsran/common/common_nr.h" #include "srsran/common/common_nr.h"
@ -240,6 +241,13 @@ void rrc_nr::config_mac()
// Fill MAC scheduler configuration for SIBs // Fill MAC scheduler configuration for SIBs
// TODO: use parsed cell NR cfg configuration // TODO: use parsed cell NR cfg configuration
std::vector<srsenb::sched_nr_interface::cell_cfg_t> sched_cells_cfg = {srsenb::get_default_cells_cfg(1)}; std::vector<srsenb::sched_nr_interface::cell_cfg_t> sched_cells_cfg = {srsenb::get_default_cells_cfg(1)};
sched_nr_interface::cell_cfg_t& cell = sched_cells_cfg[0];
asn1::rrc_nr::serving_cell_cfg_s serv_cell;
int ret = fill_serv_cell_from_enb_cfg(cfg, serv_cell);
srsran_assert(ret == SRSRAN_SUCCESS, "Failed to configure cell");
bool ret2 = srsran::make_pdsch_cfg_from_serv_cell(serv_cell, &cell.bwps[0].pdsch);
srsran_assert(ret2, "Failed to configure cell");
// FIXME: entire SI configuration, etc needs to be ported to NR // FIXME: entire SI configuration, etc needs to be ported to NR
sched_interface::cell_cfg_t cell_cfg; sched_interface::cell_cfg_t cell_cfg;
@ -916,168 +924,6 @@ int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg_csi_report_cfg(asn1::rrc_nr::c
return SRSRAN_SUCCESS; return SRSRAN_SUCCESS;
} }
int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_to_add_mod_list(
asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack)
{
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_to_add_mod_list_present = true;
if (parent->cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD) {
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_to_add_mod_list.resize(5);
auto& nzp_csi_res =
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_to_add_mod_list;
// item 0
nzp_csi_res[0].nzp_csi_rs_res_id = 0;
nzp_csi_res[0].res_map.freq_domain_alloc.set_row2();
nzp_csi_res[0].res_map.freq_domain_alloc.row2().from_number(0b100000000000);
nzp_csi_res[0].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[0].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[0].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[0].res_map.density.set_one();
nzp_csi_res[0].res_map.freq_band.start_rb = 0;
nzp_csi_res[0].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[0].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[0].scrambling_id = parent->cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[0].periodicity_and_offset_present = true;
nzp_csi_res[0].periodicity_and_offset.set_slots80();
nzp_csi_res[0].periodicity_and_offset.slots80() = 1;
// optional
nzp_csi_res[0].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[0].qcl_info_periodic_csi_rs = 0;
// item 1
nzp_csi_res[1].nzp_csi_rs_res_id = 1;
nzp_csi_res[1].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[1].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[1].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[1].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[1].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[1].res_map.density.set_three();
nzp_csi_res[1].res_map.freq_band.start_rb = 0;
nzp_csi_res[1].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[1].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[1].scrambling_id = parent->cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[1].periodicity_and_offset_present = true;
nzp_csi_res[1].periodicity_and_offset.set_slots40();
nzp_csi_res[1].periodicity_and_offset.slots40() = 11;
// optional
nzp_csi_res[1].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[1].qcl_info_periodic_csi_rs = 0;
// item 2
nzp_csi_res[2].nzp_csi_rs_res_id = 2;
nzp_csi_res[2].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[2].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[2].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[2].res_map.first_ofdm_symbol_in_time_domain = 8;
nzp_csi_res[2].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[2].res_map.density.set_three();
nzp_csi_res[2].res_map.freq_band.start_rb = 0;
nzp_csi_res[2].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[2].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[2].scrambling_id = parent->cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[2].periodicity_and_offset_present = true;
nzp_csi_res[2].periodicity_and_offset.set_slots40();
nzp_csi_res[2].periodicity_and_offset.slots40() = 11;
// optional
nzp_csi_res[2].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[2].qcl_info_periodic_csi_rs = 0;
// item 3
nzp_csi_res[3].nzp_csi_rs_res_id = 3;
nzp_csi_res[3].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[3].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[3].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[3].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[3].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[3].res_map.density.set_three();
nzp_csi_res[3].res_map.freq_band.start_rb = 0;
nzp_csi_res[3].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[3].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[3].scrambling_id = parent->cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[3].periodicity_and_offset_present = true;
nzp_csi_res[3].periodicity_and_offset.set_slots40();
nzp_csi_res[3].periodicity_and_offset.slots40() = 12;
// optional
nzp_csi_res[3].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[3].qcl_info_periodic_csi_rs = 0;
// item 4
nzp_csi_res[4].nzp_csi_rs_res_id = 4;
nzp_csi_res[4].res_map.freq_domain_alloc.set_row1();
nzp_csi_res[4].res_map.freq_domain_alloc.row1().from_number(0b0001);
nzp_csi_res[4].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[4].res_map.first_ofdm_symbol_in_time_domain = 8;
nzp_csi_res[4].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[4].res_map.density.set_three();
nzp_csi_res[4].res_map.freq_band.start_rb = 0;
nzp_csi_res[4].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[4].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[4].scrambling_id = parent->cfg.cell_list[0].phy_cell.cell_id;
nzp_csi_res[4].periodicity_and_offset_present = true;
nzp_csi_res[4].periodicity_and_offset.set_slots40();
nzp_csi_res[4].periodicity_and_offset.slots40() = 12;
// optional
nzp_csi_res[4].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[4].qcl_info_periodic_csi_rs = 0;
} else {
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_to_add_mod_list.resize(1);
auto& nzp_csi_res =
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_to_add_mod_list;
nzp_csi_res[0].nzp_csi_rs_res_id = 0;
nzp_csi_res[0].res_map.freq_domain_alloc.set_row2();
nzp_csi_res[0].res_map.freq_domain_alloc.row2().from_number(0b100000000000);
nzp_csi_res[0].res_map.nrof_ports = asn1::rrc_nr::csi_rs_res_map_s::nrof_ports_opts::p1;
nzp_csi_res[0].res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_res[0].res_map.cdm_type = asn1::rrc_nr::csi_rs_res_map_s::cdm_type_opts::no_cdm;
nzp_csi_res[0].res_map.density.set_one();
nzp_csi_res[0].res_map.freq_band.start_rb = 0;
nzp_csi_res[0].res_map.freq_band.nrof_rbs = 52;
nzp_csi_res[0].pwr_ctrl_offset = 0;
// Skip pwr_ctrl_offset_ss_present
nzp_csi_res[0].periodicity_and_offset.set_slots80() = 0;
// optional
nzp_csi_res[0].qcl_info_periodic_csi_rs_present = true;
nzp_csi_res[0].qcl_info_periodic_csi_rs = 0;
}
return SRSRAN_SUCCESS;
}
int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_set_to_add_mod_list(
asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack)
{
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_set_to_add_mod_list_present =
true;
if (parent->cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD) {
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_set_to_add_mod_list.resize(2);
auto& nzp_csi_res_set =
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_set_to_add_mod_list;
// item 0
nzp_csi_res_set[0].nzp_csi_res_set_id = 0;
nzp_csi_res_set[0].nzp_csi_rs_res.resize(1);
nzp_csi_res_set[0].nzp_csi_rs_res[0] = 0;
// item 1
nzp_csi_res_set[1].nzp_csi_res_set_id = 1;
nzp_csi_res_set[1].nzp_csi_rs_res.resize(4);
nzp_csi_res_set[1].nzp_csi_rs_res[0] = 1;
nzp_csi_res_set[1].nzp_csi_rs_res[1] = 2;
nzp_csi_res_set[1].nzp_csi_rs_res[2] = 3;
nzp_csi_res_set[1].nzp_csi_rs_res[3] = 4;
// Skip TRS info
} else {
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_set_to_add_mod_list.resize(1);
auto& nzp_csi_res_set =
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg.setup().nzp_csi_rs_res_set_to_add_mod_list;
nzp_csi_res_set[0].nzp_csi_res_set_id = 0;
nzp_csi_res_set[0].nzp_csi_rs_res.resize(1);
nzp_csi_res_set[0].nzp_csi_rs_res[0] = 0;
// Skip TRS info
}
return SRSRAN_SUCCESS;
}
int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack) int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg(asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg_pack)
{ {
cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg_present = true; cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded.csi_meas_cfg_present = true;
@ -1086,10 +932,8 @@ int rrc_nr::ue::pack_sp_cell_cfg_ded_csi_meas_cfg(asn1::rrc_nr::cell_group_cfg_s
// NOTE: Disable CQI configuration until srsENB NR PHY supports it // NOTE: Disable CQI configuration until srsENB NR PHY supports it
// pack_sp_cell_cfg_ded_csi_meas_cfg_csi_report_cfg(cell_group_cfg_pack); // pack_sp_cell_cfg_ded_csi_meas_cfg_csi_report_cfg(cell_group_cfg_pack);
// nzp-CSI-RS Resource // nzp-CSI-RS Resource and ResourceSet
// pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_to_add_mod_list(cell_group_cfg_pack); fill_serv_cell_from_enb_cfg(parent->cfg, cell_group_cfg_pack.sp_cell_cfg.sp_cell_cfg_ded);
// nzp-CSI-RS ResourceSet
// pack_sp_cell_cfg_ded_csi_meas_cfg_nzp_csi_rs_res_set_to_add_mod_list(cell_group_cfg_pack);
// CSI IM config // CSI IM config
// TODO: add csi im config // TODO: add csi im config
@ -1591,6 +1435,9 @@ void rrc_nr::ue::crnti_ce_received()
uecfg.ue_bearers[drb.lc_ch_id].direction = mac_lc_ch_cfg_t::BOTH; uecfg.ue_bearers[drb.lc_ch_id].direction = mac_lc_ch_cfg_t::BOTH;
uecfg.ue_bearers[drb.lc_ch_id].group = drb.mac_lc_ch_cfg.ul_specific_params.lc_ch_group; uecfg.ue_bearers[drb.lc_ch_id].group = drb.mac_lc_ch_cfg.ul_specific_params.lc_ch_group;
} }
srsran::make_pdsch_cfg_from_serv_cell(cell_group_cfg.sp_cell_cfg.sp_cell_cfg_ded, &uecfg.phy_cfg.pdsch);
parent->mac->ue_cfg(rnti, uecfg); parent->mac->ue_cfg(rnti, uecfg);
} }
} }

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