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@ -33,6 +33,24 @@ int pusch_nr_init_common(srslte_pusch_nr_t* q, const srslte_pusch_nr_args_t* arg
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return SRSLTE_ERROR;
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}
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q->g_ulsch = srslte_vec_u8_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->g_ack = srslte_vec_u8_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->g_csi1 = srslte_vec_u8_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->g_csi2 = srslte_vec_u8_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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if (q->g_ack == NULL || q->g_csi1 == NULL || q->g_csi2 == NULL || q->g_ulsch == NULL) {
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ERROR("Malloc");
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return SRSLTE_ERROR;
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}
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q->pos_ulsch = srslte_vec_u32_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->pos_ack = srslte_vec_u32_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->pos_csi1 = srslte_vec_u32_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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q->pos_csi2 = srslte_vec_u32_malloc(SRSLTE_SLOT_MAX_LEN_RE_NR);
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if (q->pos_ack == NULL || q->pos_csi1 == NULL || q->pos_csi2 == NULL || q->pos_ulsch == NULL) {
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ERROR("Malloc");
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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@ -151,6 +169,32 @@ void srslte_pusch_nr_free(srslte_pusch_nr_t* q)
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return;
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}
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if (q->g_ulsch != NULL) {
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free(q->g_ulsch);
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}
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if (q->g_ack != NULL) {
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free(q->g_ack);
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}
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if (q->g_csi1 != NULL) {
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free(q->g_csi1);
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}
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if (q->g_csi2 != NULL) {
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free(q->g_csi2);
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}
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if (q->pos_ulsch != NULL) {
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free(q->pos_ulsch);
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}
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if (q->pos_ack != NULL) {
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free(q->pos_ack);
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}
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if (q->pos_csi1 != NULL) {
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free(q->pos_csi1);
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}
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if (q->pos_csi2 != NULL) {
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free(q->pos_csi2);
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}
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for (uint32_t cw = 0; cw < SRSLTE_MAX_CODEWORDS; cw++) {
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if (q->b[cw]) {
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free(q->b[cw]);
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@ -176,6 +220,8 @@ void srslte_pusch_nr_free(srslte_pusch_nr_t* q)
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if (q->evm_buffer != NULL) {
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srslte_evm_free(q->evm_buffer);
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}
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SRSLTE_MEM_ZERO(q, srslte_pusch_nr_t, 1);
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}
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/**
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@ -420,13 +466,302 @@ pusch_nr_cinit(const srslte_carrier_nr_t* carrier, const srslte_sch_cfg_nr_t* cf
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return cinit;
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}
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// int pusch_nr_mux_uci(srslte_pusch_nr_t* q) {
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// uint8_t *g_ul_sch; // coded bits for UL-SCH
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// uint8_t *g_ack; // coded bits for HARQ-ACK
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// uint8_t *g_csi_p1; // coded bits for CSI part 1
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// uint8_t *g_csi_p2; // coded bits for CSI part 2
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//
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//}
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static inline int
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pusch_nr_fill_uci_cfg(srslte_pusch_nr_t* q, const srslte_sch_cfg_nr_t* cfg, srslte_uci_cfg_nr_t* uci_cfg)
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{
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// Initially, copy all fields
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*uci_cfg = cfg->uci;
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// Reset UCI PUSCH configuration
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SRSLTE_MEM_ZERO(&uci_cfg->pusch, srslte_uci_nr_pusch_cfg_t, 1);
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// Get DMRS symbol indexes
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uint32_t nof_dmrs_l = 0;
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uint32_t dmrs_l[SRSLTE_DMRS_SCH_MAX_SYMBOLS] = {};
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int n = srslte_dmrs_sch_get_symbols_idx(&cfg->dmrs, &cfg->grant, dmrs_l);
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if (n < SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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nof_dmrs_l = (uint32_t)n;
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// Find OFDM symbol index of the first OFDM symbol after the first set of consecutive OFDM symbol(s) carrying DMRS
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// Starts at first OFDM symbol carrying DMRS
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for (uint32_t l = dmrs_l[0], dmrs_l_idx = 0; l < cfg->grant.S + cfg->grant.L; l++) {
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// Check if it is not carrying DMRS...
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if (l != dmrs_l[dmrs_l_idx]) {
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// Set value and stop iterating
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uci_cfg->pusch.l0 = l;
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break;
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}
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// Move to the next DMRS OFDM symbol index
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if (dmrs_l_idx < nof_dmrs_l) {
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dmrs_l_idx++;
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}
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}
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// Find OFDM symbol index of the first OFDM symbol that does not carry DMRS
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// Starts at first OFDM symbol of the PUSCH transmission
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for (uint32_t l = cfg->grant.S, dmrs_l_idx = 0; l < cfg->grant.S + cfg->grant.L; l++) {
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// Check if it is not carrying DMRS...
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if (l != dmrs_l[dmrs_l_idx]) {
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uci_cfg->pusch.l1 = l;
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break;
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}
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// Move to the next DMRS OFDM symbol index
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if (dmrs_l_idx < nof_dmrs_l) {
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dmrs_l_idx++;
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}
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}
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// Number of DMRS per PRB
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int n_prb_dmrs = srslte_dmrs_sch_get_N_prb(&cfg->dmrs, &cfg->grant);
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if (n_prb_dmrs < SRSLTE_SUCCESS) {
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ERROR("Error calculating number of DMRS per PRB");
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return SRSLTE_ERROR;
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}
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// Accumulative Resource Element shall start in zero
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uci_cfg->pusch.M_pusch_sc_acc[0] = 0;
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// Set UCI RE number of candidates per OFDM symbol according to TS 38.312 6.3.2.4.2.1
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for (uint32_t l = 0, dmrs_l_idx = 0; l < SRSLTE_NSYMB_PER_SLOT_NR; l++) {
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// Skip if OFDM symbol is outside of the PUSCH transmission
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if (l < cfg->grant.S || l >= (cfg->grant.S + cfg->grant.L) || l == dmrs_l[dmrs_l_idx]) {
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uci_cfg->pusch.M_pusch_sc[l] = 0;
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uci_cfg->pusch.M_pusch_sc_acc[l + 1] = uci_cfg->pusch.M_pusch_sc_acc[l] + uci_cfg->pusch.M_pusch_sc[l];
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uci_cfg->pusch.M_uci_sc[l] = 0;
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continue;
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}
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// OFDM symbol carries DMRS
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if (l == dmrs_l[dmrs_l_idx]) {
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// Calculate PUSCH RE candidates
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uci_cfg->pusch.M_pusch_sc[l] = cfg->grant.nof_prb * (SRSLTE_NRE - n_prb_dmrs);
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uci_cfg->pusch.M_pusch_sc_acc[l + 1] = uci_cfg->pusch.M_pusch_sc_acc[l] + uci_cfg->pusch.M_pusch_sc[l];
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// The Number of RE candidates for UCI are 0
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uci_cfg->pusch.M_uci_sc[l] = 0;
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// Advance DMRS symbol index
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dmrs_l_idx++;
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// Skip to next symbol
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continue;
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}
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// Number of RE for Phase Tracking Reference Signals (PT-RS)
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uint32_t M_ptrs_sc = 0; // Not implemented yet
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// Number of RE given by the grant
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uci_cfg->pusch.M_pusch_sc[l] = cfg->grant.nof_prb * SRSLTE_NRE;
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// Calculate the number of UCI candidates
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uci_cfg->pusch.M_uci_sc[l] = uci_cfg->pusch.M_pusch_sc[l] - M_ptrs_sc;
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}
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// Generate SCH Transport block information
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srslte_sch_nr_tb_info_t sch_tb_info = {};
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if (srslte_sch_nr_fill_tb_info(&q->carrier, &cfg->sch_cfg, &cfg->grant.tb[0], &sch_tb_info) < SRSLTE_SUCCESS) {
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ERROR("Generating TB info");
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return SRSLTE_ERROR;
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}
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// Calculate the sum of codeblock sizes
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for (uint32_t i = 0; i < sch_tb_info.C; i++) {
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// Accumulate codeblock size if mask is enabled
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uci_cfg->pusch.K_sum += (sch_tb_info.mask[i]) ? sch_tb_info.Kr : 0;
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}
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// Set other PUSCH parameters
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uci_cfg->pusch.modulation = cfg->grant.tb[0].mod;
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uci_cfg->pusch.nof_layers = cfg->grant.nof_layers;
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uci_cfg->pusch.R = (float)cfg->grant.tb[0].R;
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uci_cfg->pusch.alpha = cfg->scaling;
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uci_cfg->pusch.beta_harq_ack_offset = cfg->beta_harq_ack_offset;
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uci_cfg->pusch.beta_csi_part1_offset = cfg->beta_csi_part1_offset;
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uci_cfg->pusch.nof_re = cfg->grant.tb[0].nof_re;
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return SRSLTE_SUCCESS;
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}
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#define CEIL(NUM, DEN) (((NUM) + ((DEN)-1)) / (DEN))
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// Implements TS 38.212 6.2.7 Data and control multiplexing (for NR-PUSCH)
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static int pusch_nr_gen_mux_uci(srslte_pusch_nr_t* q, const srslte_uci_cfg_nr_t* cfg)
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{
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// Bit positions
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uint32_t* pos_ulsch = q->pos_ulsch; // coded bits for UL-SCH
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uint32_t* pos_ack = q->pos_ack; // coded bits for HARQ-ACK
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uint32_t* pos_csi1 = q->pos_csi1; // coded bits for CSI part 1
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uint32_t* pos_csi2 = q->pos_csi2; // coded bits for CSI part 2
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// Key OFDM symbol indexes
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uint32_t l1 =
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cfg->pusch.l0; // First OFDM symbol that does not carry DMRS of the PUSCH, after the first DMRS symbol(s)
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uint32_t l1_csi = cfg->pusch.l1; // OFDM symbol index of the first OFDM symbol that does not carry DMRS
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// Number of UCI bits
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uint32_t G_ack = q->G_ack;
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uint32_t G_csi1 = q->G_csi1;
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uint32_t G_csi2 = q->G_csi2;
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// Other...
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uint32_t Nl = cfg->pusch.nof_layers;
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uint32_t Qm = srslte_mod_bits_x_symbol(cfg->pusch.modulation);
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// If 2 or less HARQ-ACK bits, use reserve
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uint32_t G_ack_rvd = 0;
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if (cfg->o_ack <= 2) {
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G_ack_rvd = G_ack;
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G_ack = 0;
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}
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// Counters
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uint32_t m_ack_count = 0;
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uint32_t m_csi1_count = 0;
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uint32_t m_csi2_count = 0;
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uint32_t m_ulsch_count = 0;
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uint32_t m_all_count = 0;
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for (uint32_t l = 0; l < SRSLTE_NSYMB_PER_SLOT_NR; l++) {
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// Skip if symbol has potential for data
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if (cfg->pusch.M_pusch_sc[l] == 0) {
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continue;
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}
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// Put UL-SCH only if this OFDM symbol has no potential for UCI
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if (cfg->pusch.M_uci_sc[l] == 0) {
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for (uint32_t i = 0; i < cfg->pusch.M_pusch_sc[l] * Qm * Nl; i++) {
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pos_ulsch[m_ulsch_count++] = m_all_count++;
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}
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continue;
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}
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uint32_t M_ulsch_sc = cfg->pusch.M_pusch_sc[l];
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uint32_t M_uci_sc = cfg->pusch.M_uci_sc[l];
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uint32_t M_uci_rvd = 0;
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// Compute HARQ-ACK bits multiplexing
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uint32_t ack_d = 0;
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uint32_t ack_m_re_count = 0;
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if (l >= l1 && m_ack_count < G_ack_rvd) {
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if (cfg->o_ack <= 2) {
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ack_d = 1;
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ack_m_re_count = M_ulsch_sc;
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if (G_ack_rvd - m_ack_count < M_uci_sc * Nl * Qm) {
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ack_d = (M_uci_sc * Nl * Qm) / (G_ack_rvd - m_ack_count);
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ack_m_re_count = CEIL(G_ack_rvd - m_ack_count, Nl * Qm);
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}
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M_uci_rvd = ack_m_re_count;
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} else {
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ack_d = 1;
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ack_m_re_count = M_ulsch_sc;
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if (G_ack - m_ack_count < M_uci_sc * Nl * Qm) {
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ack_d = (M_uci_sc * Nl * Qm) / (G_ack_rvd - m_ack_count);
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ack_m_re_count = M_ulsch_sc;
|
|
|
|
|
}
|
|
|
|
|
M_uci_sc -= ack_m_re_count;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Compute CSI part 1 bits multiplexing
|
|
|
|
|
uint32_t csi1_d = 0;
|
|
|
|
|
uint32_t csi1_m_re_count = 0;
|
|
|
|
|
if (l >= l1_csi && M_uci_sc > M_uci_rvd && m_csi1_count < G_csi1) {
|
|
|
|
|
csi1_d = 1;
|
|
|
|
|
csi1_m_re_count = M_uci_sc - M_uci_rvd;
|
|
|
|
|
if (G_csi1 - m_csi1_count < (M_uci_sc - M_uci_rvd) * Nl * Qm) {
|
|
|
|
|
csi1_d = ((M_uci_sc - M_uci_rvd) * Nl * Qm) / (G_csi1 - m_csi1_count);
|
|
|
|
|
csi1_m_re_count = CEIL(G_csi1 - m_csi1_count, Nl * Qm);
|
|
|
|
|
}
|
|
|
|
|
M_uci_sc -= csi1_m_re_count;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Compute CSI part 2 bits multiplexing
|
|
|
|
|
uint32_t csi2_d = 0;
|
|
|
|
|
uint32_t csi2_m_re_count = 0;
|
|
|
|
|
if (l >= l1_csi && M_uci_sc > M_uci_rvd && m_csi2_count < G_csi2) {
|
|
|
|
|
csi2_d = 1;
|
|
|
|
|
csi2_m_re_count = M_uci_sc - M_uci_rvd;
|
|
|
|
|
if (G_csi2 - m_csi2_count < (M_uci_sc - M_uci_rvd) * Nl * Qm) {
|
|
|
|
|
csi2_d = ((M_uci_sc - M_uci_rvd) * Nl * Qm) / (G_csi2 - m_csi2_count);
|
|
|
|
|
csi2_m_re_count = CEIL(G_csi2 - m_csi2_count, Nl * Qm);
|
|
|
|
|
}
|
|
|
|
|
M_uci_sc -= csi2_m_re_count;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Leave the rest for UL-SCH
|
|
|
|
|
uint32_t ulsch_m_re_count = M_uci_sc;
|
|
|
|
|
|
|
|
|
|
for (uint32_t i = 0, csi1_i = 0, csi2_i = 0; i < cfg->pusch.M_pusch_sc[l] * Qm * Nl; i++) {
|
|
|
|
|
if (ack_m_re_count != 0 && i % ack_d == 0 && m_ack_count < G_ack) {
|
|
|
|
|
for (uint32_t j = 0; j < Nl * Qm; j++) {
|
|
|
|
|
pos_ack[m_ack_count++] = m_all_count++;
|
|
|
|
|
}
|
|
|
|
|
ack_m_re_count--;
|
|
|
|
|
} else if (csi1_m_re_count != 0 && csi1_i % csi1_d == 0 && m_csi1_count < G_csi1) {
|
|
|
|
|
for (uint32_t j = 0; j < Nl * Qm; j++) {
|
|
|
|
|
pos_csi1[m_csi1_count++] = m_all_count++;
|
|
|
|
|
}
|
|
|
|
|
csi1_m_re_count--;
|
|
|
|
|
csi1_i++;
|
|
|
|
|
} else if (csi2_m_re_count != 0 && csi2_i % csi2_d == 0 && m_csi2_count < G_csi2) {
|
|
|
|
|
for (uint32_t j = 0; j < Nl * Qm; j++) {
|
|
|
|
|
pos_csi2[m_csi2_count++] = m_all_count++;
|
|
|
|
|
}
|
|
|
|
|
csi2_m_re_count--;
|
|
|
|
|
csi1_i++;
|
|
|
|
|
csi2_i++;
|
|
|
|
|
} else {
|
|
|
|
|
for (uint32_t j = 0; j < Nl * Qm; j++) {
|
|
|
|
|
pos_ulsch[m_ulsch_count++] = m_all_count++;
|
|
|
|
|
}
|
|
|
|
|
ulsch_m_re_count--;
|
|
|
|
|
csi1_i++;
|
|
|
|
|
csi2_i++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Set reserved bits
|
|
|
|
|
if (i % ack_d == 0 && m_ack_count < G_ack_rvd) {
|
|
|
|
|
for (uint32_t j = 0; j < Nl * Qm; j++) {
|
|
|
|
|
pos_ack[m_ack_count++] = m_all_count++;
|
|
|
|
|
}
|
|
|
|
|
ack_m_re_count--;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Checks that all RE are allocated as planned
|
|
|
|
|
if (ack_m_re_count != 0) {
|
|
|
|
|
ERROR("ack_m_re_count=%d", ack_m_re_count);
|
|
|
|
|
}
|
|
|
|
|
if (csi1_m_re_count != 0) {
|
|
|
|
|
ERROR("csi1_m_re_count=%d", csi1_m_re_count);
|
|
|
|
|
}
|
|
|
|
|
if (csi2_m_re_count != 0) {
|
|
|
|
|
ERROR("csi2_m_re_count=%d", csi2_m_re_count);
|
|
|
|
|
}
|
|
|
|
|
if (ulsch_m_re_count != 0) {
|
|
|
|
|
ERROR("ulsch_m_re_count=%d", ulsch_m_re_count);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (G_ack_rvd != 0 && G_ack_rvd != m_ack_count) {
|
|
|
|
|
ERROR("Not matched %d!=%d", G_ack_rvd, m_ack_count);
|
|
|
|
|
}
|
|
|
|
|
if (G_ack != 0 && G_ack != m_ack_count) {
|
|
|
|
|
ERROR("Not matched %d!=%d", G_ack, m_ack_count);
|
|
|
|
|
}
|
|
|
|
|
if (G_csi1 != 0 && G_csi1 != m_csi1_count) {
|
|
|
|
|
ERROR("Not matched %d!=%d", G_csi1, m_csi1_count);
|
|
|
|
|
}
|
|
|
|
|
if (G_csi2 != 0 && G_csi2 != m_csi2_count) {
|
|
|
|
|
ERROR("Not matched %d!=%d", G_csi2, m_csi2_count);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return SRSLTE_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pusch_nr_encode_codeword(srslte_pusch_nr_t* q,
|
|
|
|
|
const srslte_sch_cfg_nr_t* cfg,
|
|
|
|
|
@ -453,7 +788,7 @@ static inline int pusch_nr_encode_codeword(srslte_pusch_nr_t* q,
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Encode SCH
|
|
|
|
|
if (srslte_ulsch_nr_encode(&q->sch, &cfg->sch_cfg, tb, data, q->b[tb->cw_idx]) < SRSLTE_SUCCESS) {
|
|
|
|
|
if (srslte_ulsch_nr_encode(&q->sch, &cfg->sch_cfg, tb, data, q->g_ulsch) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error in SCH encoding");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
@ -463,6 +798,30 @@ static inline int pusch_nr_encode_codeword(srslte_pusch_nr_t* q,
|
|
|
|
|
srslte_vec_fprint_b(stdout, q->b[tb->cw_idx], tb->nof_bits);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Multiplex UL-SCH
|
|
|
|
|
for (uint32_t i = 0; i < tb->nof_bits; i++) {
|
|
|
|
|
q->b[tb->cw_idx][q->pos_ulsch[i]] = q->g_ulsch[i];
|
|
|
|
|
}
|
|
|
|
|
if (SRSLTE_DEBUG_ENABLED && srslte_verbose >= SRSLTE_VERBOSE_DEBUG && !handler_registered) {
|
|
|
|
|
DEBUG("UL-SCH bit positions:");
|
|
|
|
|
srslte_vec_fprint_i(stdout, (int*)q->pos_ulsch, tb->nof_bits);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Multiplex CSI part 1
|
|
|
|
|
for (uint32_t i = 0; i < q->G_csi1; i++) {
|
|
|
|
|
q->b[tb->cw_idx][q->pos_csi1[i]] = q->g_csi1[i];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Multiplex CSI part 2
|
|
|
|
|
for (uint32_t i = 0; i < q->G_csi2; i++) {
|
|
|
|
|
q->b[tb->cw_idx][q->pos_csi2[i]] = q->g_csi2[i];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Multiplex HARQ-ACK
|
|
|
|
|
for (uint32_t i = 0; i < q->G_ack; i++) {
|
|
|
|
|
q->b[tb->cw_idx][q->pos_ack[i]] = q->g_ack[i];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// 7.3.1.1 Scrambling
|
|
|
|
|
uint32_t cinit = pusch_nr_cinit(&q->carrier, cfg, rnti, tb->cw_idx);
|
|
|
|
|
srslte_sequence_apply_bit(q->b[tb->cw_idx], q->b[tb->cw_idx], tb->nof_bits, cinit);
|
|
|
|
|
@ -500,12 +859,26 @@ int srslte_pusch_nr_encode(srslte_pusch_nr_t* q,
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Fill UCI configuration for PUSCH configuration
|
|
|
|
|
srslte_uci_cfg_nr_t uci_cfg = {};
|
|
|
|
|
if (pusch_nr_fill_uci_cfg(q, cfg, &uci_cfg) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error filling UCI configuration for PUSCH");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Encode HARQ-ACK bits
|
|
|
|
|
int E_uci_ack = srslte_uci_nr_encode_pusch_ack(&q->uci, cfg, &data[0].uci, q->uci_ack);
|
|
|
|
|
int E_uci_ack = srslte_uci_nr_encode_pusch_ack(&q->uci, &uci_cfg, &data[0].uci, q->g_ack);
|
|
|
|
|
if (E_uci_ack < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error encoding HARQ-ACK bits");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
q->G_ack = E_uci_ack;
|
|
|
|
|
|
|
|
|
|
// Generate PUSCH UCI/UL-SCH multiplexing
|
|
|
|
|
if (pusch_nr_gen_mux_uci(q, &uci_cfg) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error generating PUSCH mux tables");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// 7.3.1.1 and 7.3.1.2
|
|
|
|
|
uint32_t nof_cw = 0;
|
|
|
|
|
@ -592,21 +965,26 @@ static inline int pusch_nr_decode_codeword(srslte_pusch_nr_t* q,
|
|
|
|
|
res->evm = srslte_evm_run_b(q->evm_buffer, &q->modem_tables[tb->mod], q->d[tb->cw_idx], llr, tb->nof_bits);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Change LLR sign
|
|
|
|
|
// Demultiplex UL-SCH, change sign
|
|
|
|
|
int8_t* g_ulsch_llr = (int8_t*)q->g_ulsch;
|
|
|
|
|
for (uint32_t i = 0; i < tb->nof_bits; i++) {
|
|
|
|
|
llr[i] = -llr[i];
|
|
|
|
|
g_ulsch_llr[i] = -llr[q->pos_ulsch[i]];
|
|
|
|
|
}
|
|
|
|
|
if (SRSLTE_DEBUG_ENABLED && srslte_verbose >= SRSLTE_VERBOSE_DEBUG && !handler_registered) {
|
|
|
|
|
DEBUG("UL-SCH bit positions:");
|
|
|
|
|
srslte_vec_fprint_i(stdout, (int*)q->pos_ulsch, tb->nof_bits);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Descrambling
|
|
|
|
|
srslte_sequence_apply_c(llr, llr, tb->nof_bits, pusch_nr_cinit(&q->carrier, cfg, rnti, tb->cw_idx));
|
|
|
|
|
srslte_sequence_apply_c(g_ulsch_llr, g_ulsch_llr, tb->nof_bits, pusch_nr_cinit(&q->carrier, cfg, rnti, tb->cw_idx));
|
|
|
|
|
|
|
|
|
|
if (SRSLTE_DEBUG_ENABLED && srslte_verbose >= SRSLTE_VERBOSE_DEBUG && !handler_registered) {
|
|
|
|
|
DEBUG("b=");
|
|
|
|
|
srslte_vec_fprint_b(stdout, q->b[tb->cw_idx], tb->nof_bits);
|
|
|
|
|
srslte_vec_fprint_bs(stdout, g_ulsch_llr, tb->nof_bits);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Decode SCH
|
|
|
|
|
if (srslte_ulsch_nr_decode(&q->sch, &cfg->sch_cfg, tb, llr, res->payload, &res->crc) < SRSLTE_SUCCESS) {
|
|
|
|
|
if (srslte_ulsch_nr_decode(&q->sch, &cfg->sch_cfg, tb, g_ulsch_llr, res->payload, &res->crc) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error in SCH decoding");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
@ -631,6 +1009,25 @@ int srslte_pusch_nr_decode(srslte_pusch_nr_t* q,
|
|
|
|
|
gettimeofday(&t[1], NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Check number of layers
|
|
|
|
|
if (q->max_layers < grant->nof_layers) {
|
|
|
|
|
ERROR("Error number of layers (%d) exceeds configured maximum (%d)", grant->nof_layers, q->max_layers);
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Fill UCI configuration for PUSCH configuration
|
|
|
|
|
srslte_uci_cfg_nr_t uci_cfg = {};
|
|
|
|
|
if (pusch_nr_fill_uci_cfg(q, cfg, &uci_cfg) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error filling UCI configuration for PUSCH");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Generate PUSCH UCI/UL-SCH multiplexing
|
|
|
|
|
if (pusch_nr_gen_mux_uci(q, &uci_cfg) < SRSLTE_SUCCESS) {
|
|
|
|
|
ERROR("Error generating PUSCH mux tables");
|
|
|
|
|
return SRSLTE_ERROR;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t nof_cw = 0;
|
|
|
|
|
for (uint32_t tb = 0; tb < SRSLTE_MAX_TB; tb++) {
|
|
|
|
|
nof_cw += grant->tb[tb].enabled ? 1 : 0;
|
|
|
|
|
|
Xavier Arteaga
4 years ago
committed by
Xavier Arteaga