added initial_dl_cqi to the enb rr.cfg parser

master
Francisco Paisana 5 years ago
parent bcbb08ebae
commit 9ad80ee29f

@ -296,7 +296,7 @@ public:
* Segmentation happens in this function. RLC PDU is stored in payload. */ * Segmentation happens in this function. RLC PDU is stored in payload. */
virtual int read_pdu(uint16_t rnti, uint32_t lcid, uint8_t* payload, uint32_t nof_bytes) = 0; virtual int read_pdu(uint16_t rnti, uint32_t lcid, uint8_t* payload, uint32_t nof_bytes) = 0;
virtual void read_pdu_pcch(uint8_t* payload, uint32_t buffer_size) = 0; virtual void read_pdu_pcch(uint8_t* payload, uint32_t buffer_size) = 0;
/* MAC calls RLC to push an RLC PDU. This function is called from an independent MAC thread. /* MAC calls RLC to push an RLC PDU. This function is called from an independent MAC thread.
* PDU gets placed into the buffer and higher layer thread gets notified. */ * PDU gets placed into the buffer and higher layer thread gets notified. */
@ -370,9 +370,9 @@ public:
class rrc_interface_rlc class rrc_interface_rlc
{ {
public: public:
virtual void read_pdu_pcch(uint8_t* payload, uint32_t payload_size) = 0; virtual void read_pdu_pcch(uint8_t* payload, uint32_t payload_size) = 0;
virtual void max_retx_attempted(uint16_t rnti) = 0; virtual void max_retx_attempted(uint16_t rnti) = 0;
virtual void write_pdu(uint16_t rnti, uint32_t lcid, srslte::unique_byte_buffer_t sdu) = 0; virtual void write_pdu(uint16_t rnti, uint32_t lcid, srslte::unique_byte_buffer_t sdu) = 0;
}; };
// RRC interface for MAC // RRC interface for MAC
@ -409,6 +409,7 @@ struct cell_cfg_t {
float dl_freq_hz; float dl_freq_hz;
uint32_t ul_earfcn; uint32_t ul_earfcn;
float ul_freq_hz; float ul_freq_hz;
uint32_t initial_dl_cqi;
std::vector<scell_cfg_t> scell_list; std::vector<scell_cfg_t> scell_list;
}; };
typedef std::vector<cell_cfg_t> cell_list_t; typedef std::vector<cell_cfg_t> cell_list_t;

@ -88,6 +88,7 @@ public:
uint32_t nrb_cqi; uint32_t nrb_cqi;
uint32_t ncs_an; uint32_t ncs_an;
uint32_t initial_dl_cqi;
uint32_t srs_subframe_config; uint32_t srs_subframe_config;
uint32_t srs_subframe_offset; uint32_t srs_subframe_offset;

@ -701,7 +701,7 @@ static int parse_meas_report_desc(rrc_meas_cfg_t* meas_cfg, Setting& root)
static int parse_cell_list(all_args_t* args, rrc_cfg_t* rrc_cfg, Setting& root) static int parse_cell_list(all_args_t* args, rrc_cfg_t* rrc_cfg, Setting& root)
{ {
auto cell_id_parser = [](uint32_t& cell_id, Setting& root) { return parse_bounded_number(cell_id, root, 0u, 255u); }; auto cell_id_parser = [](uint32_t& cell_id, Setting& root) { return parse_bounded_number(cell_id, root, 0u, 255u); };
rrc_cfg->cell_list.resize(root.getLength()); rrc_cfg->cell_list.resize(root.getLength());
for (uint32_t n = 0; n < rrc_cfg->cell_list.size(); ++n) { for (uint32_t n = 0; n < rrc_cfg->cell_list.size(); ++n) {
@ -717,6 +717,7 @@ static int parse_cell_list(all_args_t* args, rrc_cfg_t* rrc_cfg, Setting& root)
cell_cfg.ul_earfcn = cellroot["ul_earfcn"]; // will be derived from DL EARFCN If not set cell_cfg.ul_earfcn = cellroot["ul_earfcn"]; // will be derived from DL EARFCN If not set
parse_default_field( parse_default_field(
cell_cfg.root_seq_idx, cellroot, "root_seq_idx", rrc_cfg->sibs[1].sib2().rr_cfg_common.prach_cfg.root_seq_idx); cell_cfg.root_seq_idx, cellroot, "root_seq_idx", rrc_cfg->sibs[1].sib2().rr_cfg_common.prach_cfg.root_seq_idx);
parse_default_field(cell_cfg.initial_dl_cqi, cellroot, "initial_dl_cqi", 5u);
if (cellroot["ho_active"]) { if (cellroot["ho_active"]) {
HANDLEPARSERCODE(parse_meas_cell_list(&rrc_cfg->meas_cfg, cellroot["meas_cell_list"])); HANDLEPARSERCODE(parse_meas_cell_list(&rrc_cfg->meas_cfg, cellroot["meas_cell_list"]));
@ -770,7 +771,7 @@ int parse_cell_cfg(all_args_t* args_, srslte_cell_t* cell)
cell->nof_prb = args_->enb.n_prb; cell->nof_prb = args_->enb.n_prb;
// PCI not configured yet // PCI not configured yet
phich_cfg_s phichcfg; phich_cfg_s phichcfg;
parser::section phy_cnfg("phy_cnfg"); parser::section phy_cnfg("phy_cnfg");
parser::section phich_cnfg("phich_cnfg"); parser::section phich_cnfg("phich_cnfg");
phy_cnfg.add_subsection(&phich_cnfg); phy_cnfg.add_subsection(&phich_cnfg);

@ -44,7 +44,6 @@ namespace srsenb {
namespace sched_utils { namespace sched_utils {
const uint32_t initial_dl_cqi = 5;
const uint32_t conres_ce_size = 6; const uint32_t conres_ce_size = 6;
//! Obtains TB size *in bytes* for a given MCS and N_{PRB} //! Obtains TB size *in bytes* for a given MCS and N_{PRB}
@ -1193,7 +1192,7 @@ sched_ue_carrier::sched_ue_carrier(const sched_interface::ue_cfg_t& cfg_,
// only PCell starts active. Remaining ones wait for valid CQI // only PCell starts active. Remaining ones wait for valid CQI
active = ue_cc_idx == 0; active = ue_cc_idx == 0;
dl_cqi_rx = false; dl_cqi_rx = false;
dl_cqi = (ue_cc_idx == 0) ? sched_utils::initial_dl_cqi : 0; dl_cqi = (ue_cc_idx == 0) ? cell_params->cfg.initial_dl_cqi : 0;
// set max mcs // set max mcs
max_mcs_ul = cell_params->sched_cfg->pusch_max_mcs >= 0 ? cell_params->sched_cfg->pusch_max_mcs : 28; max_mcs_ul = cell_params->sched_cfg->pusch_max_mcs >= 0 ? cell_params->sched_cfg->pusch_max_mcs : 28;

@ -791,6 +791,7 @@ void rrc::config_mac()
cfg.sibs[1].sib2().rr_cfg_common.rach_cfg_common.ra_supervision_info.ra_resp_win_size.to_number(); cfg.sibs[1].sib2().rr_cfg_common.rach_cfg_common.ra_supervision_info.ra_resp_win_size.to_number();
item.prach_freq_offset = cfg.sibs[1].sib2().rr_cfg_common.prach_cfg.prach_cfg_info.prach_freq_offset; item.prach_freq_offset = cfg.sibs[1].sib2().rr_cfg_common.prach_cfg.prach_cfg_info.prach_freq_offset;
item.maxharq_msg3tx = cfg.sibs[1].sib2().rr_cfg_common.rach_cfg_common.max_harq_msg3_tx; item.maxharq_msg3tx = cfg.sibs[1].sib2().rr_cfg_common.rach_cfg_common.max_harq_msg3_tx;
item.initial_dl_cqi = cfg.cell_list[ccidx].initial_dl_cqi;
item.nrb_pucch = SRSLTE_MAX(cfg.sr_cfg.nof_prb, cfg.cqi_cfg.nof_prb); item.nrb_pucch = SRSLTE_MAX(cfg.sr_cfg.nof_prb, cfg.cqi_cfg.nof_prb);
rrc_log->info("Allocating %d PRBs for PUCCH\n", item.nrb_pucch); rrc_log->info("Allocating %d PRBs for PUCCH\n", item.nrb_pucch);
@ -1296,8 +1297,8 @@ void rrc::ue::handle_rrc_reconf_complete(rrc_conn_recfg_complete_s* msg, srslte:
// Finally, add SRB2 and DRB1 to the scheduler // Finally, add SRB2 and DRB1 to the scheduler
srsenb::sched_interface::ue_bearer_cfg_t bearer_cfg = {}; srsenb::sched_interface::ue_bearer_cfg_t bearer_cfg = {};
bearer_cfg.direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH; bearer_cfg.direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
bearer_cfg.group = 0; bearer_cfg.group = 0;
parent->mac->bearer_ue_cfg(rnti, 2, &bearer_cfg); parent->mac->bearer_ue_cfg(rnti, 2, &bearer_cfg);
bearer_cfg.group = last_rrc_conn_recfg.crit_exts.c1() bearer_cfg.group = last_rrc_conn_recfg.crit_exts.c1()
.rrc_conn_recfg_r8() .rrc_conn_recfg_r8()

@ -110,6 +110,7 @@ inline srsenb::sched_interface::cell_cfg_t generate_default_cell_cfg(uint32_t no
cell_cfg.prach_freq_offset = (cell_cfg_phy.nof_prb == 6) ? 0 : 2; cell_cfg.prach_freq_offset = (cell_cfg_phy.nof_prb == 6) ? 0 : 2;
cell_cfg.prach_rar_window = 3; cell_cfg.prach_rar_window = 3;
cell_cfg.maxharq_msg3tx = 3; cell_cfg.maxharq_msg3tx = 3;
cell_cfg.initial_dl_cqi = 5;
return cell_cfg; return cell_cfg;
} }

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