cleanup of sched testing cfg generation

master
Francisco Paisana 5 years ago committed by Francisco Paisana
parent d5f1581759
commit 94b8dd39a9

@ -24,8 +24,7 @@
#include "srslte/common/test_common.h" #include "srslte/common/test_common.h"
using namespace srsenb; using namespace srsenb;
// const uint32_t seed = std::chrono::system_clock::now().time_since_epoch().count(); const uint32_t seed = std::chrono::system_clock::now().time_since_epoch().count();
const uint32_t seed = 3930373626;
const uint32_t PCell_IDX = 0; const uint32_t PCell_IDX = 0;
const std::array<uint32_t, 6> prb_list = {6, 15, 25, 50, 75, 100}; const std::array<uint32_t, 6> prb_list = {6, 15, 25, 50, 75, 100};
@ -97,6 +96,7 @@ int test_pdcch_one_ue()
uint32_t nof_dci_locs = dci_cce->nof_loc[aggr_idx]; uint32_t nof_dci_locs = dci_cce->nof_loc[aggr_idx];
const uint32_t* dci_locs = dci_cce->cce_start[aggr_idx]; const uint32_t* dci_locs = dci_cce->cce_start[aggr_idx];
// TEST: Check the first alloc of the pdcch result (e.g. rnti, valid cce mask, etc.)
pdcch_grid_t::alloc_result_t pdcch_result; pdcch_grid_t::alloc_result_t pdcch_result;
pdcch_mask_t pdcch_mask; pdcch_mask_t pdcch_mask;
pdcch.get_allocs(&pdcch_result, &pdcch_mask, 0); pdcch.get_allocs(&pdcch_result, &pdcch_mask, 0);
@ -148,6 +148,8 @@ int main()
{ {
srsenb::set_randseed(seed); srsenb::set_randseed(seed);
printf("This is the chosen seed: %u\n", seed); printf("This is the chosen seed: %u\n", seed);
srslte::logmap::get("TEST")->set_level(srslte::LOG_LEVEL_INFO);
TESTASSERT(test_pdcch_one_ue() == SRSLTE_SUCCESS); TESTASSERT(test_pdcch_one_ue() == SRSLTE_SUCCESS);
printf("Success\n");
} }

@ -55,10 +55,6 @@ sim_sched_args generate_default_sim_args(uint32_t nof_prb, uint32_t nof_ccs)
{ {
sim_sched_args sim_args; sim_sched_args sim_args;
sim_args.P_retx = 0.1;
sim_args.default_ue_sim_cfg.ue_cfg = generate_default_ue_cfg();
// setup two cells // setup two cells
std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg(nof_ccs, generate_default_cell_cfg(nof_prb)); std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg(nof_ccs, generate_default_cell_cfg(nof_prb));
cell_cfg[0].scell_list.resize(1); cell_cfg[0].scell_list.resize(1);

@ -609,6 +609,10 @@ int ue_ctxt_test::test_harqs(cc_result result)
CONDERROR(h.ndi != data.dci.tb[0].ndi, "Invalid ndi for retx\n"); CONDERROR(h.ndi != data.dci.tb[0].ndi, "Invalid ndi for retx\n");
CONDERROR(not h.active, "retx for inactive dl harq pid=%d\n", h.pid); CONDERROR(not h.active, "retx for inactive dl harq pid=%d\n", h.pid);
CONDERROR(h.tti_tx > current_tti_rx, "harq pid=%d reused too soon\n", h.pid); CONDERROR(h.tti_tx > current_tti_rx, "harq pid=%d reused too soon\n", h.pid);
CONDERROR(h.nof_retxs + 1 >= sim_cfg.ue_cfg.maxharq_tx,
"The number of retx=%d exceeded its max=%d\n",
h.nof_retxs + 1,
sim_cfg.ue_cfg.maxharq_tx);
h.nof_retxs++; h.nof_retxs++;
h.tti_tx = srslte::to_tx_dl(current_tti_rx); h.tti_tx = srslte::to_tx_dl(current_tti_rx);
@ -675,7 +679,7 @@ int ue_ctxt_test::schedule_acks(cc_result result)
ack_data.pid = data.dci.pid; ack_data.pid = data.dci.pid;
ack_data.ue_cc_idx = data.dci.ue_cc_idx; ack_data.ue_cc_idx = data.dci.ue_cc_idx;
uint32_t nof_retx = sched_utils::get_nof_retx(data.dci.tb[0].rv); // 0..3 uint32_t nof_retx = sched_utils::get_nof_retx(data.dci.tb[0].rv); // 0..3
ack_data.ack = randf() < prob_dl_ack_mask[nof_retx % prob_dl_ack_mask.size()]; ack_data.ack = randf() < sim_cfg.prob_dl_ack_mask[nof_retx % sim_cfg.prob_dl_ack_mask.size()];
pending_dl_acks.push(ack_data); pending_dl_acks.push(ack_data);
} }
@ -694,7 +698,7 @@ int ue_ctxt_test::schedule_acks(cc_result result)
ack_data.tb = 0; ack_data.tb = 0;
ack_data.pid = srslte::to_tx_ul(current_tti_rx).to_uint() % cc->ul_harqs.size(); ack_data.pid = srslte::to_tx_ul(current_tti_rx).to_uint() % cc->ul_harqs.size();
uint32_t nof_retx = sched_utils::get_nof_retx(pusch.dci.tb.rv); // 0..3 uint32_t nof_retx = sched_utils::get_nof_retx(pusch.dci.tb.rv); // 0..3
ack_data.ack = randf() < prob_ul_ack_mask[nof_retx % prob_ul_ack_mask.size()]; ack_data.ack = randf() < sim_cfg.prob_ul_ack_mask[nof_retx % sim_cfg.prob_ul_ack_mask.size()];
pending_ul_acks.push(ack_data); pending_ul_acks.push(ack_data);
} }

@ -85,16 +85,16 @@ using ul_sched_res_list = std::vector<sched_interface::ul_sched_res_t>;
struct ue_ctxt_test { struct ue_ctxt_test {
// args // args
srslte::log_ref log_h{"TEST"}; srslte::log_ref log_h{"TEST"};
std::vector<float> prob_dl_ack_mask{0.5, 0.5, 1}, prob_ul_ack_mask{0.5, 0.5, 1}; ue_ctxt_test_cfg sim_cfg;
ue_ctxt_test_cfg sim_cfg;
// prach args // prach args
uint16_t rnti; uint16_t rnti;
uint32_t preamble_idx = 0; uint32_t preamble_idx = 0;
/* state */ /* state */
srslte::tti_point current_tti_rx; srsenb::sched_interface::ue_cfg_t user_cfg;
srslte::tti_point current_tti_rx;
// RA state // RA state
srslte::tti_point prach_tti, rar_tti, msg3_tti, msg4_tti; srslte::tti_point prach_tti, rar_tti, msg3_tti, msg4_tti;
@ -118,8 +118,7 @@ struct ue_ctxt_test {
}; };
std::vector<cc_ue_ctxt_test> active_ccs; std::vector<cc_ue_ctxt_test> active_ccs;
bool drb_cfg_flag = false; bool drb_cfg_flag = false;
srsenb::sched_interface::ue_cfg_t user_cfg;
ue_ctxt_test(uint16_t rnti_, ue_ctxt_test(uint16_t rnti_,
uint32_t preamble_idx_, uint32_t preamble_idx_,

@ -291,17 +291,6 @@ int sched_tester::test_harqs()
h_id, h_id,
tti_info.tti_params.tti_tx_dl); tti_info.tti_params.tti_tx_dl);
CONDERROR(h.get_n_cce() != data.dci.location.ncce, "Harq DCI location does not match with result\n"); CONDERROR(h.get_n_cce() != data.dci.location.ncce, "Harq DCI location does not match with result\n");
if (tti_data.ue_data[rnti].dl_harqs[h_id].has_pending_retx(0, tti_info.tti_params.tti_tx_dl)) { // retx
CONDERROR(tti_data.ue_data[rnti].dl_harqs[h_id].nof_retx(0) + 1 != h.nof_retx(0),
"A dl harq of user rnti=0x%x was likely overwritten.\n",
rnti);
CONDERROR(h.nof_retx(0) >= sim_args0.default_ue_sim_cfg.ue_cfg.maxharq_tx,
"The number of retx=%d exceeded its max=%d\n",
h.nof_retx(0),
sim_args0.default_ue_sim_cfg.ue_cfg.maxharq_tx);
} else { // newtx
CONDERROR(h.nof_retx(0) != 0, "A new harq was scheduled but with invalid number of retxs\n");
}
} }
for (uint32_t i = 0; i < tti_info.ul_sched_result[CARRIER_IDX].nof_dci_elems; ++i) { for (uint32_t i = 0; i < tti_info.ul_sched_result[CARRIER_IDX].nof_dci_elems; ++i) {
@ -452,9 +441,7 @@ sched_sim_events rand_sim_params(uint32_t nof_ttis)
sched_sim_event_generator generator; sched_sim_event_generator generator;
sim_gen.sim_args.cell_cfg = {generate_default_cell_cfg(nof_prb)}; sim_gen.sim_args.cell_cfg = {generate_default_cell_cfg(nof_prb)};
sim_gen.sim_args.default_ue_sim_cfg.ue_cfg = generate_default_ue_cfg();
sim_gen.sim_args.default_ue_sim_cfg.periodic_cqi = true; sim_gen.sim_args.default_ue_sim_cfg.periodic_cqi = true;
sim_gen.sim_args.P_retx = 0.1;
sim_gen.sim_args.start_tti = 0; sim_gen.sim_args.start_tti = 0;
sim_gen.sim_args.sim_log = log_global.get(); sim_gen.sim_args.sim_log = log_global.get();

@ -83,7 +83,8 @@ inline srsenb::sched_interface::ue_cfg_t generate_default_ue_cfg()
struct ue_ctxt_test_cfg { struct ue_ctxt_test_cfg {
bool periodic_cqi = false; bool periodic_cqi = false;
uint32_t cqi_Npd = 10, cqi_Noffset = 5; // CQI reporting uint32_t cqi_Npd = 10, cqi_Noffset = 5; // CQI reporting
srsenb::sched_interface::ue_cfg_t ue_cfg; std::vector<float> prob_dl_ack_mask{0.5, 0.5, 1}, prob_ul_ack_mask{0.5, 0.5, 1};
srsenb::sched_interface::ue_cfg_t ue_cfg = generate_default_ue_cfg();
}; };
// Struct that represents all the events that take place in a TTI // Struct that represents all the events that take place in a TTI
@ -105,10 +106,9 @@ struct tti_ev {
struct sim_sched_args { struct sim_sched_args {
uint32_t start_tti = 0; uint32_t start_tti = 0;
float P_retx;
std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg; std::vector<srsenb::sched_interface::cell_cfg_t> cell_cfg;
srslte::log* sim_log = nullptr; srslte::log* sim_log = nullptr;
ue_ctxt_test_cfg default_ue_sim_cfg; ue_ctxt_test_cfg default_ue_sim_cfg{};
}; };
// generate all events up front // generate all events up front
@ -164,9 +164,7 @@ struct sched_sim_event_generator {
auto& user = user_updates.back(); auto& user = user_updates.back();
user.rnti = next_rnti++; user.rnti = next_rnti++;
// creates a user with one supported CC (PRACH stage) // creates a user with one supported CC (PRACH stage)
ue_ctxt_test_cfg ue_sim_cfg{}; user.ue_sim_cfg.reset(new ue_ctxt_test_cfg{});
ue_sim_cfg.ue_cfg = generate_default_ue_cfg();
user.ue_sim_cfg.reset(new ue_ctxt_test_cfg{ue_sim_cfg});
auto& u = current_users[user.rnti]; auto& u = current_users[user.rnti];
u.rnti = user.rnti; u.rnti = user.rnti;
u.tti_start = tti_counter; u.tti_start = tti_counter;

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