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srsRAN_4G
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cleanup of some type names, and other minor changes

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master
Francisco Paisana 5 years ago
parent c19e0d9423
commit 6aec98e140
6 changed files with 76 additions and 80 deletions
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38
srsenb/hdr/stack/mac/scheduler.h
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@ -48,6 +48,11 @@ inline bool is_in_tti_interval(uint32_t tti, uint32_t tti1, uint32_t tti2)
return tti >= tti1 or tti <= tti2;
}
inline uint32_t tti_subtract(uint32_t tti1, uint32_t tti2)
{
return (tti1 + 10240 - tti2) % 10240;
}
} // namespace sched_utils
/* Caution: User addition (ue_cfg) and removal (ue_rem) are not thread-safe
@ -69,13 +74,11 @@ public:
class metric_dl
{
public:
/* Virtual methods for user metric calculation */
virtual void set_log(srslte::log* log_) = 0;
virtual void sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched) = 0;
};
class metric_ul
{
public:
@ -139,19 +142,20 @@ public:
void tpc_dec(uint16_t rnti);
// Static Methods
static uint32_t get_rvidx(uint32_t retx_idx) {
static uint32_t get_rvidx(uint32_t retx_idx)
{
const static int rv_idx[4] = {0, 2, 3, 1};
return rv_idx[retx_idx%4];
return rv_idx[retx_idx % 4];
}
static void generate_cce_location(
srslte_regs_t* regs, sched_ue::sched_dci_cce_t* location, uint32_t cfi, uint32_t sf_idx = 0, uint16_t rnti = 0);
static uint32_t aggr_level(uint32_t aggr_idx) { return 1u << aggr_idx; }
protected:
metric_dl *dl_metric;
metric_ul *ul_metric;
srslte::log *log_h;
rrc_interface_mac *rrc;
metric_dl* dl_metric;
metric_ul* ul_metric;
srslte::log* log_h;
rrc_interface_mac* rrc;
pthread_rwlock_t rwlock;
std::mutex sched_mutex;
@ -254,10 +258,10 @@ protected:
void set_ul_sched_result(const pdcch_grid_t::alloc_result_t& dci_result);
// consts
sched* parent = NULL;
srslte::log* log_h = NULL;
sched* parent = nullptr;
srslte::log* log_h = nullptr;
uint32_t P;
cell_cfg_sib_t* sibs_cfg = NULL;
cell_cfg_sib_t* sibs_cfg = nullptr;
// internal state
tti_grid_t tti_alloc;
@ -267,9 +271,8 @@ protected:
std::vector<ul_alloc_t> ul_data_allocs;
};
const static uint32_t nof_sched_ttis = 10;
tti_sched_result_t tti_scheds[nof_sched_ttis];
tti_sched_result_t* get_tti_sched(uint32_t tti_rx) { return &tti_scheds[tti_rx % nof_sched_ttis]; }
std::array<tti_sched_result_t, 10> tti_scheds;
tti_sched_result_t* get_tti_sched(uint32_t tti_rx) { return &tti_scheds[tti_rx % tti_scheds.size()]; }
std::vector<uint8_t> tti_dl_mask;
tti_sched_result_t* new_tti(uint32_t tti_rx);
@ -290,8 +293,6 @@ protected:
// derived from args
uint32_t P;
uint32_t si_n_rbg;
uint32_t rar_n_rbg;
uint32_t nof_rbg;
prbmask_t prach_mask;
prbmask_t pucch_mask;
@ -299,13 +300,12 @@ protected:
std::unique_ptr<bc_sched_t> bc_sched;
std::unique_ptr<ra_sched_t> rar_sched;
uint32_t pdsch_re[10];
std::array<uint32_t, 10> pdsch_re;
uint32_t current_tti;
bool configured;
};
}
} // namespace srsenb
#endif // SRSENB_SCHEDULER_H

2
srsenb/hdr/stack/mac/scheduler_ctrl.h
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@ -29,7 +29,7 @@ namespace srsenb {
class sched::bc_sched_t
{
public:
bc_sched_t(cell_cfg_t* cfg_);
explicit bc_sched_t(cell_cfg_t* cfg_);
void init(rrc_interface_mac* rrc_);
void dl_sched(tti_sched_result_t* tti_sched);

13
srsenb/hdr/stack/mac/scheduler_grid.h
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@ -49,7 +49,7 @@ class pdcch_grid_t
{
public:
struct alloc_t {
uint16_t rnti;
uint16_t rnti = 0;
srslte_dci_location_t dci_pos = {0, 0};
pdcch_mask_t current_mask;
pdcch_mask_t total_mask;
@ -75,7 +75,7 @@ public:
private:
const static uint32_t nof_cfis = 3;
typedef std::pair<int, alloc_t> tree_node_t;
using tree_node_t = std::pair<int, alloc_t>; ///< First represents the parent node idx, and second the alloc tree node
void reset();
const sched_ue::sched_dci_cce_t* get_cce_loc_table(alloc_type_t alloc_type, sched_ue* user) const;
@ -89,7 +89,7 @@ private:
srslte::log* log_h = nullptr;
sched_ue::sched_dci_cce_t* common_locations = nullptr;
sched_ue::sched_dci_cce_t* rar_locations[10] = {nullptr};
uint32_t cce_size_array[nof_cfis] = {0};
std::array<uint32_t, 3> cce_size_array{};
// tti vars
uint32_t tti_rx = 0;
@ -104,11 +104,14 @@ private:
class tti_grid_t
{
public:
using ctrl_alloc_t = std::pair<alloc_outcome_t, rbg_range_t>;
struct dl_ctrl_alloc_t {
alloc_outcome_t outcome;
rbg_range_t rbg_range;
};
void init(srslte::log* log_, sched_interface::cell_cfg_t* cell_, const pdcch_grid_t& pdcch_grid);
void new_tti(uint32_t tti_rx_, uint32_t start_cfi);
ctrl_alloc_t alloc_dl_ctrl(uint32_t aggr_lvl, alloc_type_t alloc_type);
dl_ctrl_alloc_t alloc_dl_ctrl(uint32_t aggr_lvl, alloc_type_t alloc_type);
alloc_outcome_t alloc_dl_data(sched_ue* user, const rbgmask_t& user_mask);
alloc_outcome_t alloc_ul_data(sched_ue* user, ul_harq_proc::ul_alloc_t alloc, bool needs_pdcch);

28
srsenb/src/stack/mac/scheduler.cc
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@ -101,19 +101,19 @@ sched::tti_sched_result_t::alloc_dl_ctrl(uint32_t aggr_lvl, uint32_t tbs_bytes,
}
/* Allocate space in the DL RBG and PDCCH grids */
tti_grid_t::ctrl_alloc_t ret = tti_alloc.alloc_dl_ctrl(aggr_lvl, alloc_type);
if (not ret.first) {
return {ret.first, ctrl_alloc};
tti_grid_t::dl_ctrl_alloc_t ret = tti_alloc.alloc_dl_ctrl(aggr_lvl, alloc_type);
if (not ret.outcome) {
return {ret.outcome, ctrl_alloc};
}
// Allocation Successful
ctrl_alloc.dci_idx = tti_alloc.get_pdcch_grid().nof_allocs() - 1;
ctrl_alloc.rbg_range = ret.second;
ctrl_alloc.rbg_range = ret.rbg_range;
ctrl_alloc.rnti = rnti;
ctrl_alloc.req_bytes = tbs_bytes;
ctrl_alloc.alloc_type = alloc_type;
return {ret.first, ctrl_alloc};
return {ret.outcome, ctrl_alloc};
}
alloc_outcome_t sched::tti_sched_result_t::alloc_bc(uint32_t aggr_lvl, uint32_t sib_idx, uint32_t sib_ntx)
@ -188,7 +188,7 @@ alloc_outcome_t sched::tti_sched_result_t::alloc_dl_user(sched_ue* user, const r
// Try to allocate RBGs and DCI
alloc_outcome_t ret = tti_alloc.alloc_dl_data(user, user_mask);
if (not ret) {
if (ret != alloc_outcome_t::SUCCESS) {
return ret;
}
@ -217,7 +217,7 @@ alloc_outcome_t sched::tti_sched_result_t::alloc_ul(sched_ue*
// Allocate RBGs and DCI space
bool needs_pdcch = alloc_type == ul_alloc_t::ADAPT_RETX or alloc_type == ul_alloc_t::NEWTX;
alloc_outcome_t ret = tti_alloc.alloc_ul_data(user, alloc, needs_pdcch);
if (not ret) {
if (ret != alloc_outcome_t::SUCCESS) {
return ret;
}
@ -569,13 +569,7 @@ int sched::tti_sched_result_t::generate_format1a(
* Initialization and sched configuration functions
*
*******************************************************/
sched::sched() :
P(0),
si_n_rbg(0),
rar_n_rbg(0),
nof_rbg(0),
bc_sched(new bc_sched_t{&cfg}),
rar_sched(new ra_sched_t{&cfg})
sched::sched() : P(0), nof_rbg(0), bc_sched(new bc_sched_t{&cfg}), rar_sched(new ra_sched_t{&cfg})
{
current_tti = 0;
log_h = nullptr;
@ -669,8 +663,6 @@ int sched::cell_cfg(sched_interface::cell_cfg_t* cell_cfg)
}
P = srslte_ra_type0_P(cfg.cell.nof_prb);
si_n_rbg = srslte::ceil_div(4, P);
rar_n_rbg = srslte::ceil_div(3, P);
nof_rbg = srslte::ceil_div(cfg.cell.nof_prb, P);
pucch_mask.resize(cfg.cell.nof_prb);
if (cfg.nrb_pucch > 0) {
@ -1030,7 +1022,7 @@ int sched::dl_sched(uint32_t tti, sched_interface::dl_sched_res_t* sched_result)
return 0;
}
uint32_t tti_rx = TTI_SUB(tti, TX_DELAY);
uint32_t tti_rx = sched_utils::tti_subtract(tti, TX_DELAY);
// Compute scheduling Result for tti_rx
tti_sched_result_t* tti_sched = new_tti(tti_rx);
@ -1049,7 +1041,7 @@ int sched::ul_sched(uint32_t tti, srsenb::sched_interface::ul_sched_res_t* sched
}
// Compute scheduling Result for tti_rx
uint32_t tti_rx = (tti + 10240 - 2 * FDD_HARQ_DELAY_MS) % 10240;
uint32_t tti_rx = sched_utils::tti_subtract(tti, 2 * FDD_HARQ_DELAY_MS);
tti_sched_result_t* tti_sched = new_tti(tti_rx);
// Copy results

1
srsenb/src/stack/mac/scheduler_ctrl.cc
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@ -249,6 +249,7 @@ int sched::ra_sched_t::dl_rach_info(dl_sched_rar_info_t rar_info)
void sched::ra_sched_t::reset()
{
tti_tx_dl = 0;
for (auto& msg3 : pending_msg3) {
msg3 = {};
}

4
srsenb/src/stack/mac/scheduler_grid.cc
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@ -56,7 +56,7 @@ void pdcch_grid_t::init(srslte::log* log_,
}
// precompute nof_cces
for (uint32_t cfix = 0; cfix < nof_cfis; ++cfix) {
for (uint32_t cfix = 0; cfix < cce_size_array.size(); ++cfix) {
int ret = srslte_regs_pdcch_ncce(regs, cfix + 1);
if (ret < 0) {
log_h->error("SCHED: Failed to calculate the number of CCEs in the PDCCH\n");
@ -315,7 +315,7 @@ alloc_outcome_t tti_grid_t::alloc_dl(uint32_t aggr_lvl, alloc_type_t alloc_type,
}
//! Allocates CCEs and RBs for control allocs. It allocates RBs in a contiguous manner.
tti_grid_t::ctrl_alloc_t tti_grid_t::alloc_dl_ctrl(uint32_t aggr_lvl, alloc_type_t alloc_type)
tti_grid_t::dl_ctrl_alloc_t tti_grid_t::alloc_dl_ctrl(uint32_t aggr_lvl, alloc_type_t alloc_type)
{
rbg_range_t range;
range.rbg_start = nof_rbgs - avail_rbg;

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