use mac_buffer_state interface to schedule CEs in scheduler

master
Francisco Paisana 5 years ago committed by Francisco Paisana
parent ec94819f08
commit 64557740fc

@ -273,8 +273,9 @@ public:
virtual void reset() = 0; virtual void reset() = 0;
/* Manages UE configuration context */ /* Manages UE configuration context */
virtual int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) = 0; virtual int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) = 0;
virtual int ue_rem(uint16_t rnti) = 0; virtual int ue_rem(uint16_t rnti) = 0;
virtual int ue_set_crnti(uint16_t temp_crnti, uint16_t crnti, sched_interface::ue_cfg_t* cfg) = 0;
/* Manages UE bearers and associated configuration */ /* Manages UE bearers and associated configuration */
virtual int bearer_ue_cfg(uint16_t rnti, uint32_t lc_id, sched_interface::ue_bearer_cfg_t* cfg) = 0; virtual int bearer_ue_cfg(uint16_t rnti, uint32_t lc_id, sched_interface::ue_bearer_cfg_t* cfg) = 0;

@ -144,7 +144,6 @@ public:
std::vector<cc_cfg_t> supported_cc_list; ///< list of UE supported CCs. First index for PCell std::vector<cc_cfg_t> supported_cc_list; ///< list of UE supported CCs. First index for PCell
ant_info_ded_t dl_ant_info; ant_info_ded_t dl_ant_info;
bool use_tbs_index_alt = false; bool use_tbs_index_alt = false;
enum conn_state_t { none, ue_id_rx } conn_state = none;
}; };
typedef struct { typedef struct {
@ -257,7 +256,7 @@ public:
/******************* Scheduling Interface ***********************/ /******************* Scheduling Interface ***********************/
/* DL buffer status report */ /* DL buffer status report */
virtual int dl_rlc_buffer_state(uint16_t rnti, uint32_t lc_id, uint32_t tx_queue, uint32_t retx_queue) = 0; virtual int dl_rlc_buffer_state(uint16_t rnti, uint32_t lc_id, uint32_t tx_queue, uint32_t retx_queue) = 0;
virtual int dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code) = 0; virtual int dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code, uint32_t nof_cmds) = 0;
/* DL information */ /* DL information */
virtual int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack) = 0; virtual int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack) = 0;

@ -84,6 +84,7 @@ public:
/* Manages UE scheduling context */ /* Manages UE scheduling context */
int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) override; int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) override;
int ue_rem(uint16_t rnti) override; int ue_rem(uint16_t rnti) override;
int ue_set_crnti(uint16_t temp_crnti, uint16_t crnti, sched_interface::ue_cfg_t* cfg) override;
// Indicates that the PHY config dedicated has been enabled or not // Indicates that the PHY config dedicated has been enabled or not
void phy_config_enabled(uint16_t rnti, bool enabled) override; void phy_config_enabled(uint16_t rnti, bool enabled) override;

@ -99,7 +99,6 @@ public:
int ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) final; int ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) final;
int ue_rem(uint16_t rnti) final; int ue_rem(uint16_t rnti) final;
bool ue_exists(uint16_t rnti) final; bool ue_exists(uint16_t rnti) final;
void ue_needs_ta_cmd(uint16_t rnti, uint32_t nof_ta_cmd);
void phy_config_enabled(uint16_t rnti, bool enabled); void phy_config_enabled(uint16_t rnti, bool enabled);
@ -110,7 +109,7 @@ public:
uint32_t get_dl_buffer(uint16_t rnti) final; uint32_t get_dl_buffer(uint16_t rnti) final;
int dl_rlc_buffer_state(uint16_t rnti, uint32_t lc_id, uint32_t tx_queue, uint32_t retx_queue) final; int dl_rlc_buffer_state(uint16_t rnti, uint32_t lc_id, uint32_t tx_queue, uint32_t retx_queue) final;
int dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code) final; int dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code, uint32_t nof_cmds = 1) final;
int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack) final; int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack) final;
int dl_rach_info(uint32_t enb_cc_idx, dl_sched_rar_info_t rar_info) final; int dl_rach_info(uint32_t enb_cc_idx, dl_sched_rar_info_t rar_info) final;

@ -104,7 +104,7 @@ public:
void dl_buffer_state(uint8_t lc_id, uint32_t tx_queue, uint32_t retx_queue); void dl_buffer_state(uint8_t lc_id, uint32_t tx_queue, uint32_t retx_queue);
void ul_buffer_state(uint8_t lc_id, uint32_t bsr, bool set_value = true); void ul_buffer_state(uint8_t lc_id, uint32_t bsr, bool set_value = true);
void ul_phr(int phr); void ul_phr(int phr);
void mac_buffer_state(uint32_t ce_code); void mac_buffer_state(uint32_t ce_code, uint32_t nof_cmds);
void ul_recv_len(uint32_t lcid, uint32_t len); void ul_recv_len(uint32_t lcid, uint32_t len);
void set_ul_cqi(uint32_t tti, uint32_t enb_cc_idx, uint32_t cqi, uint32_t ul_ch_code); void set_ul_cqi(uint32_t tti, uint32_t enb_cc_idx, uint32_t cqi, uint32_t ul_ch_code);
@ -157,8 +157,6 @@ public:
void set_sr(); void set_sr();
void unset_sr(); void unset_sr();
void set_needs_ta_cmd(uint32_t nof_ta_cmd);
int generate_dl_dci_format(uint32_t pid, int generate_dl_dci_format(uint32_t pid,
sched_interface::dl_sched_data_t* data, sched_interface::dl_sched_data_t* data,
uint32_t tti, uint32_t tti,
@ -217,7 +215,6 @@ private:
uint32_t get_pending_ul_old_data_unlocked(uint32_t cc_idx); uint32_t get_pending_ul_old_data_unlocked(uint32_t cc_idx);
uint32_t get_pending_ul_new_data_unlocked(uint32_t tti); uint32_t get_pending_ul_new_data_unlocked(uint32_t tti);
bool is_conres_ce_pending() const;
bool needs_cqi_unlocked(uint32_t tti, uint32_t cc_idx, bool will_send = false); bool needs_cqi_unlocked(uint32_t tti, uint32_t cc_idx, bool will_send = false);
@ -240,8 +237,6 @@ private:
uint32_t cfi, uint32_t cfi,
const rbgmask_t& user_mask); const rbgmask_t& user_mask);
bool is_first_dl_tx();
/* Args */ /* Args */
sched_interface::ue_cfg_t cfg = {}; sched_interface::ue_cfg_t cfg = {};
srslte_cell_t cell = {}; srslte_cell_t cell = {};
@ -250,10 +245,8 @@ private:
const sched_cell_params_t* main_cc_params = nullptr; const sched_cell_params_t* main_cc_params = nullptr;
/* Buffer states */ /* Buffer states */
bool sr = false; bool sr = false;
int buf_mac = 0; std::array<ue_bearer_t, sched_interface::MAX_LC> lch = {};
int buf_ul = 0;
std::array<ue_bearer_t, sched_interface::MAX_LC> lch = {};
int power_headroom = 0; int power_headroom = 0;
uint32_t cqi_request_tti = 0; uint32_t cqi_request_tti = 0;
@ -261,12 +254,6 @@ private:
uint32_t max_msg3retx = 0; uint32_t max_msg3retx = 0;
/* User State */ /* User State */
enum class ra_state_t {
msg3_sched_pending,
wait_msg3_ack,
conres_sched_pending,
conres_sent
} conres_state = ra_state_t::msg3_sched_pending;
int next_tpc_pusch = 0; int next_tpc_pusch = 0;
int next_tpc_pucch = 0; int next_tpc_pucch = 0;

@ -254,6 +254,26 @@ int mac::ue_rem(uint16_t rnti)
return 0; return 0;
} }
// Called after Msg3
int mac::ue_set_crnti(uint16_t temp_crnti, uint16_t crnti, sched_interface::ue_cfg_t* cfg)
{
int ret = ue_cfg(crnti, cfg);
if (ret != SRSLTE_SUCCESS) {
return ret;
}
srslte::rwlock_read_guard lock(rwlock);
if (temp_crnti == crnti) {
// if RNTI is maintained, Msg3 contained a RRC Setup Request
scheduler.dl_mac_buffer_state(crnti, srslte::sch_subh::CON_RES_ID);
} else {
// C-RNTI corresponds to older user. Handover scenario.
phy_h->rem_rnti(crnti);
phy_h->add_rnti(crnti, cfg->supported_cc_list[0].enb_cc_idx, false);
scheduler.dl_mac_buffer_state(crnti, srslte::sch_subh::CON_RES_ID);
}
return ret;
}
int mac::cell_cfg(const std::vector<sched_interface::cell_cfg_t>& cell_cfg_) int mac::cell_cfg(const std::vector<sched_interface::cell_cfg_t>& cell_cfg_)
{ {
cell_config = cell_cfg_; cell_config = cell_cfg_;
@ -428,7 +448,7 @@ int mac::ta_info(uint32_t tti, uint16_t rnti, float ta_us)
if (ue_db.count(rnti)) { if (ue_db.count(rnti)) {
uint32_t nof_ta_count = ue_db[rnti]->set_ta_us(ta_us); uint32_t nof_ta_count = ue_db[rnti]->set_ta_us(ta_us);
if (nof_ta_count) { if (nof_ta_count) {
scheduler.ue_needs_ta_cmd(rnti, nof_ta_count); scheduler.dl_mac_buffer_state(rnti, srslte::sch_subh::TA_CMD, nof_ta_count);
} }
} }
return SRSLTE_SUCCESS; return SRSLTE_SUCCESS;
@ -797,7 +817,7 @@ int mac::get_ul_sched(uint32_t tti_tx_ul, ul_sched_list_t& ul_sched_res_list)
for (auto& ue : ue_db) { for (auto& ue : ue_db) {
uint32_t nof_ta_count = ue.second->tick_ta_fsm(); uint32_t nof_ta_count = ue.second->tick_ta_fsm();
if (nof_ta_count) { if (nof_ta_count) {
scheduler.ue_needs_ta_cmd(ue.first, nof_ta_count); scheduler.dl_mac_buffer_state(ue.first, srslte::sch_subh::TA_CMD, nof_ta_count);
} }
} }

@ -234,11 +234,6 @@ bool sched::ue_exists(uint16_t rnti)
return ue_db_access(rnti, [](sched_ue& ue) {}) >= 0; return ue_db_access(rnti, [](sched_ue& ue) {}) >= 0;
} }
void sched::ue_needs_ta_cmd(uint16_t rnti, uint32_t nof_ta_cmd)
{
ue_db_access(rnti, [nof_ta_cmd](sched_ue& ue) { ue.set_needs_ta_cmd(nof_ta_cmd); }, __PRETTY_FUNCTION__);
}
void sched::phy_config_enabled(uint16_t rnti, bool enabled) void sched::phy_config_enabled(uint16_t rnti, bool enabled)
{ {
// TODO: Check if correct use of last_tti // TODO: Check if correct use of last_tti
@ -276,9 +271,9 @@ int sched::dl_rlc_buffer_state(uint16_t rnti, uint32_t lc_id, uint32_t tx_queue,
return ue_db_access(rnti, [&](sched_ue& ue) { ue.dl_buffer_state(lc_id, tx_queue, retx_queue); }); return ue_db_access(rnti, [&](sched_ue& ue) { ue.dl_buffer_state(lc_id, tx_queue, retx_queue); });
} }
int sched::dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code) int sched::dl_mac_buffer_state(uint16_t rnti, uint32_t ce_code, uint32_t nof_cmds)
{ {
return ue_db_access(rnti, [ce_code](sched_ue& ue) { ue.mac_buffer_state(ce_code); }); return ue_db_access(rnti, [ce_code, nof_cmds](sched_ue& ue) { ue.mac_buffer_state(ce_code, nof_cmds); });
} }
int sched::dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack) int sched::dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t enb_cc_idx, uint32_t tb_idx, bool ack)

@ -40,8 +40,6 @@ namespace srsenb {
namespace sched_utils { namespace sched_utils {
const uint32_t conres_ce_size = 6;
//! Obtains TB size *in bytes* for a given MCS and N_{PRB} //! Obtains TB size *in bytes* for a given MCS and N_{PRB}
uint32_t get_tbs_bytes(uint32_t mcs, uint32_t nof_alloc_prb, bool use_tbs_index_alt, bool is_ul) uint32_t get_tbs_bytes(uint32_t mcs, uint32_t nof_alloc_prb, bool use_tbs_index_alt, bool is_ul)
{ {
@ -123,16 +121,8 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
// update configuration // update configuration
std::vector<sched::ue_cfg_t::cc_cfg_t> prev_supported_cc_list = std::move(cfg.supported_cc_list); std::vector<sched::ue_cfg_t::cc_cfg_t> prev_supported_cc_list = std::move(cfg.supported_cc_list);
sched::ue_cfg_t::conn_state_t prev_state = cfg.conn_state;
cfg = cfg_; cfg = cfg_;
// update in connection state detected
if (prev_state != cfg.conn_state) {
if (cfg.conn_state == sched_interface::ue_cfg_t::ue_id_rx) {
conres_state = ra_state_t::conres_sched_pending;
}
}
// update bearer cfgs // update bearer cfgs
for (uint32_t i = 0; i < sched_interface::MAX_LC; ++i) { for (uint32_t i = 0; i < sched_interface::MAX_LC; ++i) {
set_bearer_cfg_unlocked(i, cfg.ue_bearers[i]); set_bearer_cfg_unlocked(i, cfg.ue_bearers[i]);
@ -150,9 +140,7 @@ void sched_ue::set_cfg(const sched_interface::ue_cfg_t& cfg_)
// One carrier was added in the place of another // One carrier was added in the place of another
carriers[ue_idx] = sched_ue_carrier{cfg, (*cell_params_list)[cc_cfg.enb_cc_idx], rnti, ue_idx}; carriers[ue_idx] = sched_ue_carrier{cfg, (*cell_params_list)[cc_cfg.enb_cc_idx], rnti, ue_idx};
if (ue_idx == 0) { if (ue_idx == 0) {
// PCell was changed possibly due to handover. Schedule a new ConRes CE to be transmitted after the Msg3 log_h->info("SCHED: PCell has changed for rnti=0x%x.\n", rnti);
conres_state = ra_state_t::conres_sched_pending;
log_h->info("SCHED: PCell has changed for rnti=0x%x. ConRes CE scheduled\n", rnti);
} }
} else { } else {
// The SCell internal configuration may have changed // The SCell internal configuration may have changed
@ -172,11 +160,8 @@ void sched_ue::reset()
sr = false; sr = false;
next_tpc_pusch = 1; next_tpc_pusch = 1;
next_tpc_pucch = 1; next_tpc_pucch = 1;
buf_mac = 0;
buf_ul = 0;
phy_config_dedicated_enabled = false; phy_config_dedicated_enabled = false;
cqi_request_tti = 0; cqi_request_tti = 0;
conres_state = ra_state_t::msg3_sched_pending;
carriers.clear(); carriers.clear();
// erase all bearers // erase all bearers
@ -237,9 +222,17 @@ void sched_ue::dl_buffer_state(uint8_t lc_id, uint32_t tx_queue, uint32_t retx_q
} }
} }
void sched_ue::mac_buffer_state(uint32_t ce_code) void sched_ue::mac_buffer_state(uint32_t ce_code, uint32_t nof_cmds)
{ {
buf_mac++; ce_cmd cmd{(int)ce_code};
for (uint32_t i = 0; i < nof_cmds; ++i) {
if (static_cast<srslte::sch_subh::cetype>(cmd.cetype) == srslte::sch_subh::CON_RES_ID) {
pending_ces.push_front(cmd);
} else {
pending_ces.push_back(cmd);
}
}
Info("SCHED: %s for rnti=0x%x needs to be scheduled\n", cmd.to_string().c_str(), rnti);
} }
void sched_ue::set_sr() void sched_ue::set_sr()
@ -252,14 +245,6 @@ void sched_ue::unset_sr()
sr = false; sr = false;
} }
void sched_ue::set_needs_ta_cmd(uint32_t nof_ta_cmd_)
{
for (uint32_t i = 0; i < nof_ta_cmd_; ++i) {
pending_ces.emplace_back(srslte::sch_subh::TA_CMD);
}
Info("SCHED: rnti=0x%x needs TA CMD\n", rnti);
}
bool sched_ue::pucch_sr_collision(uint32_t current_tti, uint32_t n_cce) bool sched_ue::pucch_sr_collision(uint32_t current_tti, uint32_t n_cce)
{ {
if (!phy_config_dedicated_enabled) { if (!phy_config_dedicated_enabled) {
@ -469,15 +454,6 @@ int sched_ue::generate_format1(uint32_t pid,
/* Allocate MAC PDU (subheaders, CEs, and SDUS) */ /* Allocate MAC PDU (subheaders, CEs, and SDUS) */
int rem_tbs = tbs; int rem_tbs = tbs;
// Allocate MAC ConRes CE
if (is_conres_ce_pending()) {
data->pdu[0][data->nof_pdu_elems[0]].lcid = srslte::sch_subh::CON_RES_ID;
data->nof_pdu_elems[0]++;
conres_state = ra_state_t::conres_sent;
rem_tbs -= sched_utils::conres_ce_size + 1;
Info("SCHED: Added MAC Contention Resolution CE for rnti=0x%x\n", rnti);
}
// Allocate MAC CE CMDs // Allocate MAC CE CMDs
while (cc_idx == 0 and not pending_ces.empty()) { while (cc_idx == 0 and not pending_ces.empty()) {
int toalloc = pending_ces.front().get_req_bytes(cfg); int toalloc = pending_ces.front().get_req_bytes(cfg);
@ -778,18 +754,6 @@ uint32_t sched_ue::get_max_retx()
return cfg.maxharq_tx; return cfg.maxharq_tx;
} }
bool sched_ue::is_first_dl_tx()
{
for (const sched_ue_carrier& c : carriers) {
for (const auto& h : c.harq_ent.dl_harq_procs()) {
if (h.nof_tx(0) > 0) {
return false;
}
}
}
return true;
}
bool sched_ue::needs_cqi(uint32_t tti, uint32_t cc_idx, bool will_be_sent) bool sched_ue::needs_cqi(uint32_t tti, uint32_t cc_idx, bool will_be_sent)
{ {
return needs_cqi_unlocked(tti, cc_idx, will_be_sent); return needs_cqi_unlocked(tti, cc_idx, will_be_sent);
@ -816,20 +780,12 @@ bool sched_ue::needs_cqi_unlocked(uint32_t tti, uint32_t cc_idx, bool will_be_se
return ret; return ret;
} }
bool sched_ue::is_conres_ce_pending() const
{
return conres_state == ra_state_t::conres_sched_pending;
}
/// Use this function in the dl-metric to get the bytes to be scheduled. It accounts for the UE data, /// Use this function in the dl-metric to get the bytes to be scheduled. It accounts for the UE data,
/// the RAR resources, and headers /// the RAR resources, and headers
/// \return number of bytes to be allocated /// \return number of bytes to be allocated
uint32_t sched_ue::get_pending_dl_new_data_total() uint32_t sched_ue::get_pending_dl_new_data_total()
{ {
uint32_t req_bytes = get_pending_dl_new_data(); uint32_t req_bytes = get_pending_dl_new_data();
if (is_conres_ce_pending()) {
req_bytes += sched_utils::conres_ce_size; // Account for ConRes
}
if (req_bytes > 0) { if (req_bytes > 0) {
req_bytes += (req_bytes < 128) ? 2 : 3; // consider the header req_bytes += (req_bytes < 128) ? 2 : 3; // consider the header
} }
@ -882,8 +838,7 @@ rbg_range_t sched_ue::get_required_dl_rbgs(uint32_t ue_cc_idx)
*/ */
std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_idx) std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_idx)
{ {
const uint32_t ce_subheader_size = 1; const uint32_t min_alloc_bytes = 5; // 2 for subheader, and 3 for RLC header
const uint32_t min_alloc_bytes = 5; // 2 for subheader, and 3 for RLC header
// Convenience function to compute the number of bytes allocated for a given SDU // Convenience function to compute the number of bytes allocated for a given SDU
auto compute_sdu_total_bytes = [&min_alloc_bytes](uint32_t lcid, uint32_t buffer_bytes) { auto compute_sdu_total_bytes = [&min_alloc_bytes](uint32_t lcid, uint32_t buffer_bytes) {
if (buffer_bytes == 0) { if (buffer_bytes == 0) {
@ -900,7 +855,7 @@ std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_id
log_h->error("SRB0 must always be activated for DL\n"); log_h->error("SRB0 must always be activated for DL\n");
return {0, 0}; return {0, 0};
} }
if (conres_state == ra_state_t::msg3_sched_pending or conres_state == ra_state_t::wait_msg3_ack) { if (not carriers[ue_cc_idx].is_active()) {
return {0, 0}; return {0, 0};
} }
@ -913,9 +868,6 @@ std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_id
} }
// Add pending CEs // Add pending CEs
if (is_dci_format1 and ue_cc_idx == 0) { if (is_dci_format1 and ue_cc_idx == 0) {
if (is_conres_ce_pending()) {
sum_ce_data = sched_utils::conres_ce_size + ce_subheader_size;
}
for (const auto& ce : pending_ces) { for (const auto& ce : pending_ces) {
sum_ce_data += ce.get_req_bytes(cfg); sum_ce_data += ce.get_req_bytes(cfg);
} }
@ -931,8 +883,8 @@ std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_id
/* Set Minimum boundary */ /* Set Minimum boundary */
min_data = srb0_data; min_data = srb0_data;
if (is_conres_ce_pending()) { if (pending_ces.front().cetype == srslte::sch_subh::CON_RES_ID) {
min_data += sched_utils::conres_ce_size + ce_subheader_size; min_data += pending_ces.front().get_req_bytes(cfg);
} }
if (min_data == 0) { if (min_data == 0) {
if (sum_ce_data > 0) { if (sum_ce_data > 0) {
@ -951,9 +903,10 @@ std::pair<uint32_t, uint32_t> sched_ue::get_requested_dl_bytes(uint32_t ue_cc_id
*/ */
uint32_t sched_ue::get_pending_dl_new_data() uint32_t sched_ue::get_pending_dl_new_data()
{ {
if (conres_state == ra_state_t::msg3_sched_pending or conres_state == ra_state_t::wait_msg3_ack) { if (std::count_if(carriers.begin(), carriers.end(), [](const sched_ue_carrier& cc) { return cc.is_active(); }) == 0) {
return 0; return 0;
} }
uint32_t pending_data = 0; uint32_t pending_data = 0;
for (int i = 0; i < sched_interface::MAX_LC; i++) { for (int i = 0; i < sched_interface::MAX_LC; i++) {
if (bearer_is_dl(&lch[i])) { if (bearer_is_dl(&lch[i])) {

@ -1448,7 +1448,8 @@ void rrc::ue::setup_erab(uint8_t id,
erab_info_list[id] = allocate_unique_buffer(*pool); erab_info_list[id] = allocate_unique_buffer(*pool);
memcpy(erab_info_list[id]->msg, nas_pdu->data(), nas_pdu->size()); memcpy(erab_info_list[id]->msg, nas_pdu->data(), nas_pdu->size());
erab_info_list[id]->N_bytes = nas_pdu->size(); erab_info_list[id]->N_bytes = nas_pdu->size();
parent->rrc_log->info_hex(erab_info_list[id]->msg, erab_info_list[id]->N_bytes, "setup_erab nas_pdu -> erab_info rnti 0x%x", rnti); parent->rrc_log->info_hex(
erab_info_list[id]->msg, erab_info_list[id]->N_bytes, "setup_erab nas_pdu -> erab_info rnti 0x%x", rnti);
} }
} }
@ -1639,10 +1640,13 @@ void rrc::ue::send_connection_setup(bool is_setup)
current_sched_ue_cfg.pucch_cfg.n_rb_2 = sib2.rr_cfg_common.pucch_cfg_common.nrb_cqi; current_sched_ue_cfg.pucch_cfg.n_rb_2 = sib2.rr_cfg_common.pucch_cfg_common.nrb_cqi;
current_sched_ue_cfg.pucch_cfg.N_pucch_1 = sib2.rr_cfg_common.pucch_cfg_common.n1_pucch_an; current_sched_ue_cfg.pucch_cfg.N_pucch_1 = sib2.rr_cfg_common.pucch_cfg_common.n1_pucch_an;
current_sched_ue_cfg.dl_ant_info = srslte::make_ant_info_ded(phy_cfg->ant_info.explicit_value()); current_sched_ue_cfg.dl_ant_info = srslte::make_ant_info_ded(phy_cfg->ant_info.explicit_value());
current_sched_ue_cfg.conn_state = sched_interface::ue_cfg_t::ue_id_rx;
// Configure MAC // Configure MAC
parent->mac->ue_cfg(rnti, &current_sched_ue_cfg); if (is_setup) {
parent->mac->ue_set_crnti(rnti, rnti, &current_sched_ue_cfg);
} else {
parent->mac->ue_cfg(rnti, &current_sched_ue_cfg);
}
// Configure SRB1 in RLC // Configure SRB1 in RLC
parent->rlc->add_bearer(rnti, 1, srslte::rlc_config_t::srb_config(1)); parent->rlc->add_bearer(rnti, 1, srslte::rlc_config_t::srb_config(1));
@ -1851,7 +1855,6 @@ void rrc::ue::send_connection_reconf(srslte::unique_byte_buffer_t pdu)
conn_reconf->rr_cfg_ded.srb_to_add_mod_list[0].rlc_cfg_present = true; conn_reconf->rr_cfg_ded.srb_to_add_mod_list[0].rlc_cfg_present = true;
conn_reconf->rr_cfg_ded.srb_to_add_mod_list[0].rlc_cfg.set(srb_to_add_mod_s::rlc_cfg_c_::types::default_value); conn_reconf->rr_cfg_ded.srb_to_add_mod_list[0].rlc_cfg.set(srb_to_add_mod_s::rlc_cfg_c_::types::default_value);
// Configure SRB2 in RLC and PDCP // Configure SRB2 in RLC and PDCP
parent->rlc->add_bearer(rnti, 2, srslte::rlc_config_t::srb_config(2)); parent->rlc->add_bearer(rnti, 2, srslte::rlc_config_t::srb_config(2));
@ -1875,9 +1878,9 @@ void rrc::ue::send_connection_reconf(srslte::unique_byte_buffer_t pdu)
// Configure all DRBs // Configure all DRBs
uint8_t vec_idx = 0; uint8_t vec_idx = 0;
for (const std::pair<uint8_t, erab_t>& erab_id_pair : erabs) { for (const std::pair<uint8_t, erab_t>& erab_id_pair : erabs) {
const erab_t& erab = erab_id_pair.second; const erab_t& erab = erab_id_pair.second;
uint8_t drb_id = erab.id - 4; uint8_t drb_id = erab.id - 4;
uint8_t lcid = erab.id - 2; uint8_t lcid = erab.id - 2;
// Get DRB1 configuration // Get DRB1 configuration
if (get_drbid_config(&conn_reconf->rr_cfg_ded.drb_to_add_mod_list[drb_id - 1], drb_id)) { if (get_drbid_config(&conn_reconf->rr_cfg_ded.drb_to_add_mod_list[drb_id - 1], drb_id)) {

@ -33,6 +33,7 @@ public:
void reset() override {} void reset() override {}
int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) override { return 0; } int ue_cfg(uint16_t rnti, sched_interface::ue_cfg_t* cfg) override { return 0; }
int ue_rem(uint16_t rnti) override { return 0; } int ue_rem(uint16_t rnti) override { return 0; }
int ue_set_crnti(uint16_t temp_crnti, uint16_t crnti, sched_interface::ue_cfg_t* cfg) override { return 0; }
int bearer_ue_cfg(uint16_t rnti, uint32_t lc_id, sched_interface::ue_bearer_cfg_t* cfg) override { return 0; } int bearer_ue_cfg(uint16_t rnti, uint32_t lc_id, sched_interface::ue_bearer_cfg_t* cfg) override { return 0; }
int bearer_ue_rem(uint16_t rnti, uint32_t lc_id) override { return 0; } int bearer_ue_rem(uint16_t rnti, uint32_t lc_id) override { return 0; }
void phy_config_enabled(uint16_t rnti, bool enabled) override {} void phy_config_enabled(uint16_t rnti, bool enabled) override {}
@ -79,15 +80,13 @@ class s1ap_dummy : public s1ap_interface_rrc
{ {
public: public:
void initial_ue(uint16_t rnti, asn1::s1ap::rrc_establishment_cause_e cause, srslte::unique_byte_buffer_t pdu) override void initial_ue(uint16_t rnti, asn1::s1ap::rrc_establishment_cause_e cause, srslte::unique_byte_buffer_t pdu) override
{ {}
}
void initial_ue(uint16_t rnti, void initial_ue(uint16_t rnti,
asn1::s1ap::rrc_establishment_cause_e cause, asn1::s1ap::rrc_establishment_cause_e cause,
srslte::unique_byte_buffer_t pdu, srslte::unique_byte_buffer_t pdu,
uint32_t m_tmsi, uint32_t m_tmsi,
uint8_t mmec) override uint8_t mmec) override
{ {}
}
void write_pdu(uint16_t rnti, srslte::unique_byte_buffer_t pdu) override {} void write_pdu(uint16_t rnti, srslte::unique_byte_buffer_t pdu) override {}
bool user_exists(uint16_t rnti) override { return true; } bool user_exists(uint16_t rnti) override { return true; }
@ -113,8 +112,7 @@ class phy_dummy : public phy_interface_rrc_lte
public: public:
void void
configure_mbsfn(asn1::rrc::sib_type2_s* sib2, asn1::rrc::sib_type13_r9_s* sib13, asn1::rrc::mcch_msg_s mcch) override configure_mbsfn(asn1::rrc::sib_type2_s* sib2, asn1::rrc::sib_type13_r9_s* sib13, asn1::rrc::mcch_msg_s mcch) override
{ {}
}
void set_config_dedicated(uint16_t rnti, const phy_rrc_dedicated_list_t& dedicated_list) override {} void set_config_dedicated(uint16_t rnti, const phy_rrc_dedicated_list_t& dedicated_list) override {}
}; };

@ -886,10 +886,7 @@ int common_sched_tester::process_tti_events(const tti_ev& tti_ev)
if (pending_dl_new_data == 0) { if (pending_dl_new_data == 0) {
uint32_t lcid = 0; // Use SRB0 to schedule Msg4 uint32_t lcid = 0; // Use SRB0 to schedule Msg4
dl_rlc_buffer_state(ue_ev.rnti, lcid, 50, 0); dl_rlc_buffer_state(ue_ev.rnti, lcid, 50, 0);
auto current_ue_cfg = *get_current_ue_cfg(ue_ev.rnti); dl_mac_buffer_state(ue_ev.rnti, srslte::sch_subh::cetype::CON_RES_ID);
current_ue_cfg.conn_state = ue_cfg_t::ue_id_rx;
TESTASSERT(ue_cfg(ue_ev.rnti, current_ue_cfg) == SRSLTE_SUCCESS);
ue_tester->user_reconf(ue_ev.rnti, current_ue_cfg);
} else { } else {
// Let SRB0 Msg4 get fully transmitted // Let SRB0 Msg4 get fully transmitted
} }

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