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nr,gnb: implementation of sib and mib asn1 generation functions

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master
Francisco 3 years ago committed by Francisco Paisana
parent 96fd3aae3c
commit 5f3afffd05
9 changed files with 335 additions and 18 deletions
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17
lib/include/srsran/interfaces/gnb_rrc_nr_interfaces.h
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@ -12,7 +12,6 @@
#ifndef SRSRAN_GNB_RRC_NR_INTERFACES_H
#define SRSRAN_GNB_RRC_NR_INTERFACES_H
#include "srsenb/hdr/phy/phy_interfaces.h"
#include "srsran/asn1/ngap.h"
#include "srsran/common/byte_buffer.h"
@ -33,22 +32,6 @@ public:
virtual void write_dl_info(uint16_t rnti, srsran::unique_byte_buffer_t sdu) = 0;
};
// Cell/Sector configuration for NR cells
struct rrc_cell_cfg_nr_t {
phy_cell_cfg_nr_t phy_cell; // already contains all PHY-related parameters (i.e. RF port, PCI, etc.)
uint32_t tac; // Tracking area code
uint32_t dl_arfcn; // DL freq already included in phy_cell
uint32_t ul_arfcn; // UL freq also in phy_cell
uint32_t dl_absolute_freq_point_a; // derived from DL ARFCN
uint32_t ul_absolute_freq_point_a; // derived from UL ARFCN
uint32_t ssb_absolute_freq_point; // derived from DL ARFCN
uint32_t band;
srsran_duplex_mode_t duplex_mode;
srsran_ssb_cfg_t ssb_cfg;
};
typedef std::vector<rrc_cell_cfg_nr_t> rrc_cell_list_nr_t;
} // namespace srsenb
#endif // SRSRAN_GNB_RRC_NR_INTERFACES_H

43
lib/include/srsran/rrc/nr/rrc_nr_cfg_utils.h
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@ -0,0 +1,43 @@
/**
*
* \section COPYRIGHT
*
* Copyright 2013-2021 Software Radio Systems Limited
*
* By using this file, you agree to the terms and conditions set
* forth in the LICENSE file which can be found at the top level of
* the distribution.
*
*/
#ifndef SRSRAN_RRC_NR_CFG_UTILS_H
#define SRSRAN_RRC_NR_CFG_UTILS_H
#include "srsran/asn1/rrc_nr.h"
#include "srsran/interfaces/gnb_rrc_nr_interfaces.h"
namespace srsran {
struct basic_cell_args_t {
uint32_t cell_id = 0x19B01;
uint32_t nof_prbs = 52;
uint32_t scs = 15;
bool is_standalone = true;
bool is_fdd = true;
std::string plmn = "90170";
uint32_t tac = 7;
};
void generate_default_pdcch_cfg_common(asn1::rrc_nr::pdcch_cfg_common_s& cfg, const basic_cell_args_t& args = {});
void generate_default_init_dl_bwp(asn1::rrc_nr::bwp_dl_common_s& cfg, const basic_cell_args_t& args = {});
void generate_default_dl_cfg_common(asn1::rrc_nr::dl_cfg_common_s& cfg, const basic_cell_args_t& args = {});
void generate_default_mib(const basic_cell_args_t& args, asn1::rrc_nr::mib_s& cfg);
void generate_default_serv_cell_cfg_common_sib(const basic_cell_args_t& args,
asn1::rrc_nr::serving_cell_cfg_common_sib_s& cfg);
void generate_default_sib1(const basic_cell_args_t& args, asn1::rrc_nr::sib1_s& cfg);
} // namespace srsran
#endif // SRSRAN_RRC_NR_CFG_UTILS_H

1
lib/src/CMakeLists.txt
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@ -11,6 +11,7 @@ add_subdirectory(common)
add_subdirectory(mac)
add_subdirectory(phy)
add_subdirectory(radio)
add_subdirectory(rrc)
add_subdirectory(rlc)
add_subdirectory(pdcp)
add_subdirectory(gtpu)

10
lib/src/rrc/CMakeLists.txt
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@ -0,0 +1,10 @@
#
# Copyright 2013-2021 Software Radio Systems Limited
#
# By using this file, you agree to the terms and conditions set
# forth in the LICENSE file which can be found at the top level of
# the distribution.
#
set(SOURCES nr/rrc_nr_cfg_utils.cc)
add_library(srsran_rrc_nr STATIC ${SOURCES})

239
lib/src/rrc/nr/rrc_nr_cfg_utils.cc
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@ -0,0 +1,239 @@
/**
*
* \section COPYRIGHT
*
* Copyright 2013-2021 Software Radio Systems Limited
*
* By using this file, you agree to the terms and conditions set
* forth in the LICENSE file which can be found at the top level of
* the distribution.
*
*/
#include "srsran/rrc/nr/rrc_nr_cfg_utils.h"
#include "srsran/asn1/rrc_nr.h"
#include "srsran/asn1/rrc_nr_utils.h"
using namespace asn1::rrc_nr;
namespace srsran {
void generate_default_pdcch_cfg_common(const basic_cell_args_t& args, pdcch_cfg_common_s& cfg)
{
cfg.ctrl_res_set_zero_present = true;
cfg.ctrl_res_set_zero = 0;
cfg.common_ctrl_res_set_present = false;
cfg.search_space_zero_present = true;
cfg.search_space_zero = 0;
cfg.common_search_space_list_present = true;
cfg.common_search_space_list.resize(1);
search_space_s& ss = cfg.common_search_space_list[0];
ss.search_space_id = 1;
ss.ctrl_res_set_id_present = true;
ss.ctrl_res_set_id = 0;
ss.monitoring_slot_periodicity_and_offset_present = true;
ss.monitoring_slot_periodicity_and_offset.set_sl1();
ss.monitoring_symbols_within_slot_present = true;
ss.monitoring_symbols_within_slot.from_number(0x2000);
ss.nrof_candidates_present = true;
ss.nrof_candidates.aggregation_level1.value = search_space_s::nrof_candidates_s_::aggregation_level1_opts::n0;
ss.nrof_candidates.aggregation_level2.value = search_space_s::nrof_candidates_s_::aggregation_level2_opts::n0;
ss.nrof_candidates.aggregation_level4.value = search_space_s::nrof_candidates_s_::aggregation_level4_opts::n1;
ss.nrof_candidates.aggregation_level8.value = search_space_s::nrof_candidates_s_::aggregation_level8_opts::n0;
ss.nrof_candidates.aggregation_level16.value = search_space_s::nrof_candidates_s_::aggregation_level16_opts::n0;
ss.search_space_type_present = true;
auto& common = ss.search_space_type.set_common();
common.dci_format0_minus0_and_format1_minus0_present = true;
cfg.search_space_sib1_present = true;
cfg.search_space_sib1 = 0;
cfg.search_space_other_sys_info_present = true;
cfg.search_space_other_sys_info = 1;
cfg.paging_search_space_present = true;
cfg.paging_search_space = 1;
cfg.ra_search_space_present = true;
cfg.ra_search_space = 1;
}
void generate_default_pdsch_cfg_common(const basic_cell_args_t& args, pdsch_cfg_common_s& cfg)
{
cfg.pdsch_time_domain_alloc_list_present = true;
cfg.pdsch_time_domain_alloc_list.resize(1);
cfg.pdsch_time_domain_alloc_list[0].map_type.value = pdsch_time_domain_res_alloc_s::map_type_opts::type_a;
cfg.pdsch_time_domain_alloc_list[0].start_symbol_and_len = 40;
}
void generate_default_init_dl_bwp(const basic_cell_args_t& args, bwp_dl_common_s& cfg)
{
cfg.generic_params.location_and_bw = 14025;
asn1::number_to_enum(cfg.generic_params.subcarrier_spacing, args.scs);
cfg.pdcch_cfg_common_present = true;
generate_default_pdcch_cfg_common(args, cfg.pdcch_cfg_common.set_setup());
cfg.pdsch_cfg_common_present = true;
generate_default_pdsch_cfg_common(args, cfg.pdsch_cfg_common.set_setup());
}
void generate_default_dl_cfg_common(dl_cfg_common_s& cfg, const basic_cell_args_t& args)
{
cfg.init_dl_bwp_present = true;
generate_default_init_dl_bwp(args, cfg.init_dl_bwp);
}
void generate_default_dl_cfg_common_sib(const basic_cell_args_t& args, dl_cfg_common_sib_s& cfg)
{
cfg.freq_info_dl.freq_band_list.resize(1);
cfg.freq_info_dl.freq_band_list[0].freq_band_ind_nr_present = true;
cfg.freq_info_dl.freq_band_list[0].freq_band_ind_nr = 20;
cfg.freq_info_dl.offset_to_point_a = 24;
cfg.freq_info_dl.scs_specific_carrier_list.resize(1);
cfg.freq_info_dl.scs_specific_carrier_list[0].offset_to_carrier = 0;
asn1::number_to_enum(cfg.freq_info_dl.scs_specific_carrier_list[0].subcarrier_spacing, args.scs);
cfg.freq_info_dl.scs_specific_carrier_list[0].carrier_bw = args.nof_prbs;
generate_default_init_dl_bwp(args, cfg.init_dl_bwp);
// disable InitialBWP-Only fields
cfg.init_dl_bwp.pdcch_cfg_common.setup().ctrl_res_set_zero_present = false;
cfg.init_dl_bwp.pdcch_cfg_common.setup().search_space_zero_present = false;
cfg.bcch_cfg.mod_period_coeff.value = bcch_cfg_s::mod_period_coeff_opts::n4;
cfg.pcch_cfg.default_paging_cycle.value = paging_cycle_opts::rf128;
cfg.pcch_cfg.nand_paging_frame_offset.set_one_t();
cfg.pcch_cfg.ns.value = pcch_cfg_s::ns_opts::one;
}
void generate_default_rach_cfg_common(const basic_cell_args_t& args, rach_cfg_common_s& cfg)
{
cfg.rach_cfg_generic.prach_cfg_idx = 16;
cfg.rach_cfg_generic.msg1_fdm.value = rach_cfg_generic_s::msg1_fdm_opts::one;
cfg.rach_cfg_generic.msg1_freq_start = 0;
cfg.rach_cfg_generic.zero_correlation_zone_cfg = 15;
cfg.rach_cfg_generic.preamb_rx_target_pwr = -110;
cfg.rach_cfg_generic.preamb_trans_max.value = rach_cfg_generic_s::preamb_trans_max_opts::n7;
cfg.rach_cfg_generic.pwr_ramp_step.value = rach_cfg_generic_s::pwr_ramp_step_opts::db4;
cfg.rach_cfg_generic.ra_resp_win.value = rach_cfg_generic_s::ra_resp_win_opts::sl10;
cfg.ssb_per_rach_occasion_and_cb_preambs_per_ssb_present = true;
cfg.ssb_per_rach_occasion_and_cb_preambs_per_ssb.set_one().value =
rach_cfg_common_s::ssb_per_rach_occasion_and_cb_preambs_per_ssb_c_::one_opts::n8;
cfg.ra_contention_resolution_timer.value = rach_cfg_common_s::ra_contention_resolution_timer_opts::sf64;
cfg.prach_root_seq_idx.set_l839() = 1;
cfg.restricted_set_cfg.value = rach_cfg_common_s::restricted_set_cfg_opts::unrestricted_set;
}
void generate_default_ul_cfg_common_sib(const basic_cell_args_t& args, ul_cfg_common_sib_s& cfg)
{
cfg.freq_info_ul.scs_specific_carrier_list.resize(1);
cfg.freq_info_ul.scs_specific_carrier_list[0].offset_to_carrier = 0;
asn1::number_to_enum(cfg.freq_info_ul.scs_specific_carrier_list[0].subcarrier_spacing, args.scs);
cfg.freq_info_ul.scs_specific_carrier_list[0].carrier_bw = args.nof_prbs;
cfg.init_ul_bwp.generic_params.location_and_bw = 14025;
asn1::number_to_enum(cfg.init_ul_bwp.generic_params.subcarrier_spacing, args.scs);
cfg.init_ul_bwp.rach_cfg_common_present = true;
generate_default_rach_cfg_common(args, cfg.init_ul_bwp.rach_cfg_common.set_setup());
cfg.init_ul_bwp.pusch_cfg_common_present = true;
pusch_cfg_common_s& pusch = cfg.init_ul_bwp.pusch_cfg_common.set_setup();
pusch.pusch_time_domain_alloc_list_present = true;
pusch.pusch_time_domain_alloc_list.resize(1);
pusch.pusch_time_domain_alloc_list[0].k2_present = true;
pusch.pusch_time_domain_alloc_list[0].k2 = 4;
pusch.pusch_time_domain_alloc_list[0].map_type.value = pusch_time_domain_res_alloc_s::map_type_opts::type_a;
pusch.pusch_time_domain_alloc_list[0].start_symbol_and_len = 27;
pusch.p0_nominal_with_grant_present = true;
pusch.p0_nominal_with_grant = -76;
cfg.init_ul_bwp.pucch_cfg_common_present = true;
pucch_cfg_common_s& pucch = cfg.init_ul_bwp.pucch_cfg_common.set_setup();
pucch.pucch_res_common_present = true;
pucch.pucch_res_common = 11;
pucch.pucch_group_hop.value = pucch_cfg_common_s::pucch_group_hop_opts::neither;
pucch.p0_nominal_present = true;
pucch.p0_nominal = -90;
cfg.time_align_timer_common.value = time_align_timer_opts::infinity;
}
void generate_default_serv_cell_cfg_common_sib(const basic_cell_args_t& args, serving_cell_cfg_common_sib_s& cfg)
{
generate_default_dl_cfg_common_sib(args, cfg.dl_cfg_common);
cfg.ul_cfg_common_present = true;
generate_default_ul_cfg_common_sib(args, cfg.ul_cfg_common);
cfg.ssb_positions_in_burst.in_one_group.from_number(0x80);
cfg.ssb_periodicity_serving_cell.value = serving_cell_cfg_common_sib_s::ssb_periodicity_serving_cell_opts::ms20;
cfg.ss_pbch_block_pwr = -16;
}
void generate_default_mib(const basic_cell_args_t& args, mib_s& cfg)
{
asn1::number_to_enum(cfg.sub_carrier_spacing_common, args.scs);
cfg.ssb_subcarrier_offset = 0;
cfg.intra_freq_resel.value = mib_s::intra_freq_resel_opts::allowed;
cfg.cell_barred.value = mib_s::cell_barred_opts::not_barred;
cfg.pdcch_cfg_sib1.search_space_zero = 0;
cfg.pdcch_cfg_sib1.ctrl_res_set_zero = 0;
cfg.dmrs_type_a_position.value = mib_s::dmrs_type_a_position_opts::pos2;
cfg.sys_frame_num.from_number(0);
}
void generate_default_sib1(const basic_cell_args_t& args, sib1_s& cfg)
{
cfg.cell_sel_info_present = true;
cfg.cell_sel_info.q_rx_lev_min = -70;
cfg.cell_sel_info.q_qual_min_present = true;
cfg.cell_sel_info.q_qual_min = -20;
cfg.cell_access_related_info.plmn_id_list.resize(1);
cfg.cell_access_related_info.plmn_id_list[0].plmn_id_list.resize(1);
srsran::plmn_id_t plmn;
plmn.from_string(args.plmn);
srsran::to_asn1(&cfg.cell_access_related_info.plmn_id_list[0].plmn_id_list[0], plmn);
cfg.cell_access_related_info.plmn_id_list[0].tac_present = true;
cfg.cell_access_related_info.plmn_id_list[0].tac.from_number(args.tac);
cfg.cell_access_related_info.plmn_id_list[0].cell_id.from_number(args.cell_id);
cfg.cell_access_related_info.plmn_id_list[0].cell_reserved_for_oper.value =
plmn_id_info_s::cell_reserved_for_oper_opts::not_reserved;
cfg.conn_est_fail_ctrl_present = true;
cfg.conn_est_fail_ctrl.conn_est_fail_count.value = conn_est_fail_ctrl_s::conn_est_fail_count_opts::n1;
cfg.conn_est_fail_ctrl.conn_est_fail_offset_validity.value =
conn_est_fail_ctrl_s::conn_est_fail_offset_validity_opts::s30;
cfg.conn_est_fail_ctrl.conn_est_fail_offset_present = true;
cfg.conn_est_fail_ctrl.conn_est_fail_offset = 1;
// cfg.si_sched_info_present = true;
// cfg.si_sched_info.si_request_cfg.rach_occasions_si_present = true;
// cfg.si_sched_info.si_request_cfg.rach_occasions_si.rach_cfg_si.ra_resp_win.value =
// rach_cfg_generic_s::ra_resp_win_opts::sl8;
// cfg.si_sched_info.si_win_len.value = si_sched_info_s::si_win_len_opts::s20;
// cfg.si_sched_info.sched_info_list.resize(1);
// cfg.si_sched_info.sched_info_list[0].si_broadcast_status.value =
// sched_info_s::si_broadcast_status_opts::broadcasting; cfg.si_sched_info.sched_info_list[0].si_periodicity.value =
// sched_info_s::si_periodicity_opts::rf16; cfg.si_sched_info.sched_info_list[0].sib_map_info.resize(1);
// // scheduling of SI messages
// cfg.si_sched_info.sched_info_list[0].sib_map_info[0].type.value = sib_type_info_s::type_opts::sib_type2;
// cfg.si_sched_info.sched_info_list[0].sib_map_info[0].value_tag_present = true;
// cfg.si_sched_info.sched_info_list[0].sib_map_info[0].value_tag = 0;
cfg.serving_cell_cfg_common_present = true;
generate_default_serv_cell_cfg_common_sib(args, cfg.serving_cell_cfg_common);
cfg.ue_timers_and_consts_present = true;
cfg.ue_timers_and_consts.t300.value = ue_timers_and_consts_s::t300_opts::ms1000;
cfg.ue_timers_and_consts.t301.value = ue_timers_and_consts_s::t301_opts::ms1000;
cfg.ue_timers_and_consts.t310.value = ue_timers_and_consts_s::t310_opts::ms1000;
cfg.ue_timers_and_consts.n310.value = ue_timers_and_consts_s::n310_opts::n1;
cfg.ue_timers_and_consts.t311.value = ue_timers_and_consts_s::t311_opts::ms30000;
cfg.ue_timers_and_consts.n311.value = ue_timers_and_consts_s::n311_opts::n1;
cfg.ue_timers_and_consts.t319.value = ue_timers_and_consts_s::t319_opts::ms1000;
}
} // namespace srsran

5
srsenb/hdr/stack/rrc/nr/cell_asn1_config.h
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@ -20,6 +20,9 @@ namespace srsenb {
int fill_sp_cell_cfg_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, asn1::rrc_nr::sp_cell_cfg_s& sp_cell);
}
int fill_mib_from_enb_cfg(const rrc_nr_cfg_t& cfg, asn1::rrc_nr::mib_s& mib);
int fill_sib1_from_enb_cfg(const rrc_nr_cfg_t& cfg, asn1::rrc_nr::sib1_s& sib1);
} // namespace srsenb
#endif // SRSRAN_CELL_ASN1_CONFIG_H

18
srsenb/hdr/stack/rrc/nr/rrc_config_nr.h
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@ -14,6 +14,7 @@
#define SRSRAN_RRC_CONFIG_NR_H
#include "../rrc_config_common.h"
#include "srsenb/hdr/phy/phy_interfaces.h"
#include "srsran/asn1/rrc_nr.h"
#include "srsran/interfaces/gnb_rrc_nr_interfaces.h"
#include "srsue/hdr/phy/phy_common.h"
@ -29,6 +30,22 @@ struct rrc_nr_cfg_sr_t {
uint32_t nof_subframes;
};
// Cell/Sector configuration for NR cells
struct rrc_cell_cfg_nr_t {
phy_cell_cfg_nr_t phy_cell; // already contains all PHY-related parameters (i.e. RF port, PCI, etc.)
uint32_t tac; // Tracking area code
uint32_t dl_arfcn; // DL freq already included in phy_cell
uint32_t ul_arfcn; // UL freq also in phy_cell
uint32_t dl_absolute_freq_point_a; // derived from DL ARFCN
uint32_t ul_absolute_freq_point_a; // derived from UL ARFCN
uint32_t ssb_absolute_freq_point; // derived from DL ARFCN
uint32_t band;
srsran_duplex_mode_t duplex_mode;
srsran_ssb_cfg_t ssb_cfg;
};
typedef std::vector<rrc_cell_cfg_nr_t> rrc_cell_list_nr_t;
struct rrc_nr_cfg_t {
asn1::rrc_nr::mib_s mib;
asn1::rrc_nr::sib1_s sib1;
@ -39,6 +56,7 @@ struct rrc_nr_cfg_t {
rrc_cell_list_nr_t cell_list;
asn1::rrc_nr::rach_cfg_common_s rach_cfg_common;
uint16_t prach_root_seq_idx_type;
bool is_standalone;
std::string log_name = "RRC-NR";
std::string log_level;

1
srsenb/src/stack/rrc/CMakeLists.txt
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@ -11,3 +11,4 @@ add_library(srsenb_rrc STATIC ${SOURCES})
set(SOURCES rrc_nr.cc nr/cell_asn1_config.cc)
add_library(srsgnb_rrc STATIC ${SOURCES})
target_link_libraries(srsgnb_rrc srsran_rrc_nr)

19
srsenb/src/stack/rrc/nr/cell_asn1_config.cc
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@ -11,6 +11,7 @@
*/
#include "srsenb/hdr/stack/rrc/nr/cell_asn1_config.h"
#include "srsran/rrc/nr/rrc_nr_cfg_utils.h"
#include <bitset>
using namespace asn1::rrc_nr;
@ -590,4 +591,22 @@ int fill_sp_cell_cfg_from_enb_cfg(const rrc_nr_cfg_t& cfg, uint32_t cc, sp_cell_
return SRSRAN_SUCCESS;
}
int fill_mib_from_enb_cfg(const rrc_nr_cfg_t& cfg, asn1::rrc_nr::mib_s& mib)
{
srsran::basic_cell_args_t args;
args.scs = cfg.cell_list[0].phy_cell.carrier.scs;
srsran::generate_default_mib(args, mib);
return SRSRAN_SUCCESS;
}
int fill_sib1_from_enb_cfg(const rrc_nr_cfg_t& cfg, asn1::rrc_nr::sib1_s& sib1)
{
srsran::basic_cell_args_t args;
args.is_standalone = cfg.is_standalone;
args.scs = subcarrier_spacing_e{(subcarrier_spacing_opts::options)cfg.cell_list[0].phy_cell.carrier.scs}.to_number();
args.is_fdd = cfg.cell_list[0].duplex_mode == SRSRAN_DUPLEX_MODE_FDD;
srsran::generate_default_sib1(args, sib1);
return SRSRAN_SUCCESS;
}
} // namespace srsenb

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