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@ -1279,23 +1279,18 @@ void rrc::ue::handle_rrc_reconf_complete(rrc_conn_recfg_complete_s* msg, srslte:
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parent->phy->complete_config_dedicated(rnti);
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if (last_rrc_conn_recfg.rrc_transaction_id == msg->rrc_transaction_id) {
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// Finally, add secondary carriers
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// TODO: For now the ue supports all cc
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using cc_cfg_t = sched_interface::ue_cfg_t::cc_cfg_t;
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// Finally, add secondary carriers to MAC
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auto& list = current_sched_ue_cfg.supported_cc_list;
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auto& scell_list = parent->cfg.cell_list[current_sched_ue_cfg.supported_cc_list[0].enb_cc_idx].scell_list;
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for (uint32_t i = 0; i < parent->cfg.cell_list.size(); ++i) {
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auto& c = parent->cfg.cell_list[i];
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auto it = std::find_if(list.begin(), list.end(), [i](const cc_cfg_t& u) { return u.enb_cc_idx == i; });
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auto scell_it = std::find_if(
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scell_list.begin(), scell_list.end(), [&c](const scell_cfg_t& s) { return s.cell_id == c.cell_id; });
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if (it == list.end() and scell_it != scell_list.end()) {
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list.emplace_back();
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list.back().active = true;
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list.back().enb_cc_idx = i;
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for (const auto& id_cell_pair : cell_res_list) {
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uint32_t ue_cc_idx = id_cell_pair.first;
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uint32_t enb_cc_idx = id_cell_pair.second.cell_common->enb_cc_idx;
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if (ue_cc_idx >= list.size()) {
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list.resize(ue_cc_idx + 1);
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}
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list[ue_cc_idx].active = true;
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list[ue_cc_idx].enb_cc_idx = enb_cc_idx;
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}
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parent->mac->ue_cfg(rnti, ¤t_sched_ue_cfg);
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// Finally, add SRB2 and DRB1 and any dedicated DRBs to the scheduler
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@ -1768,7 +1763,7 @@ void rrc::ue::send_connection_reconf_upd(srslte::unique_byte_buffer_t pdu)
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phy_cfg->sched_request_cfg.setup().dsr_trans_max = parent->cfg.sr_cfg.dsr_max;
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phy_cfg->cqi_report_cfg_present = true;
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if (cqi_allocated) {
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if (not cell_res_list.empty()) {
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phy_cfg->cqi_report_cfg.cqi_report_periodic_present = true;
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phy_cfg->cqi_report_cfg.cqi_report_periodic.set_setup().cqi_format_ind_periodic.set(
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cqi_report_periodic_c::setup_s_::cqi_format_ind_periodic_c_::types::wideband_cqi);
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@ -1863,7 +1858,7 @@ void rrc::ue::send_connection_reconf(srslte::unique_byte_buffer_t pdu)
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}
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// Add SCells
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if (fill_scell_to_addmod_list(conn_reconf)) {
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if (fill_scell_to_addmod_list(conn_reconf) != SRSLTE_SUCCESS) {
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parent->rrc_log->warning("Could not create configuration for Scell\n");
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// Should disable R10 extension and not activate SCell??
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return;
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@ -1972,7 +1967,16 @@ rrc::cell_ctxt_t* rrc::ue::get_ue_cc_cfg(uint32_t ue_cc_idx)
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int rrc::ue::fill_scell_to_addmod_list(asn1::rrc::rrc_conn_recfg_r8_ies_s* conn_reconf)
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{
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const cell_ctxt_t* pcell_cfg = get_ue_cc_cfg(UE_PCELL_CC_IDX);
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if (pcell_cfg->cell_cfg.scell_list.size() == 0) {
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if (pcell_cfg->cell_cfg.scell_list.empty()) {
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return SRSLTE_SUCCESS;
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}
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// Allocate CQI + PUCCH for SCells.
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for (size_t scell_idx = 0; scell_idx < pcell_cfg->cell_cfg.scell_list.size(); ++scell_idx) {
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allocate_scell_pucch(scell_idx + 1);
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}
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if (cell_res_list.size() == 1) {
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// No SCell could be allocated. Fallback to single cell mode.
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return SRSLTE_SUCCESS;
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}
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@ -1982,20 +1986,13 @@ int rrc::ue::fill_scell_to_addmod_list(asn1::rrc::rrc_conn_recfg_r8_ies_s* conn_
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conn_reconf->non_crit_ext.non_crit_ext.non_crit_ext.scell_to_add_mod_list_r10_present = true;
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auto& list = conn_reconf->non_crit_ext.non_crit_ext.non_crit_ext.scell_to_add_mod_list_r10;
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// Add all SCells configured for the current PCell
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uint32_t scell_idx = 1; // SCell start with 1, zero reserved for PCell
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for (auto& scell : pcell_cfg->cell_cfg.scell_list) {
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// Allocate PUCCH resources
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if (allocate_scell_pucch(scell_idx)) {
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return SRSLTE_ERROR;
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}
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// get corresponding eNB cell context for this scell
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const cell_ctxt_t* cc_cfg = parent->find_cell_ctxt(scell.cell_id);
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if (cc_cfg == nullptr) {
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// Add all SCells configured+allocated for the current PCell
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for (auto& p : cell_res_list) {
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if (p.first == UE_PCELL_CC_IDX) {
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continue;
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}
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uint32_t scell_idx = p.first;
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const cell_ctxt_t* cc_cfg = p.second.cell_common;
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const sib_type1_s& cell_sib1 = cc_cfg->sib1;
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const sib_type2_s& cell_sib2 = cc_cfg->sib2;
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@ -2097,8 +2094,6 @@ int rrc::ue::fill_scell_to_addmod_list(asn1::rrc::rrc_conn_recfg_r8_ies_s* conn_
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// Append to PHY RRC config dedicated which will be applied further down
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phy_rrc_dedicated_list.push_back(scell_phy_rrc_ded);
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scell_idx++;
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}
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// Set DL HARQ Feedback mode
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@ -2566,24 +2561,26 @@ int rrc::ue::sr_allocate(uint32_t period)
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return SRSLTE_SUCCESS;
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}
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void rrc::ue::cqi_free()
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void rrc::ue::cqi_free(uint32_t ue_cc_idx)
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{
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if (cqi_allocated) {
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for (uint32_t cc_idx = 0; cc_idx < parent->cfg.cell_list.size(); cc_idx++) {
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if (cqi_res.count(cc_idx) > 0) {
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if (parent->cqi_sched.nof_users[cqi_res[cc_idx].prb_idx][cqi_res[cc_idx].sf_idx] > 0) {
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parent->cqi_sched.nof_users[cqi_res[cc_idx].prb_idx][cqi_res[cc_idx].sf_idx]--;
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auto it = cell_res_list.find(ue_cc_idx);
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if (it != cell_res_list.end()) {
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auto& cell = it->second;
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if (parent->cqi_sched.nof_users[cell.prb_idx][cell.sf_idx] > 0) {
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parent->cqi_sched.nof_users[cell.prb_idx][cell.sf_idx]--;
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parent->rrc_log->info("Deallocated CQI resources for time-frequency slot (%d, %d)\n", cell.prb_idx, cell.sf_idx);
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} else {
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parent->rrc_log->warning("Removing CQI resources: no users in time-frequency slot (%d, %d)\n",
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cqi_res[cc_idx].prb_idx,
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cqi_res[cc_idx].sf_idx);
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parent->rrc_log->warning(
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"Removing CQI resources: no users in time-frequency slot (%d, %d)\n", cell.prb_idx, cell.sf_idx);
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}
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parent->rrc_log->info("Deallocated CQI resources for time-frequency slot (%d, %d)\n",
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cqi_res[cc_idx].prb_idx,
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cqi_res[cc_idx].sf_idx);
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cell_res_list.erase(ue_cc_idx);
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}
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}
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cqi_allocated = false;
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void rrc::ue::cqi_free()
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{
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for (uint32_t cc_idx = 0; cc_idx < parent->cfg.cell_list.size(); cc_idx++) {
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cqi_free(cc_idx);
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}
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}
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@ -2598,9 +2595,10 @@ void rrc::ue::n_pucch_cs_free()
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int rrc::ue::get_cqi(uint16_t* pmi_idx, uint16_t* n_pucch, uint32_t ue_cc_idx)
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{
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if (cqi_res.count(ue_cc_idx)) {
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*pmi_idx = cqi_res[ue_cc_idx].idx;
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*n_pucch = cqi_res[ue_cc_idx].pucch_res;
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auto it = cell_res_list.find(ue_cc_idx);
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if (it != cell_res_list.end()) {
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*pmi_idx = it->second.pmi_idx;
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*n_pucch = it->second.pucch_res;
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return SRSLTE_SUCCESS;
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} else {
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parent->rrc_log->error("CQI resources for ue_cc_idx=%d have not been allocated\n", ue_cc_idx);
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@ -2709,11 +2707,15 @@ int rrc::ue::cqi_allocate(uint32_t period, uint32_t ue_cc_idx)
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}
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// Allocate user
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parent->cqi_sched.nof_users[i_min][j_min]++;
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cqi_allocated = true;
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cqi_res[ue_cc_idx].idx = pmi_idx;
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cqi_res[ue_cc_idx].pucch_res = n_pucch;
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cqi_res[ue_cc_idx].prb_idx = i_min;
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cqi_res[ue_cc_idx].sf_idx = j_min;
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cell_res_list[ue_cc_idx].pmi_idx = pmi_idx;
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cell_res_list[ue_cc_idx].pucch_res = n_pucch;
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cell_res_list[ue_cc_idx].prb_idx = i_min;
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cell_res_list[ue_cc_idx].sf_idx = j_min;
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const auto& l = parent->cell_ctxt_list;
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uint32_t cell_id = get_ue_cc_cfg(UE_PCELL_CC_IDX)->cell_cfg.scell_list[ue_cc_idx].cell_id;
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auto it = std::find_if(
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l.begin(), l.end(), [cell_id](const std::unique_ptr<cell_ctxt_t>& c) { return c->cell_cfg.cell_id == cell_id; });
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cell_res_list[ue_cc_idx].cell_common = it->get();
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parent->rrc_log->info(
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"Allocated CQI resources for ue_cc_idx=%d, time-frequency slot (%d, %d), n_pucch_2=%d, pmi_cfg_idx=%d\n",
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