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@ -143,10 +143,10 @@ static uint32_t dci_format0_sizeof_(const srslte_cell_t* cell, srslte_dl_sf_cfg_
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n += ((IS_TDD | IS_TDD_CFG0) ? 2 : 0);
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n += ((IS_TDD | IS_TDD_CFG0) ? 2 : 0);
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/* CSI request – 1 or 2 bits */
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/* CSI request – 1 or 2 bits */
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n += (cfg->multiple_csi_request_enabled) ? 2 : 1;
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n += (cfg->multiple_csi_request_enabled && !cfg->is_not_ue_ss) ? 2 : 1;
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/* SRS request – 0 or 1 bit */
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/* SRS request – 0 or 1 bit */
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n += (cfg->srs_request_enabled) ? 1 : 0;
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n += (cfg->srs_request_enabled && !cfg->is_not_ue_ss) ? 1 : 0;
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/* Resource allocation type – 1 bit (N^UL_RB ≤ N^DL_RB)
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/* Resource allocation type – 1 bit (N^UL_RB ≤ N^DL_RB)
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* This is a release10 field only, but it is backwards compatible to release 8 because a padding bit will be added.
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* This is a release10 field only, but it is backwards compatible to release 8 because a padding bit will be added.
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@ -460,16 +460,20 @@ static int dci_format0_pack(srslte_cell_t* cell,
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// DM RS not implemented
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// DM RS not implemented
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srslte_bit_unpack(dci->n_dmrs, &y, 3);
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srslte_bit_unpack(dci->n_dmrs, &y, 3);
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// CQI request
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// CSI request – 1 or 2 bits as defined in section 7.2.1 of 36.213. The 2-bit field applies to UEs that are configured
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if (cfg->multiple_csi_request_enabled) {
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// with more than one DL cell and when the corresponding DCI format is mapped onto the UE specific search space given
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// by the C-RNTI as defined in 36.213; otherwise the 1-bit field applies
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if (cfg->multiple_csi_request_enabled && !cfg->is_not_ue_ss) {
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*y++ = dci->cqi_request;
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*y++ = dci->cqi_request;
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*y++ = 0;
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*y++ = 0;
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} else {
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} else {
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*y++ = dci->cqi_request;
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*y++ = dci->cqi_request;
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}
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}
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// SRS request
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// SRS request – 0 or 1 bit. This field can only be present in DCI formats scheduling PUSCH which are mapped onto
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if (cfg->srs_request_enabled) {
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// the UE specific search space given by the C-RNTI as defined in 36.213. The interpretation of this field is provided
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// in section 8.2 of 36.213
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if (cfg->srs_request_enabled && !cfg->is_not_ue_ss) {
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*y++ = dci->srs_request && dci->srs_request_present;
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*y++ = dci->srs_request && dci->srs_request_present;
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}
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}
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@ -548,7 +552,7 @@ static int dci_format0_unpack(srslte_cell_t* cell,
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}
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}
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// CQI request
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// CQI request
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if (cfg->multiple_csi_request_enabled) {
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if (cfg->multiple_csi_request_enabled && !cfg->is_not_ue_ss) {
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dci->multiple_csi_request_present = true;
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dci->multiple_csi_request_present = true;
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dci->multiple_csi_request = srslte_bit_pack(&y, 2);
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dci->multiple_csi_request = srslte_bit_pack(&y, 2);
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} else {
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} else {
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@ -556,7 +560,7 @@ static int dci_format0_unpack(srslte_cell_t* cell,
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}
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}
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// SRS request
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// SRS request
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if (cfg->srs_request_enabled) {
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if (cfg->srs_request_enabled && !cfg->is_not_ue_ss) {
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dci->srs_request_present = true;
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dci->srs_request_present = true;
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dci->srs_request = *y++ ? true : false;
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dci->srs_request = *y++ ? true : false;
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}
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}
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@ -1408,8 +1412,7 @@ bool srslte_location_find_ncce(const srslte_dci_location_t* locations, uint32_t
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// Set the configuration for Format0/1A messages allocated on Common SS
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// Set the configuration for Format0/1A messages allocated on Common SS
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void srslte_dci_cfg_set_common_ss(srslte_dci_cfg_t* cfg)
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void srslte_dci_cfg_set_common_ss(srslte_dci_cfg_t* cfg)
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{
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{
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cfg->srs_request_enabled = false;
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cfg->is_not_ue_ss = true;
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cfg->multiple_csi_request_enabled = false;
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}
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}
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int srslte_dci_location_set(srslte_dci_location_t* c, uint32_t L, uint32_t nCCE)
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int srslte_dci_location_set(srslte_dci_location_t* c, uint32_t L, uint32_t nCCE)
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