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@ -110,19 +110,125 @@ inline void phy_ue_db::_set_common_config_rnti(uint16_t rnti)
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}
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}
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}
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}
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inline uint32_t phy_ue_db::_get_cell_idx(uint16_t rnti, uint32_t cc_idx) const
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inline uint32_t phy_ue_db::_get_ue_cc_idx(uint16_t rnti, uint32_t enb_cc_idx) const
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{
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{
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uint32_t cell_idx = 0;
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uint32_t ue_cc_idx = 0;
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const common_ue& ue = ue_db.at(rnti);
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const common_ue& ue = ue_db.at(rnti);
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for (cell_idx = 0; cell_idx < SRSLTE_MAX_CARRIERS; cell_idx++) {
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for (ue_cc_idx = 0; ue_cc_idx < SRSLTE_MAX_CARRIERS; ue_cc_idx++) {
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const cell_info_t& scell_info = ue.cell_info[cell_idx];
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const cell_info_t& scell_info = ue.cell_info[ue_cc_idx];
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if (scell_info.enb_cc_idx == cc_idx && scell_info.state != cell_state_secondary_inactive) {
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if (scell_info.enb_cc_idx == enb_cc_idx and scell_info.state != cell_state_secondary_inactive) {
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return cell_idx;
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return ue_cc_idx;
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}
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}
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}
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}
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return cell_idx;
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return ue_cc_idx;
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}
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inline int phy_ue_db::_assert_rnti(uint16_t rnti) const
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{
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if (not ue_db.count(rnti)) {
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ERROR("Trying to access RNTI x%x, it does not exist.\n", rnti);
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_enb_cc(uint16_t rnti, uint32_t enb_cc_idx) const
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{
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// Assert RNTI exist
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if (_assert_rnti(rnti) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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// Check Component Carrier is part of UE SCell map
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if (_get_ue_cc_idx(rnti, enb_cc_idx) == SRSLTE_MAX_CARRIERS) {
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ERROR("Trying to access cell/carrier index %d in RNTI x%x. It does not exist.\n", enb_cc_idx, rnti);
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_enb_pcell(uint16_t rnti, uint32_t enb_cc_idx) const
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{
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if (_assert_enb_cc(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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// Check cell is PCell
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const cell_info_t& cell_info = ue_db.at(rnti).cell_info[_get_ue_cc_idx(rnti, enb_cc_idx)];
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if (cell_info.state != cell_state_primary) {
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_ue_cc(uint16_t rnti, uint32_t ue_cc_idx)
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{
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if (_assert_rnti(rnti) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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// Check SCell is active, ignore PCell state
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if (ue_cc_idx == SRSLTE_MAX_CARRIERS) {
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ERROR("Out-of-bounds UE cell/carrier %d for RNTI x%x.\n", ue_cc_idx, rnti);
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_active_ue_cc(uint16_t rnti, uint32_t ue_cc_idx)
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{
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if (_assert_ue_cc(rnti, ue_cc_idx) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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// Return error if not PCell or not Active SCell
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auto& cell_info = ue_db.at(rnti).cell_info[ue_cc_idx];
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if (cell_info.state != cell_state_primary and cell_info.state != cell_state_secondary_active) {
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ERROR("Failed to assert active UE cell/carrier %d for RNTI x%x", ue_cc_idx, rnti);
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_active_enb_cc(uint16_t rnti, uint32_t enb_cc_idx) const
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{
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if (_assert_enb_cc(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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// Check SCell is active, ignore PCell state
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auto& cell_info = ue_db.at(rnti).cell_info[_get_ue_cc_idx(rnti, enb_cc_idx)];
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if (cell_info.state != cell_state_primary and cell_info.state != cell_state_secondary_active) {
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ERROR("Failed to assert active eNb cell/carrier %d for RNTI x%x", enb_cc_idx, rnti);
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_stack() const
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{
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if (not stack) {
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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inline int phy_ue_db::_assert_cell_list_cfg() const
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{
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if (not cell_cfg_list) {
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return SRSLTE_ERROR;
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}
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return SRSLTE_SUCCESS;
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}
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}
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void phy_ue_db::clear_tti_pending_ack(uint32_t tti)
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void phy_ue_db::clear_tti_pending_ack(uint32_t tti)
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@ -188,111 +294,18 @@ void phy_ue_db::rem_rnti(uint16_t rnti)
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}
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}
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}
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}
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/**
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void phy_ue_db::activate_deactivate_scell(uint16_t rnti, uint32_t ue_cc_idx, bool activate)
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* UE Database Assert macros. These macros avoid repeating code for asserting RNTI, eNb cell/carrier index, SCell
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* indexes and so on.
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*
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* They are const friendly. All the methods they use of the attributes are const, so they do not modify any attribute.
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*/
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#define UE_DB_ASSERT_RNTI(RNTI, RET) \
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do { \
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if (not ue_db.count(RNTI)) { \
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/*ERROR("Trying to access RNTI x%x, it does not exist.\n", RNTI);*/ \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_CELL(RNTI, CC_IDX, RET) \
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do { \
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/* Check if the UE exists */ \
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UE_DB_ASSERT_RNTI(RNTI, RET); \
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\
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/* Check Component Carrier is part of UE SCell map*/ \
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if (_get_cell_idx(RNTI, CC_IDX) == SRSLTE_MAX_CARRIERS) { \
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ERROR("Trying to access cell/carrier index %d in RNTI x%x. It does not exist.\n", CC_IDX, RNTI); \
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return RET; \
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} \
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\
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/* Check SCell index is in range */ \
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const uint32_t cell_idx = _get_cell_idx(RNTI, CC_IDX); \
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if (cell_idx == SRSLTE_MAX_CARRIERS) { \
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ERROR("Corrupted Cell index %d for RNTI x%x and cell/carrier index %d\n", cell_idx, RNTI, CC_IDX); \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_ACTIVE_CELL(RNTI, CC_IDX, RET) \
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do { \
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/* Assert RNTI exists and eNb cell/carrier is configured */ \
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UE_DB_ASSERT_CELL(RNTI, CC_IDX, RET); \
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\
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/* Check Cell is active */ \
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auto& cell_info = ue_db.at(RNTI).cell_info[_get_cell_idx(RNTI, CC_IDX)]; \
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if (cell_info.state != cell_state_primary and cell_info.state != cell_state_secondary_active) { \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_PCELL(RNTI, CC_IDX, RET) \
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do { \
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/* Assert RNTI exists and eNb cell/carrier is configured */ \
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UE_DB_ASSERT_CELL(RNTI, CC_IDX, RET); \
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\
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/* CC_IDX is the RNTI PCell */ \
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if (_get_cell_idx(RNTI, CC_IDX) != 0) { \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_SCELL(RNTI, CELL_IDX, RET) \
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do { \
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/* Assert RNTI exists and eNb cell/carrier is configured */ \
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UE_DB_ASSERT_RNTI(RNTI, RET); \
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\
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/* Check SCell index is in range */ \
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if (CELL_IDX >= SRSLTE_MAX_CARRIERS) { \
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ERROR("Out-of-bounds SCell index %d for RNTI x%x.\n", CELL_IDX, RNTI); \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_ACTIVE_SCELL(RNTI, CELL_IDX, RET) \
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do { \
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/* Assert RNTI exists and eNb cell/carrier is configured */ \
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UE_DB_ASSERT_SCELL(RNTI, CELL_IDX, RET); \
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\
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/* Check SCell is active, ignore PCell state */ \
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auto& cell_info = ue_db.at(RNTI).cell_info[CELL_IDX]; \
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if (CELL_IDX != 0 && cell_info.state != cell_state_secondary_active) { \
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ERROR("Failed to assert active SCell %d for RNTI x%x", CELL_IDX, RNTI); \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_STACK(RET) \
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do { \
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if (not stack) { \
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return RET; \
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} \
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} while (false)
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#define UE_DB_ASSERT_CELL_LIST_CFG(RET) \
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do { \
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if (not cell_cfg_list) { \
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return RET; \
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} \
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} while (false)
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void phy_ue_db::activate_deactivate_scell(uint16_t rnti, uint32_t cell_idx, bool activate)
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{
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{
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// Assert RNTI and SCell are valid
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// Assert RNTI and SCell are valid
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UE_DB_ASSERT_SCELL(rnti, cell_idx, /* void */);
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if (_assert_ue_cc(rnti, ue_cc_idx) != SRSLTE_SUCCESS) {
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return;
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}
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auto& cell_info = ue_db[rnti].cell_info[cell_idx];
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cell_info_t& cell_info = ue_db[rnti].cell_info[ue_cc_idx];
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// If scell is default only complain
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// If scell is default only complain
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if (activate and cell_info.state == cell_state_none) {
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if (activate and cell_info.state == cell_state_none) {
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ERROR("RNTI x%x SCell %d has received an activation MAC command but it was not configured\n", rnti, cell_idx);
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ERROR("RNTI x%x SCell %d has received an activation MAC command but it was not configured\n", rnti, ue_cc_idx);
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return;
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return;
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}
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}
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@ -300,7 +313,7 @@ void phy_ue_db::activate_deactivate_scell(uint16_t rnti, uint32_t cell_idx, bool
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cell_info.state = (activate) ? cell_state_secondary_active : cell_state_secondary_inactive;
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cell_info.state = (activate) ? cell_state_secondary_active : cell_state_secondary_inactive;
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}
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}
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srslte::phy_cfg_t phy_ue_db::get_config(uint16_t rnti, uint32_t cc_idx) const
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srslte::phy_cfg_t phy_ue_db::get_config(uint16_t rnti, uint32_t enb_cc_idx) const
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{
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{
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std::lock_guard<std::mutex> lock(mutex);
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std::lock_guard<std::mutex> lock(mutex);
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@ -310,32 +323,35 @@ srslte::phy_cfg_t phy_ue_db::get_config(uint16_t rnti, uint32_t cc_idx) const
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default_cfg.ul_cfg.pusch.rnti = rnti;
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default_cfg.ul_cfg.pusch.rnti = rnti;
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default_cfg.ul_cfg.pucch.rnti = rnti;
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default_cfg.ul_cfg.pucch.rnti = rnti;
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|
UE_DB_ASSERT_ACTIVE_CELL(rnti, cc_idx, default_cfg);
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|
if (_assert_active_enb_cc(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
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|
|
return default_cfg;
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|
|
}
|
|
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|
|
return ue_db.at(rnti).cell_info[_get_cell_idx(rnti, cc_idx)].phy_cfg;
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|
return ue_db.at(rnti).cell_info[_get_ue_cc_idx(rnti, enb_cc_idx)].phy_cfg;
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|
|
|
}
|
|
|
|
}
|
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|
|
void phy_ue_db::set_ack_pending(uint32_t tti, uint32_t cc_idx, const srslte_dci_dl_t& dci)
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|
|
void phy_ue_db::set_ack_pending(uint32_t tti, uint32_t enb_cc_idx, const srslte_dci_dl_t& dci)
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|
|
|
{
|
|
|
|
{
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
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|
|
|
|
|
|
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|
|
// Assert rnti and cell exits and it is active
|
|
|
|
// Assert rnti and cell exits and it is active
|
|
|
|
UE_DB_ASSERT_ACTIVE_CELL(dci.rnti, cc_idx, /* void */);
|
|
|
|
if (_assert_active_enb_cc(dci.rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
common_ue& ue = ue_db[dci.rnti];
|
|
|
|
common_ue& ue = ue_db[dci.rnti];
|
|
|
|
uint32_t scell_idx = _get_cell_idx(dci.rnti, cc_idx);
|
|
|
|
uint32_t ue_cc_idx = _get_ue_cc_idx(dci.rnti, enb_cc_idx);
|
|
|
|
|
|
|
|
|
|
|
|
srslte_pdsch_ack_cc_t& pdsch_ack_cc = ue.pdsch_ack[TTIMOD(tti)].cc[scell_idx];
|
|
|
|
srslte_pdsch_ack_cc_t& pdsch_ack_cc = ue.pdsch_ack[TTIMOD(tti)].cc[ue_cc_idx];
|
|
|
|
pdsch_ack_cc.M = 1; ///< Hardcoded for FDD
|
|
|
|
pdsch_ack_cc.M = 1; ///< Hardcoded for FDD
|
|
|
|
|
|
|
|
|
|
|
|
// Fill PDSCH ACK information
|
|
|
|
// Fill PDSCH ACK information
|
|
|
|
srslte_pdsch_ack_m_t& pdsch_ack_m = pdsch_ack_cc.m[0]; ///< Assume FDD only
|
|
|
|
srslte_pdsch_ack_m_t& pdsch_ack_m = pdsch_ack_cc.m[0]; ///< Assume FDD only
|
|
|
|
pdsch_ack_m.present = true;
|
|
|
|
pdsch_ack_m.present = true;
|
|
|
|
pdsch_ack_m.resource.grant_cc_idx = cc_idx; ///< Assumes no cross-carrier scheduling
|
|
|
|
pdsch_ack_m.resource.grant_cc_idx = ue_cc_idx; ///< Assumes no cross-carrier scheduling
|
|
|
|
pdsch_ack_m.resource.v_dai_dl = 0; ///< Ignore for FDD
|
|
|
|
pdsch_ack_m.resource.v_dai_dl = 0; ///< Ignore for FDD
|
|
|
|
pdsch_ack_m.resource.n_cce = dci.location.ncce;
|
|
|
|
pdsch_ack_m.resource.n_cce = dci.location.ncce;
|
|
|
|
pdsch_ack_m.resource.tpc_for_pucch = dci.tpc_pucch;
|
|
|
|
pdsch_ack_m.resource.tpc_for_pucch = dci.tpc_pucch;
|
|
|
|
pdsch_ack_m.resource.grant_cc_idx = scell_idx;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
// Set TB info
|
|
|
|
// Set TB info
|
|
|
|
for (uint32_t i = 0; i < srslte_dci_format_max_tb(dci.format); i++) {
|
|
|
|
for (uint32_t i = 0; i < srslte_dci_format_max_tb(dci.format); i++) {
|
|
|
@ -347,7 +363,7 @@ void phy_ue_db::set_ack_pending(uint32_t tti, uint32_t cc_idx, const srslte_dci_
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
bool phy_ue_db::fill_uci_cfg(uint32_t tti,
|
|
|
|
bool phy_ue_db::fill_uci_cfg(uint32_t tti,
|
|
|
|
uint32_t cc_idx,
|
|
|
|
uint32_t enb_cc_idx,
|
|
|
|
uint16_t rnti,
|
|
|
|
uint16_t rnti,
|
|
|
|
bool aperiodic_cqi_request,
|
|
|
|
bool aperiodic_cqi_request,
|
|
|
|
srslte_uci_cfg_t& uci_cfg) const
|
|
|
|
srslte_uci_cfg_t& uci_cfg) const
|
|
|
@ -357,11 +373,15 @@ bool phy_ue_db::fill_uci_cfg(uint32_t tti,
|
|
|
|
// Reset UCI CFG, avoid returning carrying cached information
|
|
|
|
// Reset UCI CFG, avoid returning carrying cached information
|
|
|
|
uci_cfg = {};
|
|
|
|
uci_cfg = {};
|
|
|
|
|
|
|
|
|
|
|
|
// Assert rnti and cell exits and it is active
|
|
|
|
// Assert rnti and cell exits and it is PCell
|
|
|
|
UE_DB_ASSERT_PCELL(rnti, cc_idx, false);
|
|
|
|
if (_assert_enb_pcell(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Assert Cell List configuration
|
|
|
|
// Assert Cell List configuration
|
|
|
|
UE_DB_ASSERT_CELL_LIST_CFG(false);
|
|
|
|
if (_assert_cell_list_cfg() != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
const auto& ue = ue_db.at(rnti);
|
|
|
|
const auto& ue = ue_db.at(rnti);
|
|
|
|
const auto& pcell_cfg = ue.cell_info[0].phy_cfg;
|
|
|
|
const auto& pcell_cfg = ue.cell_info[0].phy_cfg;
|
|
|
@ -412,17 +432,21 @@ bool phy_ue_db::fill_uci_cfg(uint32_t tti,
|
|
|
|
|
|
|
|
|
|
|
|
void phy_ue_db::send_uci_data(uint32_t tti,
|
|
|
|
void phy_ue_db::send_uci_data(uint32_t tti,
|
|
|
|
uint16_t rnti,
|
|
|
|
uint16_t rnti,
|
|
|
|
uint32_t cc_idx,
|
|
|
|
uint32_t enb_cc_idx,
|
|
|
|
const srslte_uci_cfg_t& uci_cfg,
|
|
|
|
const srslte_uci_cfg_t& uci_cfg,
|
|
|
|
const srslte_uci_value_t& uci_value)
|
|
|
|
const srslte_uci_value_t& uci_value)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
|
|
|
|
|
|
|
|
// Assert UE RNTI database entry and eNb cell/carrier must be primary cell
|
|
|
|
// Assert UE RNTI database entry and eNb cell/carrier must be primary cell
|
|
|
|
UE_DB_ASSERT_PCELL(rnti, cc_idx, /* void */);
|
|
|
|
if (_assert_enb_pcell(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Assert Stack
|
|
|
|
// Assert Stack
|
|
|
|
UE_DB_ASSERT_STACK(/* void */);
|
|
|
|
if (_assert_stack() != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Notify SR
|
|
|
|
// Notify SR
|
|
|
|
if (uci_cfg.is_scheduling_request_tti && uci_value.scheduling_request) {
|
|
|
|
if (uci_cfg.is_scheduling_request_tti && uci_value.scheduling_request) {
|
|
|
@ -449,7 +473,7 @@ void phy_ue_db::send_uci_data(uint32_t tti,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Assert the SCell exists and it is active
|
|
|
|
// Assert the SCell exists and it is active
|
|
|
|
UE_DB_ASSERT_ACTIVE_SCELL(rnti, uci_cfg.cqi.scell_index, /* void */);
|
|
|
|
_assert_active_ue_cc(rnti, uci_cfg.cqi.scell_index);
|
|
|
|
|
|
|
|
|
|
|
|
// Get CQI carrier index
|
|
|
|
// Get CQI carrier index
|
|
|
|
auto& cqi_scell_info = ue_db.at(rnti).cell_info[uci_cfg.cqi.scell_index];
|
|
|
|
auto& cqi_scell_info = ue_db.at(rnti).cell_info[uci_cfg.cqi.scell_index];
|
|
|
@ -502,24 +526,28 @@ void phy_ue_db::send_uci_data(uint32_t tti,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void phy_ue_db::set_last_ul_tb(uint16_t rnti, uint32_t cc_idx, uint32_t pid, srslte_ra_tb_t tb)
|
|
|
|
void phy_ue_db::set_last_ul_tb(uint16_t rnti, uint32_t enb_cc_idx, uint32_t pid, srslte_ra_tb_t tb)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
|
|
|
|
|
|
|
|
// Assert UE DB entry
|
|
|
|
// Assert UE DB entry
|
|
|
|
UE_DB_ASSERT_ACTIVE_CELL(rnti, cc_idx, /* void */);
|
|
|
|
if (_assert_active_enb_cc(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Save resource allocation
|
|
|
|
// Save resource allocation
|
|
|
|
ue_db.at(rnti).cell_info[_get_cell_idx(rnti, cc_idx)].last_tb[pid % SRSLTE_FDD_NOF_HARQ] = tb;
|
|
|
|
ue_db.at(rnti).cell_info[_get_ue_cc_idx(rnti, enb_cc_idx)].last_tb[pid % SRSLTE_FDD_NOF_HARQ] = tb;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
srslte_ra_tb_t phy_ue_db::get_last_ul_tb(uint16_t rnti, uint32_t cc_idx, uint32_t pid) const
|
|
|
|
srslte_ra_tb_t phy_ue_db::get_last_ul_tb(uint16_t rnti, uint32_t enb_cc_idx, uint32_t pid) const
|
|
|
|
{
|
|
|
|
{
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
std::lock_guard<std::mutex> lock(mutex);
|
|
|
|
|
|
|
|
|
|
|
|
// Assert UE DB entry
|
|
|
|
// Assert UE DB entry
|
|
|
|
UE_DB_ASSERT_ACTIVE_CELL(rnti, cc_idx, {});
|
|
|
|
if (_assert_active_enb_cc(rnti, enb_cc_idx) != SRSLTE_SUCCESS) {
|
|
|
|
|
|
|
|
return {};
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// Returns the latest stored UL transmission grant
|
|
|
|
// Returns the latest stored UL transmission grant
|
|
|
|
return ue_db.at(rnti).cell_info[_get_cell_idx(rnti, cc_idx)].last_tb[pid % SRSLTE_FDD_NOF_HARQ];
|
|
|
|
return ue_db.at(rnti).cell_info[_get_ue_cc_idx(rnti, enb_cc_idx)].last_tb[pid % SRSLTE_FDD_NOF_HARQ];
|
|
|
|
}
|
|
|
|
}
|
|
|
|