Use Format1A when using CA and 15 PRB due to DCI size ambiguity

lib/src/phy/ue/ue_dl.c

@@ -497,16 +497,12 @@ static int dci_blind_search(srslte_ue_dl_t*     q,
              * information fields in the common and UE-specific search spaces on the primary cell, is required to assume
              * that only the PDCCH in the common search space is transmitted by the primary cell.
              */
-            INFO("checking if msg=%d, ncce=%d belongs to common\n", nof_dci, dci_msg[nof_dci].location.ncce);
             // Find a matching ncce in the common SS
             if (srslte_location_find_ncce(q->current_ss_common[MI_IDX(sf_idx)][cfi - 1].loc,
                                           q->current_ss_common[MI_IDX(sf_idx)][cfi - 1].nof_locations,
                                           dci_msg[nof_dci].location.ncce)) {
               srslte_dci_cfg_t cfg = *dci_cfg;
               srslte_dci_cfg_set_common_ss(&cfg);
-              INFO("checking if size of msg (%d) is equal to size of format1a (%d)\n",
-                   dci_msg[nof_dci].nof_bits,
-                   srslte_dci_format_sizeof(&q->cell, sf, &cfg, SRSLTE_DCI_FORMAT1A));
               // if the payload size is the same that it would have in the common SS (only Format0/1A is allowed there)
               if (dci_msg[nof_dci].nof_bits == srslte_dci_format_sizeof(&q->cell, sf, &cfg, SRSLTE_DCI_FORMAT1A)) {
                 // assume that only the PDDCH is transmitted, therefore update the format to 0/1A

srsenb/hdr/stack/mac/scheduler_common.h

@@ -85,6 +85,7 @@ struct prb_interval;
 struct rbg_interval : public srslte::interval<uint32_t> {
   using interval::interval;
   static rbg_interval prbs_to_rbgs(const prb_interval& prbs, uint32_t P);
+  static rbg_interval rbgmask_to_rbgs(const rbgmask_t& mask);
 };
 
 //! Struct to express a {min,...,max} range of PRBs

srsenb/src/phy/cc_worker.cc

@@ -483,7 +483,7 @@ int cc_worker::encode_pdcch_dl(stack_interface_phy_lte::dl_sched_grant_t* grants
 
       if (SRSLTE_RNTI_ISUSER(grants[i].dci.rnti) && grants[i].dci.format == SRSLTE_DCI_FORMAT1A) {
         if (srslte_enb_dl_location_is_common_ncce(&enb_dl, grants[i].dci.location.ncce) &&
-            grants[i].dci.format == SRSLTE_DCI_FORMAT1A && phy->ue_db.is_pcell(grants[i].dci.rnti, cc_idx)) {
+            phy->ue_db.is_pcell(grants[i].dci.rnti, cc_idx)) {
           srslte_dci_cfg_set_common_ss(&dci_cfg);
         }
       }

srsenb/src/stack/mac/scheduler.cc

@@ -460,6 +460,27 @@ prb_interval prb_interval::rbgs_to_prbs(const rbg_interval& rbgs, uint32_t P)
   return prb_interval{rbgs.start() * P, rbgs.stop() * P};
 }
 
+rbg_interval rbg_interval::rbgmask_to_rbgs(const rbgmask_t& mask)
+{
+  int rb_start = -1;
+  for (uint32_t i = 0; i < mask.size(); i++) {
+    if (rb_start == -1) {
+      if (mask.test(i)) {
+        rb_start = i;
+      }
+    } else {
+      if (!mask.test(i)) {
+        return rbg_interval(rb_start, i);
+      }
+    }
+  }
+  if (rb_start != -1) {
+    return rbg_interval(rb_start, mask.size());
+  } else {
+    return rbg_interval();
+  }
+}
+
 prb_interval prb_interval::riv_to_prbs(uint32_t riv, uint32_t nof_prbs, int nof_vrbs)
 {
   if (nof_vrbs < 0) {

srsenb/src/stack/mac/scheduler_ue.cc

@@ -479,8 +479,26 @@ int sched_ue::generate_format1(uint32_t                          pid,
   int mcs = 0;
   int tbs = 0;
 
+  // If the size of Format1 and Format1A is ambiguous in the common SS, use Format1A since the UE assumes
+  // Common SS when spaces collide
+  if (cell.nof_prb == 15 && carriers.size() > 1) {
+    dci->alloc_type       = SRSLTE_RA_ALLOC_TYPE2;
+    dci->type2_alloc.mode = srslte_ra_type2_t::SRSLTE_RA_TYPE2_LOC;
+    rbg_interval rbg_int  = rbg_interval::rbgmask_to_rbgs(user_mask);
+    uint32_t     P        = srslte_ra_type0_P(15);
+    prb_interval prb_int  = prb_interval::rbgs_to_prbs(rbg_int, P);
+    dci->type2_alloc.riv =
+        srslte_ra_type2_to_riv(SRSLTE_MIN(prb_int.length(), cell.nof_prb), prb_int.start(), cell.nof_prb);
+    dci->format = SRSLTE_DCI_FORMAT1A;
+    if (prb_int.length() != P * user_mask.count()) {
+      // This happens if Type0 was using distributed allocation
+      Warning("SCHED: Can't use distributed RA due to DCI size ambiguity\n");
+    }
+  } else {
     dci->alloc_type              = SRSLTE_RA_ALLOC_TYPE0;
     dci->type0_alloc.rbg_bitmask = (uint32_t)user_mask.to_uint64();
+    dci->format                  = SRSLTE_DCI_FORMAT1;
+  }
 
   if (h->is_empty(0)) {
     auto ret = allocate_new_dl_mac_pdu(data, h, user_mask, tti_tx_dl, ue_cc_idx, cfi, 0, "1");
@@ -503,8 +521,6 @@ int sched_ue::generate_format1(uint32_t                          pid,
     next_tpc_pucch = 1;
     data->tbs[0]   = (uint32_t)tbs;
     data->tbs[1]   = 0;
-
-    dci->format = SRSLTE_DCI_FORMAT1;
   }
   return tbs;
 }