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added cc_idx to dl_rach_info

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master
Francisco Paisana 5 years ago
parent 01847c5f5d
commit 3159a5b84a
12 changed files with 99 additions and 93 deletions
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26
lib/include/srslte/interfaces/sched_interface.h
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@ -100,22 +100,16 @@ public:
enum { IDLE = 0, UL, DL, BOTH } direction; enum { IDLE = 0, UL, DL, BOTH } direction;
} ue_bearer_cfg_t; } ue_bearer_cfg_t;
typedef struct { struct ue_cfg_t {
/* ue capabilities, etc */ /* ue capabilities, etc */
uint32_t maxharq_tx;
uint32_t maxharq_tx; bool continuous_pusch;
bool continuous_pusch;
srslte_uci_offset_cfg_t uci_offset; srslte_uci_offset_cfg_t uci_offset;
srslte_pucch_cfg_t pucch_cfg; srslte_pucch_cfg_t pucch_cfg;
uint32_t aperiodic_cqi_period; // if 0 is periodic CQI
uint32_t aperiodic_cqi_period; // if 0 is periodic CQI srslte_dl_cfg_t dl_cfg;
srslte_dl_cfg_t dl_cfg; ue_bearer_cfg_t ue_bearers[MAX_LC];
};
ue_bearer_cfg_t ue_bearers[MAX_LC];
} ue_cfg_t;
typedef struct { typedef struct {
uint32_t lcid; uint32_t lcid;
@ -153,13 +147,13 @@ public:
srslte_dci_ul_t dci; srslte_dci_ul_t dci;
} ul_sched_data_t; } ul_sched_data_t;
typedef struct { struct dl_sched_rar_info_t {
uint32_t preamble_idx; uint32_t preamble_idx;
uint32_t ta_cmd; uint32_t ta_cmd;
uint16_t temp_crnti; uint16_t temp_crnti;
uint32_t msg3_size; uint32_t msg3_size;
uint32_t prach_tti; uint32_t prach_tti;
} dl_sched_rar_info_t; };
typedef struct { typedef struct {
dl_sched_rar_info_t data; dl_sched_rar_info_t data;
@ -231,7 +225,7 @@ public:
/* DL information */ /* DL information */
virtual int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t tb_idx, bool ack) = 0; virtual int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t tb_idx, bool ack) = 0;
virtual int dl_rach_info(dl_sched_rar_info_t rar_info) = 0; virtual int dl_rach_info(uint32_t cc_idx, dl_sched_rar_info_t rar_info) = 0;
virtual int dl_ri_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t ri_value) = 0; virtual int dl_ri_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t ri_value) = 0;
virtual int dl_pmi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t pmi_value) = 0; virtual int dl_pmi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t pmi_value) = 0;
virtual int dl_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi_value) = 0; virtual int dl_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi_value) = 0;

9
srsenb/hdr/stack/mac/scheduler.h
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@ -64,7 +64,8 @@ public:
uint32_t P = 0; uint32_t P = 0;
uint32_t nof_rbgs = 0; uint32_t nof_rbgs = 0;
bool set_derived(); sched_params_t();
bool set_cfg(srslte::log* log_, sched_interface::cell_cfg_t* cfg_, srslte_regs_t* regs_);
}; };
/* Caution: User addition (ue_cfg) and removal (ue_rem) are not thread-safe /* Caution: User addition (ue_cfg) and removal (ue_rem) are not thread-safe
@ -87,7 +88,7 @@ public:
{ {
public: public:
/* Virtual methods for user metric calculation */ /* Virtual methods for user metric calculation */
virtual void set_log(srslte::log* log_) = 0; virtual void set_params(const sched_params_t& sched_params_) = 0;
virtual void sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx) = 0; virtual void sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx) = 0;
}; };
@ -95,7 +96,7 @@ public:
{ {
public: public:
/* Virtual methods for user metric calculation */ /* Virtual methods for user metric calculation */
virtual void set_log(srslte::log* log_) = 0; virtual void set_params(const sched_params_t& sched_params_) = 0;
virtual void sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx) = 0; virtual void sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx) = 0;
}; };
@ -132,7 +133,7 @@ public:
int dl_ant_info(uint16_t rnti, asn1::rrc::phys_cfg_ded_s::ant_info_c_* dedicated); int dl_ant_info(uint16_t rnti, asn1::rrc::phys_cfg_ded_s::ant_info_c_* dedicated);
int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t tb_idx, bool ack) final; int dl_ack_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t tb_idx, bool ack) final;
int dl_rach_info(dl_sched_rar_info_t rar_info) final; int dl_rach_info(uint32_t cc_idx, dl_sched_rar_info_t rar_info) final;
int dl_ri_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t ri_value) final; int dl_ri_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t ri_value) final;
int dl_pmi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t pmi_value) final; int dl_pmi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t pmi_value) final;
int dl_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi_value) final; int dl_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi_value) final;

17
srsenb/hdr/stack/mac/scheduler_carrier.h
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@ -32,9 +32,9 @@ class ra_sched;
class sched::carrier_sched class sched::carrier_sched
{ {
public: public:
explicit carrier_sched(sched* sched_, uint32_t cc_idx_); explicit carrier_sched(rrc_interface_mac* rrc_, std::map<uint16_t, sched_ue>* ue_db_, uint32_t cc_idx_);
void reset(); void reset();
void carrier_cfg(); void carrier_cfg(const sched_params_t& sched_params_);
void set_metric(sched::metric_dl* dl_metric_, sched::metric_ul* ul_metric_); void set_metric(sched::metric_dl* dl_metric_, sched::metric_ul* ul_metric_);
void set_dl_tti_mask(uint8_t* tti_mask, uint32_t nof_sfs); void set_dl_tti_mask(uint8_t* tti_mask, uint32_t nof_sfs);
tti_sched_result_t* generate_tti_result(uint32_t tti_rx); tti_sched_result_t* generate_tti_result(uint32_t tti_rx);
@ -55,12 +55,13 @@ private:
int alloc_ul_users(tti_sched_result_t* tti_sched); int alloc_ul_users(tti_sched_result_t* tti_sched);
// args // args
sched* sched_ptr = nullptr; const sched_params_t* sched_params = nullptr;
const sched_params_t* sched_params = nullptr; srslte::log* log_h = nullptr;
srslte::log* log_h = nullptr; rrc_interface_mac* rrc = nullptr;
metric_dl* dl_metric = nullptr; std::map<uint16_t, sched_ue>* ue_db = nullptr;
metric_ul* ul_metric = nullptr; metric_dl* dl_metric = nullptr;
const uint32_t cc_idx; metric_ul* ul_metric = nullptr;
const uint32_t cc_idx;
// derived from args // derived from args
prbmask_t prach_mask; prbmask_t prach_mask;

1
srsenb/hdr/stack/mac/scheduler_grid.h
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@ -245,6 +245,7 @@ public:
uint32_t get_tti_rx() const { return tti_params.tti_rx; } uint32_t get_tti_rx() const { return tti_params.tti_rx; }
uint32_t get_sfn() const { return tti_params.sfn; } uint32_t get_sfn() const { return tti_params.sfn; }
uint32_t get_sf_idx() const { return tti_params.sf_idx; } uint32_t get_sf_idx() const { return tti_params.sf_idx; }
uint32_t get_cc_idx() const { return cc_idx; }
private: private:
bool is_dl_alloc(sched_ue* user) const final; bool is_dl_alloc(sched_ue* user) const final;

4
srsenb/hdr/stack/mac/scheduler_metric.h
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@ -31,7 +31,7 @@ class dl_metric_rr : public sched::metric_dl
const static int MAX_RBG = 25; const static int MAX_RBG = 25;
public: public:
void set_log(srslte::log* log_) final; void set_params(const sched_params_t& sched_params_) final;
void sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx) final; void sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx) final;
private: private:
@ -45,7 +45,7 @@ private:
class ul_metric_rr : public sched::metric_ul class ul_metric_rr : public sched::metric_ul
{ {
public: public:
void set_log(srslte::log* log_) final; void set_params(const sched_params_t& sched_params_) final;
void sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx) final; void sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx) final;
private: private:

5
srsenb/hdr/stack/mac/scheduler_ue.h
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@ -66,9 +66,9 @@ struct sched_ue_carrier {
uint32_t dl_ri_tti = 0; uint32_t dl_ri_tti = 0;
uint32_t dl_pmi = 0; uint32_t dl_pmi = 0;
uint32_t dl_pmi_tti = 0; uint32_t dl_pmi_tti = 0;
uint32_t dl_cqi = 0; uint32_t dl_cqi = 1;
uint32_t dl_cqi_tti = 0; uint32_t dl_cqi_tti = 0;
uint32_t ul_cqi = 0; uint32_t ul_cqi = 1;
uint32_t ul_cqi_tti = 0; uint32_t ul_cqi_tti = 0;
int max_mcs_dl = 28, max_mcs_ul = 28; int max_mcs_dl = 28, max_mcs_ul = 28;
@ -244,6 +244,7 @@ private:
bool is_first_dl_tx(); bool is_first_dl_tx();
/* Args */
sched_interface::ue_cfg_t cfg = {}; sched_interface::ue_cfg_t cfg = {};
srslte_cell_t cell = {}; srslte_cell_t cell = {};
srslte::log* log_h = nullptr; srslte::log* log_h = nullptr;

5
srsenb/src/stack/mac/mac.cc
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@ -515,10 +515,9 @@ int mac::rach_detected(uint32_t tti, uint32_t primary_cc_idx, uint32_t preamble_
} }
// Trigger scheduler RACH // Trigger scheduler RACH
scheduler.dl_rach_info(rar_info); scheduler.dl_rach_info(primary_cc_idx, rar_info);
log_h->info("RACH: tti=%d, preamble=%d, offset=%d, temp_crnti=0x%x\n", log_h->info("RACH: tti=%d, preamble=%d, offset=%d, temp_crnti=0x%x\n", tti, preamble_idx, time_adv, rnti);
tti, preamble_idx, time_adv, rnti);
log_h->console("RACH: tti=%d, preamble=%d, offset=%d, temp_crnti=0x%x\n", log_h->console("RACH: tti=%d, preamble=%d, offset=%d, temp_crnti=0x%x\n",
tti, preamble_idx, time_adv, rnti); tti, preamble_idx, time_adv, rnti);
// Increase RNTI counter // Increase RNTI counter

78
srsenb/src/stack/mac/scheduler.cc
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@ -52,8 +52,28 @@ uint32_t max_tti(uint32_t tti1, uint32_t tti2)
* Sched Params * Sched Params
*******************************************************/ *******************************************************/
bool sched_params_t::set_derived() sched_params_t::sched_params_t()
{ {
sched_cfg.pdsch_max_mcs = 28;
sched_cfg.pdsch_mcs = -1;
sched_cfg.pusch_max_mcs = 28;
sched_cfg.pusch_mcs = -1;
sched_cfg.nof_ctrl_symbols = 3;
sched_cfg.max_aggr_level = 3;
}
bool sched_params_t::set_cfg(srslte::log* log_, sched_interface::cell_cfg_t* cfg_, srslte_regs_t* regs_)
{
log_h = log_;
cfg = cfg_;
regs = regs_;
// Basic cell config checks
if (cfg->si_window_ms == 0) {
Error("SCHED: Invalid si-window length 0 ms\n");
return false;
}
// Compute Common locations for DCI for each CFI // Compute Common locations for DCI for each CFI
for (uint32_t cfi = 0; cfi < 3; cfi++) { for (uint32_t cfi = 0; cfi < 3; cfi++) {
sched::generate_cce_location(regs, &common_locations[cfi], cfi + 1); sched::generate_cce_location(regs, &common_locations[cfi], cfi + 1);
@ -88,6 +108,17 @@ bool sched_params_t::set_derived()
return false; return false;
} }
// PRACH has to fit within the PUSCH space
bool invalid_prach = cfg->cell.nof_prb == 6 and (cfg->prach_freq_offset + 6 > cfg->cell.nof_prb);
invalid_prach |= cfg->cell.nof_prb > 6 and ((cfg->prach_freq_offset + 6) > (cfg->cell.nof_prb - cfg->nrb_pucch) or
(int) cfg->prach_freq_offset < cfg->nrb_pucch);
if (invalid_prach) {
log_h->error("Invalid PRACH configuration: frequency offset=%d outside bandwidth limits\n", cfg->prach_freq_offset);
log_h->console("Invalid PRACH configuration: frequency offset=%d outside bandwidth limits\n",
cfg->prach_freq_offset);
return false;
}
return true; return true;
} }
@ -108,32 +139,23 @@ sched::sched()
pthread_rwlock_init(&rwlock, nullptr); pthread_rwlock_init(&rwlock, nullptr);
// Initialize Independent carrier schedulers
carrier_schedulers.emplace_back(new carrier_sched{this, 0});
reset(); reset();
} }
sched::~sched() sched::~sched()
{ {
srslte_regs_free(&regs); srslte_regs_free(&regs);
pthread_rwlock_wrlock(&rwlock);
pthread_rwlock_unlock(&rwlock);
pthread_rwlock_destroy(&rwlock); pthread_rwlock_destroy(&rwlock);
} }
void sched::init(rrc_interface_mac* rrc_, srslte::log* log) void sched::init(rrc_interface_mac* rrc_, srslte::log* log)
{ {
sched_params.sched_cfg.pdsch_max_mcs = 28;
sched_params.sched_cfg.pdsch_mcs = -1;
sched_params.sched_cfg.pusch_max_mcs = 28;
sched_params.sched_cfg.pusch_mcs = -1;
sched_params.sched_cfg.nof_ctrl_symbols = 3;
sched_params.sched_cfg.max_aggr_level = 3;
sched_params.log_h = log;
log_h = log; log_h = log;
rrc = rrc_; rrc = rrc_;
// Initialize Independent carrier schedulers
carrier_schedulers.emplace_back(new carrier_sched{rrc, &ue_db, 0});
reset(); reset();
} }
@ -165,12 +187,6 @@ void sched::set_metric(sched::metric_dl* dl_metric_, sched::metric_ul* ul_metric
int sched::cell_cfg(sched_interface::cell_cfg_t* cell_cfg) int sched::cell_cfg(sched_interface::cell_cfg_t* cell_cfg)
{ {
// Basic cell config checks
if (cell_cfg->si_window_ms == 0) {
Error("SCHED: Invalid si-window length 0 ms\n");
return -1;
}
cfg = *cell_cfg; cfg = *cell_cfg;
// Get DCI locations // Get DCI locations
@ -179,29 +195,17 @@ int sched::cell_cfg(sched_interface::cell_cfg_t* cell_cfg)
return SRSLTE_ERROR; return SRSLTE_ERROR;
} }
sched_params.cfg = &cfg; // Setup common sched_params
sched_params.regs = &regs; if (not sched_params.set_cfg(log_h, &cfg, &regs)) {
if (not sched_params.set_derived()) {
return -1; return -1;
} }
// Initiate the tti_scheduler for each TTI // Initiate the tti_scheduler for each TTI
for (std::unique_ptr<carrier_sched>& c : carrier_schedulers) { for (std::unique_ptr<carrier_sched>& c : carrier_schedulers) {
c->carrier_cfg(); c->carrier_cfg(sched_params);
} }
configured = true; configured = true;
// PRACH has to fit within the PUSCH space
bool invalid_prach = cfg.cell.nof_prb == 6 and (cfg.prach_freq_offset + 6 > cfg.cell.nof_prb);
invalid_prach |= cfg.cell.nof_prb > 6 and ((cfg.prach_freq_offset + 6) > (cfg.cell.nof_prb - cfg.nrb_pucch) or
(int) cfg.prach_freq_offset < cfg.nrb_pucch);
if (invalid_prach) {
log_h->error("Invalid PRACH configuration: frequency offset=%d outside bandwidth limits\n", cfg.prach_freq_offset);
log_h->console("Invalid PRACH configuration: frequency offset=%d outside bandwidth limits\n",
cfg.prach_freq_offset);
return -1;
}
return 0; return 0;
} }
@ -327,9 +331,9 @@ int sched::dl_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cq
return ue_db_access(rnti, [tti, cc_idx, cqi_value](sched_ue& ue) { ue.set_dl_cqi(tti, cc_idx, cqi_value); }); return ue_db_access(rnti, [tti, cc_idx, cqi_value](sched_ue& ue) { ue.set_dl_cqi(tti, cc_idx, cqi_value); });
} }
int sched::dl_rach_info(dl_sched_rar_info_t rar_info) int sched::dl_rach_info(uint32_t cc_idx, dl_sched_rar_info_t rar_info)
{ {
return carrier_schedulers[0]->dl_rach_info(rar_info); return carrier_schedulers[cc_idx]->dl_rach_info(rar_info);
} }
int sched::ul_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi, uint32_t ul_ch_code) int sched::ul_cqi_info(uint32_t tti, uint16_t rnti, uint32_t cc_idx, uint32_t cqi, uint32_t ul_ch_code)

32
srsenb/src/stack/mac/scheduler_carrier.cc
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@ -206,12 +206,13 @@ void ra_sched::dl_sched(srsenb::tti_sched_result_t* tti_sched)
pending_msg3[pending_tti].n_prb = n_prb; pending_msg3[pending_tti].n_prb = n_prb;
dl_sched_rar_grant_t* last_msg3 = &rar_grant.msg3_grant[rar_grant.nof_grants - 1]; dl_sched_rar_grant_t* last_msg3 = &rar_grant.msg3_grant[rar_grant.nof_grants - 1];
pending_msg3[pending_tti].mcs = last_msg3->grant.trunc_mcs; pending_msg3[pending_tti].mcs = last_msg3->grant.trunc_mcs;
log_h->info("SCHED: Allocating Msg3 for rnti=%d at tti=%d\n", log_h->info("SCHED: Queueing Msg3 for rnti=0x%x at tti=%d\n",
rar.temp_crnti, rar.temp_crnti,
tti_sched->get_tti_tx_dl() + MSG3_DELAY_MS + TX_DELAY); tti_sched->get_tti_tx_dl() + MSG3_DELAY_MS + TX_DELAY);
// Remove pending RAR and exit // Remove pending RAR
pending_rars.pop(); pending_rars.pop();
return; return;
} }
} }
@ -275,7 +276,10 @@ const ra_sched::pending_msg3_t& ra_sched::find_pending_msg3(uint32_t tti) const
* Carrier scheduling * Carrier scheduling
*******************************************************/ *******************************************************/
sched::carrier_sched::carrier_sched(sched* sched_, uint32_t cc_idx_) : sched_ptr(sched_), cc_idx(cc_idx_) sched::carrier_sched::carrier_sched(rrc_interface_mac* rrc_, std::map<uint16_t, sched_ue>* ue_db_, uint32_t cc_idx_) :
rrc(rrc_),
ue_db(ue_db_),
cc_idx(cc_idx_)
{ {
tti_dl_mask.resize(1, 0); tti_dl_mask.resize(1, 0);
} }
@ -287,21 +291,21 @@ void sched::carrier_sched::reset()
bc_sched_ptr.reset(); bc_sched_ptr.reset();
} }
void sched::carrier_sched::carrier_cfg() void sched::carrier_sched::carrier_cfg(const sched_params_t& sched_params_)
{ {
// sched::cfg is now fully set // sched::cfg is now fully set
sched_params = &sched_ptr->sched_params; sched_params = &sched_params_;
log_h = sched_params->log_h; log_h = sched_params->log_h;
const cell_cfg_t* cfg_ = sched_params->cfg; const cell_cfg_t* cfg_ = sched_params->cfg;
std::lock_guard<std::mutex> lock(carrier_mutex); std::lock_guard<std::mutex> lock(carrier_mutex);
// init Broadcast/RA schedulers // init Broadcast/RA schedulers
bc_sched_ptr.reset(new bc_sched{*sched_params->cfg, sched_ptr->rrc}); bc_sched_ptr.reset(new bc_sched{*sched_params->cfg, rrc});
ra_sched_ptr.reset(new ra_sched{*sched_params->cfg, log_h, sched_ptr->ue_db}); ra_sched_ptr.reset(new ra_sched{*sched_params->cfg, log_h, *ue_db});
dl_metric->set_log(log_h); dl_metric->set_params(*sched_params);
ul_metric->set_log(log_h); ul_metric->set_params(*sched_params);
// Setup constant PUCCH/PRACH mask // Setup constant PUCCH/PRACH mask
pucch_mask.resize(cfg_->cell.nof_prb); pucch_mask.resize(cfg_->cell.nof_prb);
@ -369,7 +373,7 @@ tti_sched_result_t* sched::carrier_sched::generate_tti_result(uint32_t tti_rx)
tti_sched->generate_dcis(); tti_sched->generate_dcis();
/* reset PIDs with pending data or blocked */ /* reset PIDs with pending data or blocked */
for (auto& user : sched_ptr->ue_db) { for (auto& user : *ue_db) {
user.second.reset_pending_pids(tti_rx, cc_idx); user.second.reset_pending_pids(tti_rx, cc_idx);
} }
} }
@ -381,7 +385,7 @@ void sched::carrier_sched::generate_phich(tti_sched_result_t* tti_sched)
{ {
// Allocate user PHICHs // Allocate user PHICHs
uint32_t nof_phich_elems = 0; uint32_t nof_phich_elems = 0;
for (auto& ue_pair : sched_ptr->ue_db) { for (auto& ue_pair : *ue_db) {
sched_ue& user = ue_pair.second; sched_ue& user = ue_pair.second;
uint16_t rnti = ue_pair.first; uint16_t rnti = ue_pair.first;
@ -422,7 +426,7 @@ void sched::carrier_sched::alloc_dl_users(tti_sched_result_t* tti_result)
} }
// call DL scheduler metric to fill RB grid // call DL scheduler metric to fill RB grid
dl_metric->sched_users(sched_ptr->ue_db, tti_result, cc_idx); dl_metric->sched_users(*ue_db, tti_result, cc_idx);
} }
int sched::carrier_sched::alloc_ul_users(tti_sched_result_t* tti_sched) int sched::carrier_sched::alloc_ul_users(tti_sched_result_t* tti_sched)
@ -448,10 +452,10 @@ int sched::carrier_sched::alloc_ul_users(tti_sched_result_t* tti_sched)
ul_mask |= pucch_mask; ul_mask |= pucch_mask;
/* Call scheduler for UL data */ /* Call scheduler for UL data */
ul_metric->sched_users(sched_ptr->ue_db, tti_sched, cc_idx); ul_metric->sched_users(*ue_db, tti_sched, cc_idx);
/* Update pending data counters after this TTI */ /* Update pending data counters after this TTI */
for (auto& user : sched_ptr->ue_db) { for (auto& user : *ue_db) {
user.second.get_ul_harq(tti_tx_ul, cc_idx)->reset_pending_data(); user.second.get_ul_harq(tti_tx_ul, cc_idx)->reset_pending_data();
} }

8
srsenb/src/stack/mac/scheduler_metric.cc
Unescape Escape View File

@ -36,9 +36,9 @@ namespace srsenb {
* *
*****************************************************************/ *****************************************************************/
void dl_metric_rr::set_log(srslte::log* log_) void dl_metric_rr::set_params(const sched_params_t& sched_params_)
{ {
log_h = log_; log_h = sched_params_.log_h;
} }
void dl_metric_rr::sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx) void dl_metric_rr::sched_users(std::map<uint16_t, sched_ue>& ue_db, dl_tti_sched_t* tti_sched, uint32_t cc_idx)
@ -148,9 +148,9 @@ dl_harq_proc* dl_metric_rr::allocate_user(sched_ue* user, uint32_t cc_idx)
* *
*****************************************************************/ *****************************************************************/
void ul_metric_rr::set_log(srslte::log* log_) void ul_metric_rr::set_params(const sched_params_t& sched_params_)
{ {
log_h = log_; log_h = sched_params_.log_h;
} }
void ul_metric_rr::sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx) void ul_metric_rr::sched_users(std::map<uint16_t, sched_ue>& ue_db, ul_tti_sched_t* tti_sched, uint32_t cc_idx)

5
srsenb/src/stack/mac/scheduler_ue.cc
Unescape Escape View File

@ -404,6 +404,7 @@ int sched_ue::generate_format1(dl_harq_proc* h,
if (is_first_dl_tx()) { if (is_first_dl_tx()) {
need_conres_ce = true; need_conres_ce = true;
} }
if (h->is_empty(0)) { if (h->is_empty(0)) {
// Get total available data to transmit (includes MAC header) // Get total available data to transmit (includes MAC header)
@ -445,6 +446,7 @@ int sched_ue::generate_format1(dl_harq_proc* h,
data->pdu[0][data->nof_pdu_elems[0]].lcid = srslte::sch_subh::CON_RES_ID; data->pdu[0][data->nof_pdu_elems[0]].lcid = srslte::sch_subh::CON_RES_ID;
data->nof_pdu_elems[0]++; data->nof_pdu_elems[0]++;
Info("SCHED: Added MAC Contention Resolution CE for rnti=0x%x\n", rnti); Info("SCHED: Added MAC Contention Resolution CE for rnti=0x%x\n", rnti);
} else { } else {
// Add TA CE. TODO: Common interface to add MAC CE // Add TA CE. TODO: Common interface to add MAC CE
// FIXME: Can't put it in Msg4 because current srsUE doesn't read it // FIXME: Can't put it in Msg4 because current srsUE doesn't read it
@ -741,8 +743,7 @@ bool sched_ue::is_first_dl_tx()
bool sched_ue::needs_cqi(uint32_t tti, uint32_t cc_idx, bool will_be_sent) bool sched_ue::needs_cqi(uint32_t tti, uint32_t cc_idx, bool will_be_sent)
{ {
std::lock_guard<std::mutex> lock(mutex); std::lock_guard<std::mutex> lock(mutex);
bool ret = needs_cqi_unlocked(tti, cc_idx, will_be_sent); return needs_cqi_unlocked(tti, cc_idx, will_be_sent);
return ret;
} }
// Private lock-free implemenentation // Private lock-free implemenentation

2
srsenb/test/mac/scheduler_test_rand.cc
Unescape Escape View File

@ -249,7 +249,7 @@ int sched_tester::add_user(uint16_t rnti,
rar_info.prach_tti = tti_data.tti_rx; rar_info.prach_tti = tti_data.tti_rx;
rar_info.temp_crnti = rnti; rar_info.temp_crnti = rnti;
rar_info.msg3_size = 7; rar_info.msg3_size = 7;
dl_rach_info(rar_info); dl_rach_info(CARRIER_IDX, rar_info);
// setup bearers // setup bearers
bearer_ue_cfg(rnti, 0, &bearer_cfg); bearer_ue_cfg(rnti, 0, &bearer_cfg);

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