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sched,nr: implementation of PUCCH HARQ allocation in NR

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master
Francisco Paisana 3 years ago
parent bcc374c2cd
commit 23afc66a86
17 changed files with 174 additions and 138 deletions
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2
srsenb/hdr/stack/mac/nr/sched_nr.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_H
#define SRSRAN_SCHED_NR_H
#include "sched_nr_common.h"
#include "sched_nr_cfg.h"
#include "sched_nr_interface.h"
#include "sched_nr_ue.h"
#include "srsran/adt/pool/cached_alloc.h"

41
srsenb/hdr/stack/mac/nr/sched_nr_common.h → srsenb/hdr/stack/mac/nr/sched_nr_cfg.h
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@ -10,8 +10,8 @@
*
*/
#ifndef SRSRAN_SCHED_NR_COMMON_H
#define SRSRAN_SCHED_NR_COMMON_H
#ifndef SRSRAN_SCHED_NR_CFG_H
#define SRSRAN_SCHED_NR_CFG_H
#include "sched_nr_interface.h"
#include "srsran/adt/bounded_bitset.h"
@ -27,6 +27,10 @@ namespace sched_nr_impl {
const static size_t MAX_GRANTS = sched_nr_interface::MAX_GRANTS;
using pucch_resource_grant = sched_nr_interface::pucch_resource_grant;
using pucch_grant = sched_nr_interface::pucch_grant;
using pucch_list_t = sched_nr_interface::pucch_list_t;
using sched_cfg_t = sched_nr_interface::sched_cfg_t;
using cell_cfg_t = sched_nr_interface::cell_cfg_t;
@ -95,8 +99,39 @@ void get_dci_locs(const srsran_coreset_t& coreset,
uint16_t rnti,
bwp_cce_pos_list& cce_locs);
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
using ue_cfg_t = sched_nr_interface::ue_cfg_t;
using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t;
class ue_cfg_extended : public ue_cfg_t
{
public:
struct search_space_params {
srsran_search_space_t* cfg = nullptr;
};
struct coreset_params {
srsran_coreset_t* cfg = nullptr;
std::vector<search_space_params*> ss_list;
bwp_cce_pos_list cce_positions;
};
struct bwp_params {
std::vector<search_space_params> search_spaces;
std::vector<coreset_params> coresets;
};
struct cc_params {
srsran::bounded_vector<bwp_params, SCHED_NR_MAX_BWP_PER_CELL> bwps;
};
uint16_t rnti;
std::vector<cc_params> cc_params;
ue_cfg_extended() = default;
explicit ue_cfg_extended(uint16_t rnti, const ue_cfg_t& uecfg);
};
} // namespace sched_nr_impl
} // namespace srsenb
#endif // SRSRAN_SCHED_NR_COMMON_H
#endif // SRSRAN_SCHED_NR_CFG_H

2
srsenb/hdr/stack/mac/nr/sched_nr_harq.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_HARQ_H
#define SRSRAN_SCHED_NR_HARQ_H
#include "sched_nr_common.h"
#include "sched_nr_cfg.h"
#include "srsran/common/tti_point.h"
#include <array>

28
srsenb/hdr/stack/mac/nr/sched_nr_interface.h
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@ -86,28 +86,36 @@ public:
using pdcch_dl_t = mac_interface_phy_nr::pdcch_dl_t;
using pdcch_ul_t = mac_interface_phy_nr::pdcch_ul_t;
using pdcch_dl_list_t = srsran::bounded_vector<pdcch_dl_t, MAX_GRANTS>;
using pdcch_ul_list_t = srsran::bounded_vector<pdcch_ul_t, MAX_GRANTS>;
struct pdsch_t {
srsran_sch_cfg_nr_t sch = {}; ///< PDSCH configuration
struct pdsch_grant {
srsran_dci_dl_nr_t dci = {};
};
using pdsch_list_t = srsran::bounded_vector<pdsch_t, MAX_GRANTS>;
using pdsch_list_t = srsran::bounded_vector<pdsch_grant, MAX_GRANTS>;
struct dl_tti_request_t {
tti_point pdsch_tti;
pdcch_dl_list_t pdcchs;
pdsch_list_t pdschs;
};
struct pusch_t {
srsran_sch_cfg_nr_t sch = {}; ///< PUSCH configuration
struct pusch_grant {
srsran_dci_ul_nr_t dci = {};
};
using pusch_list_t = srsran::bounded_vector<pusch_t, MAX_GRANTS>;
using pusch_list_t = srsran::bounded_vector<pusch_grant, MAX_GRANTS>;
struct pucch_resource_grant {
uint16_t rnti;
uint32_t resource_set_id;
uint32_t resource_id;
};
struct pucch_grant {
pucch_resource_grant resource;
};
using pucch_list_t = srsran::bounded_vector<pucch_grant, MAX_GRANTS>;
struct ul_tti_request_t {
tti_point pusch_tti;
srsran::bounded_vector<pusch_t, MAX_GRANTS> pusch;
pusch_list_t puschs;
pucch_list_t pucchs;
};
struct tti_request_t {

18
srsenb/hdr/stack/mac/nr/sched_nr_pdcch.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_PDCCH_H
#define SRSRAN_SCHED_NR_PDCCH_H
#include "srsenb/hdr/stack/mac/nr/sched_nr_common.h"
#include "srsenb/hdr/stack/mac/nr/sched_nr_cfg.h"
#include "srsran/adt/bounded_bitset.h"
#include "srsran/adt/bounded_vector.h"
#include "srsran/phy/common/phy_common_nr.h"
@ -30,10 +30,10 @@ enum class pdcch_grant_type_t { sib, dl_data, ul_data };
class slot_ue;
using bwp_cfg_t = sched_nr_interface::bwp_cfg_t;
using pdcch_dl_t = sched_nr_interface::pdcch_dl_t;
using pdcch_dl_list_t = sched_nr_interface::pdcch_dl_list_t;
using pdcch_ul_t = sched_nr_interface::pdcch_ul_t;
using pdcch_ul_list_t = sched_nr_interface::pdcch_ul_list_t;
using pdsch_list_t = sched_nr_interface::pdsch_list_t;
using pdsch_grant = sched_nr_interface::pdsch_grant;
using pusch_list_t = sched_nr_interface::pusch_list_t;
using pusch_grant = sched_nr_interface::pusch_grant;
class coreset_region
{
@ -41,8 +41,8 @@ public:
coreset_region(const bwp_cfg_t& bwp_cfg_,
uint32_t coreset_id_,
uint32_t slot_idx,
pdcch_dl_list_t& pdcch_dl_list,
pdcch_ul_list_t& pdcch_ul_list);
pdsch_list_t& pdcch_dl_list,
pusch_list_t& pdcch_ul_list);
void reset();
/**
@ -76,8 +76,8 @@ private:
slot_ue* ue;
};
srsran::bounded_vector<alloc_record, MAX_GRANTS> dci_list;
pdcch_dl_list_t& pdcch_dl_list;
pdcch_ul_list_t& pdcch_ul_list;
pdsch_list_t& pdcch_dl_list;
pusch_list_t& pdcch_ul_list;
// DFS decision tree of PDCCH grants
struct tree_node {

4
srsenb/hdr/stack/mac/nr/sched_nr_phy_helpers.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_PHY_HELPERS_H
#define SRSRAN_SCHED_NR_PHY_HELPERS_H
#include "sched_nr_common.h"
#include "sched_nr_cfg.h"
namespace srsenb {
namespace sched_nr_impl {
@ -39,6 +39,8 @@ void fill_pusch_ue(const slot_ue& ue,
const sched_cell_params& cc_cfg,
srsran_sch_cfg_nr_t& sch);
pucch_resource_grant find_pucch_resource(const slot_ue& ue, const rbgmask_t& rbgs, uint32_t tbs);
} // namespace sched_nr_impl
} // namespace srsenb

14
srsenb/hdr/stack/mac/nr/sched_nr_rb_grid.h
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@ -25,13 +25,11 @@ namespace sched_nr_impl {
using pdsch_bitmap = srsran::bounded_bitset<25, true>;
using pusch_bitmap = srsran::bounded_bitset<25, true>;
using pdsch_t = sched_nr_interface::pdsch_t;
using pdsch_t = sched_nr_interface::pdsch_grant;
using pdsch_list_t = sched_nr_interface::pdsch_list_t;
using pusch_list = sched_nr_interface::pusch_list_t;
struct pucch_t {};
const static size_t MAX_CORESET_PER_BWP = 3;
using slot_coreset_list = srsran::bounded_vector<coreset_region, MAX_CORESET_PER_BWP>;
@ -39,14 +37,12 @@ struct bwp_slot_grid {
uint32_t bwp_id;
uint32_t slot_idx;
bool is_dl, is_ul;
pdcch_dl_list_t pdcch_dl_list;
pdcch_ul_list_t pdcch_ul_list;
slot_coreset_list coresets;
pdsch_bitmap dl_rbgs;
pdsch_list_t pdsch_grants;
pusch_bitmap ul_rbgs;
pusch_list pusch_grants;
srsran::bounded_vector<pucch_t, MAX_GRANTS> pucch_grants;
pdsch_list_t pdschs;
pusch_list_t puschs;
slot_coreset_list coresets;
pucch_list_t pucchs;
bwp_slot_grid() = default;
explicit bwp_slot_grid(const sched_cell_params& cell_params, uint32_t bwp_id_, uint32_t slot_idx_);

31
srsenb/hdr/stack/mac/nr/sched_nr_ue.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_UE_H
#define SRSRAN_SCHED_NR_UE_H
#include "sched_nr_common.h"
#include "sched_nr_cfg.h"
#include "sched_nr_harq.h"
#include "sched_nr_interface.h"
#include "srsran/adt/circular_map.h"
@ -24,35 +24,6 @@ namespace srsenb {
namespace sched_nr_impl {
using ue_cfg_t = sched_nr_interface::ue_cfg_t;
using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t;
class ue_cfg_extended : public ue_cfg_t
{
public:
struct search_space_params {
srsran_search_space_t* cfg = nullptr;
};
struct coreset_params {
srsran_coreset_t* cfg = nullptr;
std::vector<search_space_params*> ss_list;
bwp_cce_pos_list cce_positions;
};
struct bwp_params {
std::vector<search_space_params> search_spaces;
std::vector<coreset_params> coresets;
};
struct cc_params {
srsran::bounded_vector<bwp_params, SCHED_NR_MAX_BWP_PER_CELL> bwps;
};
uint16_t rnti;
std::vector<cc_params> cc_params;
ue_cfg_extended() = default;
explicit ue_cfg_extended(uint16_t rnti, const ue_cfg_t& uecfg);
};
class ue_carrier;
class slot_ue

2
srsenb/hdr/stack/mac/nr/sched_nr_worker.h
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@ -13,7 +13,7 @@
#ifndef SRSRAN_SCHED_NR_WORKER_H
#define SRSRAN_SCHED_NR_WORKER_H
#include "sched_nr_common.h"
#include "sched_nr_cfg.h"
#include "sched_nr_rb_grid.h"
#include "sched_nr_ue.h"
#include "srsran/adt/circular_array.h"

2
srsenb/src/stack/mac/nr/CMakeLists.txt
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@ -6,6 +6,6 @@
# the distribution.
#
set(SOURCES mac_nr.cc sched_nr.cc sched_nr_ue.cc sched_nr_worker.cc sched_nr_rb_grid.cc sched_nr_harq.cc sched_nr_pdcch.cc sched_nr_common.cc sched_nr_phy_helpers.cc)
set(SOURCES mac_nr.cc sched_nr.cc sched_nr_ue.cc sched_nr_worker.cc sched_nr_rb_grid.cc sched_nr_harq.cc sched_nr_pdcch.cc sched_nr_cfg.cc sched_nr_phy_helpers.cc)
add_library(srsgnb_mac STATIC ${SOURCES})

32
srsenb/src/stack/mac/nr/sched_nr_common.cc → srsenb/src/stack/mac/nr/sched_nr_cfg.cc
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@ -10,7 +10,7 @@
*
*/
#include "srsenb/hdr/stack/mac/nr/sched_nr_common.h"
#include "srsenb/hdr/stack/mac/nr/sched_nr_cfg.h"
namespace srsenb {
namespace sched_nr_impl {
@ -39,5 +39,35 @@ void get_dci_locs(const srsran_coreset_t& coreset,
}
}
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
ue_cfg_extended::ue_cfg_extended(uint16_t rnti_, const ue_cfg_t& uecfg) : ue_cfg_t(uecfg), rnti(rnti_)
{
cc_params.resize(carriers.size());
for (uint32_t cc = 0; cc < cc_params.size(); ++cc) {
cc_params[cc].bwps.resize(1);
auto& bwp = cc_params[cc].bwps[0];
for (uint32_t ssid = 0; ssid < SRSRAN_UE_DL_NR_MAX_NOF_SEARCH_SPACE; ++ssid) {
if (phy_cfg.pdcch.search_space_present[ssid]) {
bwp.search_spaces.emplace_back();
bwp.search_spaces.back().cfg = &phy_cfg.pdcch.search_space[ssid];
}
}
for (uint32_t csid = 0; csid < SRSRAN_UE_DL_NR_MAX_NOF_CORESET; ++csid) {
if (phy_cfg.pdcch.coreset_present[csid]) {
bwp.coresets.emplace_back();
auto& coreset = bwp.coresets.back();
coreset.cfg = &phy_cfg.pdcch.coreset[csid];
for (auto& ss : bwp.search_spaces) {
if (ss.cfg->coreset_id == csid + 1) {
coreset.ss_list.push_back(&ss);
get_dci_locs(*coreset.cfg, *coreset.ss_list.back()->cfg, rnti, coreset.cce_positions);
}
}
}
}
}
}
} // namespace sched_nr_impl
} // namespace srsenb

12
srsenb/src/stack/mac/nr/sched_nr_pdcch.cc
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@ -19,14 +19,14 @@ namespace sched_nr_impl {
coreset_region::coreset_region(const bwp_cfg_t& bwp_cfg_,
uint32_t coreset_id_,
uint32_t slot_idx_,
pdcch_dl_list_t& pdcch_dl_list_,
pdcch_ul_list_t& pdcch_ul_list_) :
pdsch_list_t& dl_list_,
pusch_list_t& ul_list_) :
bwp_cfg(&bwp_cfg_),
coreset_cfg(&bwp_cfg_.coresets[coreset_id_ - 1].value()),
coreset_id(coreset_id_),
slot_idx(slot_idx_),
pdcch_dl_list(pdcch_dl_list_),
pdcch_ul_list(pdcch_ul_list_)
pdcch_dl_list(dl_list_),
pdcch_ul_list(ul_list_)
{
const bool* res_active = &coreset_cfg->freq_resources[0];
nof_freq_res = std::count(res_active, res_active + SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE, true);
@ -156,10 +156,10 @@ bool coreset_region::alloc_dfs_node(const alloc_record& record, uint32_t start_d
alloc_dfs.push_back(node);
// set new DCI position
if (record.alloc_type == pdcch_grant_type_t::ul_data) {
pdcch_ul_t& pdcch_ul = pdcch_ul_list[record.idx];
pusch_grant& pdcch_ul = pdcch_ul_list[record.idx];
pdcch_ul.dci.ctx.location = node.dci_pos;
} else {
pdcch_dl_t& pdcch_dl = pdcch_dl_list[record.idx];
pdsch_grant& pdcch_dl = pdcch_dl_list[record.idx];
pdcch_dl.dci.ctx.location = node.dci_pos;
}
return true;

17
srsenb/src/stack/mac/nr/sched_nr_phy_helpers.cc
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@ -85,6 +85,7 @@ int bitmap_to_riv(const rbgmask_t& bitmap, uint32_t cell_nof_prb)
template <typename DciDlOrUl>
void fill_dci_common(const slot_ue& ue, const rbgmask_t& bitmap, const sched_cell_params& cc_cfg, DciDlOrUl& dci)
{
const static uint32_t rv_idx[4] = {0, 2, 3, 1};
// Note: PDCCH DCI position already filled at this point
dci.bwp_id = ue.bwp_id;
dci.cc_id = ue.cc;
@ -97,6 +98,7 @@ void fill_dci_common(const slot_ue& ue, const rbgmask_t& bitmap, const sched_cel
dci.pid = h->pid;
dci.ndi = h->ndi();
dci.mcs = h->mcs();
dci.rv = rv_idx[h->nof_retx() % 4];
}
void fill_dci_ue_cfg(const slot_ue& ue,
@ -146,5 +148,20 @@ void fill_pusch_ue(const slot_ue& ue,
sch.grant.dci_format = srsran_dci_format_nr_0_1;
}
pucch_resource_grant find_pucch_resource(const slot_ue& ue, const rbgmask_t& rbgs, uint32_t tbs)
{
if (ue.cfg->phy_cfg.pucch.enabled) {
for (uint32_t i = 0; i < SRSRAN_PUCCH_NR_MAX_NOF_SETS; ++i) {
const auto& rset = ue.cfg->phy_cfg.pucch.sets[i];
if (rset.max_payload_size >= tbs) {
for (uint32_t sid = 0; sid < rset.nof_resources; ++sid) {
return pucch_resource_grant{ue.rnti, i, sid};
}
}
}
}
return pucch_resource_grant{SRSRAN_INVALID_RNTI, 0, 0};
}
} // namespace sched_nr_impl
} // namespace srsenb

47
srsenb/src/stack/mac/nr/sched_nr_rb_grid.cc
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@ -16,8 +16,6 @@
namespace srsenb {
namespace sched_nr_impl {
using pusch_t = sched_nr_interface::pusch_t;
#define NUMEROLOGY_IDX 0
bwp_slot_grid::bwp_slot_grid(const sched_cell_params& cell_params, uint32_t bwp_id_, uint32_t slot_idx_) :
@ -29,7 +27,7 @@ bwp_slot_grid::bwp_slot_grid(const sched_cell_params& cell_params, uint32_t bwp_
is_ul(srsran_tdd_nr_is_ul(&cell_params.cell_cfg.tdd, NUMEROLOGY_IDX, slot_idx_))
{
const uint32_t coreset_id = 1; // Note: for now only one coreset per BWP supported
coresets.emplace_back(cell_params.cell_cfg.bwps[0], coreset_id, slot_idx_, pdcch_dl_list, pdcch_ul_list);
coresets.emplace_back(cell_params.cell_cfg.bwps[0], coreset_id, slot_idx_, pdschs, puschs);
}
void bwp_slot_grid::reset()
@ -39,10 +37,9 @@ void bwp_slot_grid::reset()
}
dl_rbgs.reset();
ul_rbgs.reset();
pdsch_grants.clear();
pdcch_dl_list.clear();
pusch_grants.clear();
pucch_grants.clear();
pdschs.clear();
puschs.clear();
pucchs.clear();
}
bwp_res_grid::bwp_res_grid(const sched_cell_params& cell_cfg_, uint32_t bwp_id_) : bwp_id(bwp_id_), cell_cfg(&cell_cfg_)
@ -71,12 +68,14 @@ alloc_result slot_bwp_sched::alloc_pdsch(slot_ue& ue, const rbgmask_t& dl_mask)
logger.warning("SCHED: Trying to allocate PDSCH for rnti=0x%x with no available HARQs", ue.rnti);
return alloc_result::no_rnti_opportunity;
}
bwp_slot_grid& bwp_pdcch_slot = bwp_grid[ue.pdcch_tti];
bwp_slot_grid& bwp_pdsch_slot = bwp_grid[ue.pdsch_tti];
bwp_slot_grid& bwp_uci_slot = bwp_grid[ue.uci_tti];
if (not bwp_pdsch_slot.is_dl) {
logger.warning("SCHED: Trying to allocate PDSCH in TDD non-DL slot index=%d", bwp_pdsch_slot.slot_idx);
return alloc_result::no_sch_space;
}
pdsch_list_t& pdsch_grants = bwp_pdsch_slot.pdsch_grants;
pdsch_list_t& pdsch_grants = bwp_pdsch_slot.pdschs;
if (pdsch_grants.full()) {
logger.warning("SCHED: Maximum number of DL allocations reached");
return alloc_result::no_grant_space;
@ -85,8 +84,8 @@ alloc_result slot_bwp_sched::alloc_pdsch(slot_ue& ue, const rbgmask_t& dl_mask)
if ((pdsch_mask & dl_mask).any()) {
return alloc_result::sch_collision;
}
const uint32_t aggr_idx = 2, coreset_id = 1;
if (not bwp_grid[ue.pdcch_tti].coresets[coreset_id - 1].alloc_dci(pdcch_grant_type_t::dl_data, aggr_idx, &ue)) {
const uint32_t aggr_idx = 2, coreset_id = 0;
if (not bwp_pdcch_slot.coresets[coreset_id].alloc_dci(pdcch_grant_type_t::dl_data, aggr_idx, &ue)) {
// Could not find space in PDCCH
return alloc_result::no_cch_space;
}
@ -102,12 +101,22 @@ alloc_result slot_bwp_sched::alloc_pdsch(slot_ue& ue, const rbgmask_t& dl_mask)
srsran_assert(ret, "Failed to allocate DL HARQ retx");
}
pucch_resource_grant pucch_res = find_pucch_resource(ue, bwp_uci_slot.ul_rbgs, tbs);
if (pucch_res.rnti != SRSRAN_INVALID_RNTI) {
// Could not find space in PUCCH for HARQ-ACK
bwp_pdcch_slot.coresets[coreset_id].rem_last_dci();
return alloc_result::no_cch_space;
}
// Allocation Successful
pdcch_dl_t& pdcch = bwp_grid[ue.pdcch_tti].pdcch_dl_list.back();
pdsch_grant& pdcch = bwp_pdcch_slot.pdschs.back();
fill_dci_ue_cfg(ue, dl_mask, bwp_grid.cell_params(), pdcch.dci);
pdsch_grants.emplace_back();
fill_pdsch_ue(ue, dl_mask, bwp_grid.cell_params(), pdsch_grants.back().sch);
pdsch_mask |= dl_mask;
bwp_uci_slot.pucchs.emplace_back();
pucch_grant& pucch = bwp_uci_slot.pucchs.back();
pucch.resource = pucch_res;
bwp_uci_slot.ul_rbgs.set(
ue.cfg->phy_cfg.pucch.sets[pucch_res.resource_set_id].resources[pucch_res.resource_id].starting_prb);
return alloc_result::success;
}
@ -123,7 +132,7 @@ alloc_result slot_bwp_sched::alloc_pusch(slot_ue& ue, const rbgmask_t& ul_mask)
logger.warning("SCHED: Trying to allocate PUSCH in TDD non-UL slot index=%d", bwp_pusch_slot.slot_idx);
return alloc_result::no_sch_space;
}
pusch_list& pusch_grants = bwp_pusch_slot.pusch_grants;
pusch_list& pusch_grants = bwp_pusch_slot.puschs;
if (pusch_grants.full()) {
logger.warning("SCHED: Maximum number of UL allocations reached");
return alloc_result::no_grant_space;
@ -132,8 +141,8 @@ alloc_result slot_bwp_sched::alloc_pusch(slot_ue& ue, const rbgmask_t& ul_mask)
if ((pusch_mask & ul_mask).any()) {
return alloc_result::sch_collision;
}
const uint32_t aggr_idx = 2, coreset_id = 1;
if (not bwp_grid[ue.pdcch_tti].coresets[coreset_id - 1].alloc_dci(pdcch_grant_type_t::ul_data, aggr_idx, &ue)) {
const uint32_t aggr_idx = 2, coreset_id = 0;
if (not bwp_grid[ue.pdcch_tti].coresets[coreset_id].alloc_dci(pdcch_grant_type_t::ul_data, aggr_idx, &ue)) {
// Could not find space in PDCCH
return alloc_result::no_cch_space;
}
@ -150,10 +159,8 @@ alloc_result slot_bwp_sched::alloc_pusch(slot_ue& ue, const rbgmask_t& ul_mask)
}
// Allocation Successful
pdcch_ul_t& pdcch = bwp_grid[ue.pdcch_tti].pdcch_ul_list.back();
fill_dci_ue_cfg(ue, ul_mask, bwp_grid.cell_params(), pdcch.dci);
pusch_grants.emplace_back();
fill_pusch_ue(ue, ul_mask, bwp_grid.cell_params(), pusch_grants.back().sch);
pdsch_grant& pdsch = bwp_grid[ue.pdcch_tti].pdschs.back();
fill_dci_ue_cfg(ue, ul_mask, bwp_grid.cell_params(), pdsch.dci);
pusch_mask |= ul_mask;
return alloc_result::success;

30
srsenb/src/stack/mac/nr/sched_nr_ue.cc
Unescape Escape View File

@ -16,36 +16,6 @@
namespace srsenb {
namespace sched_nr_impl {
ue_cfg_extended::ue_cfg_extended(uint16_t rnti_, const ue_cfg_t& uecfg) : ue_cfg_t(uecfg), rnti(rnti_)
{
cc_params.resize(carriers.size());
for (uint32_t cc = 0; cc < cc_params.size(); ++cc) {
cc_params[cc].bwps.resize(1);
auto& bwp = cc_params[cc].bwps[0];
for (uint32_t ssid = 0; ssid < SRSRAN_UE_DL_NR_MAX_NOF_SEARCH_SPACE; ++ssid) {
if (phy_cfg.pdcch.search_space_present[ssid]) {
bwp.search_spaces.emplace_back();
bwp.search_spaces.back().cfg = &phy_cfg.pdcch.search_space[ssid];
}
}
for (uint32_t csid = 0; csid < SRSRAN_UE_DL_NR_MAX_NOF_CORESET; ++csid) {
if (phy_cfg.pdcch.coreset_present[csid]) {
bwp.coresets.emplace_back();
auto& coreset = bwp.coresets.back();
coreset.cfg = &phy_cfg.pdcch.coreset[csid];
for (auto& ss : bwp.search_spaces) {
if (ss.cfg->coreset_id == csid + 1) {
coreset.ss_list.push_back(&ss);
get_dci_locs(*coreset.cfg, *coreset.ss_list.back()->cfg, rnti, coreset.cce_positions);
}
}
}
}
}
}
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
slot_ue::slot_ue(resource_guard::token ue_token_, uint16_t rnti_, tti_point tti_rx_, uint32_t cc_) :
ue_token(std::move(ue_token_)), rnti(rnti_), tti_rx(tti_rx_), cc(cc_)
{}

6
srsenb/src/stack/mac/nr/sched_nr_worker.cc
Unescape Escape View File

@ -158,11 +158,11 @@ bool sched_worker_manager::run_tti(tti_point tti_rx_, uint32_t cc, slot_res_t& t
// Copy requested TTI DL and UL sched result
tti_req.dl_res.pdsch_tti = tti_rx_ + TX_ENB_DELAY;
tti_req.dl_res.pdcchs = cell_grid_list[cc].bwps[0][tti_req.dl_res.pdsch_tti].pdcch_dl_list;
tti_req.dl_res.pdschs = cell_grid_list[cc].bwps[0][tti_req.dl_res.pdsch_tti].pdsch_grants;
tti_req.dl_res.pdschs = cell_grid_list[cc].bwps[0][tti_req.dl_res.pdsch_tti].pdschs;
cell_grid_list[cc].bwps[0][tti_req.dl_res.pdsch_tti].reset();
tti_req.ul_res.pusch_tti = tti_rx_ + TX_ENB_DELAY;
tti_req.ul_res.pusch = cell_grid_list[cc].bwps[0][tti_req.ul_res.pusch_tti].pusch_grants;
tti_req.ul_res.puschs = cell_grid_list[cc].bwps[0][tti_req.ul_res.pusch_tti].puschs;
tti_req.ul_res.pucchs = cell_grid_list[cc].bwps[0][tti_req.ul_res.pusch_tti].pucchs;
cell_grid_list[cc].bwps[0][tti_req.ul_res.pusch_tti].reset();
// decrement the number of active workers

2
srsenb/test/mac/nr/sched_nr_sim_ue.cc
Unescape Escape View File

@ -45,7 +45,7 @@ void sched_nr_ue_sim::update_dl_harqs(const sched_nr_cc_output_res_t& cc_out)
{
uint32_t cc = cc_out.cc;
for (uint32_t i = 0; i < cc_out.dl_cc_result->pdschs.size(); ++i) {
const auto& data = cc_out.dl_cc_result->pdcchs[i];
const auto& data = cc_out.dl_cc_result->pdschs[i];
if (data.dci.ctx.rnti != ctxt.rnti) {
continue;
}

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