ctest: PDCCH test skips 100PRB for non AVX2 machines

The current 8-bit Viterbi decoder implementation for SSE (non-AVX2)
is not accurate enough to reliably decode all messages with a
code rate ~0.9 or higher, e.g. DCI format 2/2A messages in 100 PRB cell
at aggregation level 0.
master
Robert Falkenberg 2 years ago
parent 981e682d2e
commit 06f2ab6d7c

@ -199,8 +199,9 @@ add_executable(pdcch_test pdcch_test.c)
target_link_libraries(pdcch_test srsran_phy) target_link_libraries(pdcch_test srsran_phy)
foreach (nof_prb 6 15 25 50 75 100) foreach (nof_prb 6 15 25 50 75 100)
# Currently, the ARM platforms srsRAN has been tested are not capable of running 100PRB. So, skip 100 PRB in ARM # Currently, the ARM and SSE platforms srsRAN has been tested are not capable of running 100PRB. So, skip 100 PRB in
if (HAVE_NEON AND (${nof_prb} EQUAL 100)) # ARM and SSE.
if ((HAVE_NEON OR NOT HAVE_AVX2) AND (${nof_prb} EQUAL 100))
continue() continue()
endif () endif ()
foreach (nof_ports 1 2) foreach (nof_ports 1 2)

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