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105 lines
3.5 KiB
C++
105 lines
3.5 KiB
C++
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSRAN_SCHED_NR_PDCCH_H
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#define SRSRAN_SCHED_NR_PDCCH_H
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#include "srsenb/hdr/stack/mac/nr/sched_nr_cfg.h"
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#include "srsran/adt/bounded_bitset.h"
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#include "srsran/adt/bounded_vector.h"
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#include "srsran/phy/common/phy_common_nr.h"
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#include "srsran/phy/phch/dci.h"
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namespace srsenb {
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namespace sched_nr_impl {
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using coreset_bitmap = srsran::bounded_bitset<SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE * SRSRAN_CORESET_DURATION_MAX, true>;
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enum class pdcch_grant_type_t { sib, rar, dl_data, ul_data };
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class slot_ue;
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using bwp_cfg_t = sched_nr_interface::bwp_cfg_t;
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using pdcch_dl_t = mac_interface_phy_nr::pdcch_dl_t;
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using pdcch_ul_t = mac_interface_phy_nr::pdcch_ul_t;
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using pdcch_dl_list_t = srsran::bounded_vector<pdcch_dl_t, MAX_GRANTS>;
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using pdcch_ul_list_t = srsran::bounded_vector<pdcch_ul_t, MAX_GRANTS>;
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class coreset_region
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{
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public:
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coreset_region(const bwp_params& bwp_cfg_,
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uint32_t coreset_id_,
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uint32_t slot_idx,
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pdcch_dl_list_t& pdcch_dl_list,
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pdcch_ul_list_t& pdcch_ul_list);
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void reset();
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/**
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* Allocates DCI space in PDCCH, avoiding in the process collisions with other users
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* @param pdcch_grant_type_t allocation type (e.g. DL data, UL data, SIB)
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* @param aggr_idx Aggregation level index (0..4)
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* @param user UE object or null in case of broadcast/RAR/paging allocation
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* @return if the allocation was successful
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*/
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bool alloc_dci(pdcch_grant_type_t alloc_type, uint32_t aggr_idx, uint32_t search_space_id, slot_ue* user = nullptr);
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void rem_last_dci();
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uint32_t get_td_symbols() const { return coreset_cfg->duration; }
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uint32_t get_freq_resources() const { return nof_freq_res; }
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uint32_t nof_cces() const { return nof_freq_res * get_td_symbols(); }
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size_t nof_allocs() const { return dfs_tree.size(); }
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private:
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const srsran_coreset_t* coreset_cfg;
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uint32_t coreset_id;
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uint32_t slot_idx;
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uint32_t nof_freq_res = 0;
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const bwp_cce_pos_list& rar_cce_list;
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// List of PDCCH grants
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struct alloc_record {
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uint32_t aggr_idx;
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uint32_t ss_id;
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uint32_t idx;
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pdcch_grant_type_t alloc_type;
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slot_ue* ue;
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};
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srsran::bounded_vector<alloc_record, MAX_GRANTS> dci_list;
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pdcch_dl_list_t& pdcch_dl_list;
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pdcch_ul_list_t& pdcch_ul_list;
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// DFS decision tree of PDCCH grants
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struct tree_node {
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uint16_t rnti = SRSRAN_INVALID_RNTI;
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uint32_t record_idx = 0;
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uint32_t dci_pos_idx = 0;
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srsran_dci_location_t dci_pos = {0, 0};
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/// Accumulation of all PDCCH masks for the current solution (DFS path)
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coreset_bitmap total_mask, current_mask;
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};
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using alloc_tree_dfs_t = srsran::bounded_vector<tree_node, MAX_GRANTS>;
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alloc_tree_dfs_t dfs_tree, saved_dfs_tree;
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srsran::span<const uint32_t> get_cce_loc_table(const alloc_record& record) const;
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bool alloc_dfs_node(const alloc_record& record, uint32_t dci_idx);
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bool get_next_dfs();
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};
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} // namespace sched_nr_impl
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} // namespace srsenb
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#endif // SRSRAN_SCHED_NR_PDCCH_H
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