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109 lines
4.0 KiB
C
109 lines
4.0 KiB
C
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSRAN_HARQ_ACK_CFG_H
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#define SRSRAN_HARQ_ACK_CFG_H
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#include "srsran/phy/common/phy_common_nr.h"
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#include <stdbool.h>
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#include <stdint.h>
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/**
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* @brief Maximum number of HARQ ACK feedback bits that can be carried in Uplink Control Information (UCI) message
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*/
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#define SRSRAN_HARQ_ACK_MAX_NOF_BITS 360
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/**
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* @brief Describes a HARQ ACK resource configuration
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*/
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typedef struct {
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uint32_t scell_idx; ///< Serving cell index
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uint32_t v_dai_dl; ///< Downlink Assigment Index
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bool dci_format_1_1; ///< Set to true if the PDSCH transmission is triggered by a PDCCH DCI format 1_1 transmission
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uint32_t k1; ///< HARQ feedback timing
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uint32_t pid; ///< HARQ process identifier
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uint16_t rnti;
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uint32_t pucch_resource_id;
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uint32_t n_cce;
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} srsran_harq_ack_resource_t;
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/**
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* @brief Describes a single PDSCH transmission HARQ ACK feedback
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*/
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typedef struct {
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srsran_harq_ack_resource_t resource;
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uint8_t value[SRSRAN_MAX_CODEWORDS]; // 0/1 or 2 for DTX
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bool present; // set to true if there is a PDSCH on serving cell c associated with PDCCH in PDCCH monitoring occasion
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// m, or there is a PDCCH indicating SPS PDSCH release on serving cell c
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bool dl_bwp_changed; // set to true if PDCCH monitoring occasion m is before an active DL BWP change on serving cell c
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bool ul_bwp_changed; // set to true if an active UL BWP change on the PCell and an active DL BWP change is not
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// triggered by a DCI format 1_1 in PDCCH monitoring occasion m
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bool second_tb_present; // set to true if two TB were detected in the PDCCH monitoring occasion m
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} srsran_harq_ack_m_t;
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#define SRSRAN_UCI_NR_MAX_M 10
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/**
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* @brief Describes a collection of PDSCH HARQ ACK feedback for a number of PDSCH transmissions within a component
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* carrier
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*/
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typedef struct {
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uint32_t M;
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srsran_harq_ack_m_t m[SRSRAN_UCI_NR_MAX_M];
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} srsran_harq_ack_cc_t;
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/**
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* @brief Describes a collection of PDSCH HARQ ACK feedback for a number of component carriers
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*/
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typedef struct {
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srsran_harq_ack_cc_t cc[SRSRAN_MAX_CARRIERS];
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uint32_t nof_cc;
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bool use_pusch; // Set to true, if UCI bits are carried by PUSCH
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} srsran_pdsch_ack_nr_t;
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/**
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* @brief Describes higher layer HARQ ACK feedback for PDSCH configuration
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*/
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typedef struct SRSRAN_API {
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bool harq_ack_spatial_bundling_pucch; ///< Param harq-ACK-SpatialBundlingPUCCH, set to true if provided
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bool harq_ack_spatial_bundling_pusch; ///< Param harq-ACK-SpatialBundlingPUSCH, set to true if provided
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srsran_harq_ack_codebook_t harq_ack_codebook; ///< pdsch-HARQ-ACK-Codebook configuration
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bool max_cw_sched_dci_is_2; ///< Param maxNrofCodeWordsScheduledByDCI, set to true if present and equal to 2
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uint32_t dl_data_to_ul_ack[SRSRAN_MAX_NOF_DL_DATA_TO_UL];
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uint32_t nof_dl_data_to_ul_ack;
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} srsran_harq_ack_cfg_hl_t;
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/**
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* @brief Describes HARQ ACK bit configuration for UCI encoding/decoding
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* @note if tb0 and tb1 are false, the HARQ ACK bit is not used
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* @note if tb0 and tb1 are true, the HARQ ACK feedback are bundled, the actual HARQ ACK feedback bit is the result of
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* the AND operation
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*/
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typedef struct SRSRAN_API {
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bool tb0; ///< Set to true if this ACK bit is mapped into TB index 0
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bool tb1; ///< Set to true if this ACK bit is mapped into TB index 1
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uint32_t cc_idx; ///< Component carrier index
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uint32_t m_idx; ///< M resource index for packing/unpacking
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uint32_t pid; ///< HARQ process identifier
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} srsran_harq_ack_bit_t;
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/**
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* @brief Describes HARQ ACK feedback configuration for UCI encoding/decoding
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*/
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typedef struct SRSRAN_API {
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srsran_harq_ack_bit_t bits[SRSRAN_HARQ_ACK_MAX_NOF_BITS]; ///< HARQ-ACK feedback bits
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uint32_t count; ///< Number of ACK bits
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} srsran_harq_ack_cfg_t;
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#endif // SRSRAN_HARQ_ACK_CFG_H
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