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198 lines
7.5 KiB
C++
198 lines
7.5 KiB
C++
/**
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* Copyright 2013-2022 Software Radio Systems Limited
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*
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* This file is part of srsRAN.
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*
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* srsRAN is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsRAN is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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#ifndef SRSRAN_SCHED_NR_INTERFACE_H
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#define SRSRAN_SCHED_NR_INTERFACE_H
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#include "srsenb/hdr/stack/mac/common/sched_config.h"
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#include "srsran/adt/bounded_vector.h"
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#include "srsran/adt/optional.h"
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#include "srsran/adt/span.h"
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#include "srsran/asn1/rrc_nr.h"
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#include "srsran/common/common_nr.h"
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#include "srsran/common/phy_cfg_nr.h"
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#include "srsran/common/slot_point.h"
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#include "srsran/interfaces/gnb_interfaces.h"
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#include "srsran/phy/phch/dci_nr.h"
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namespace srsenb {
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const static size_t SCHED_NR_MAX_CARRIERS = 4;
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const static uint16_t SCHED_NR_INVALID_RNTI = 0;
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const static size_t SCHED_NR_MAX_NOF_RBGS = 18;
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const static size_t SCHED_NR_MAX_TB = 1;
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const static size_t SCHED_NR_MAX_HARQ = SRSRAN_DEFAULT_HARQ_PROC_DL_NR;
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const static size_t SCHED_NR_MAX_BWP_PER_CELL = 2;
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const static size_t SCHED_NR_MAX_LCID = srsran::MAX_NR_NOF_BEARERS;
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const static size_t SCHED_NR_MAX_LC_GROUP = 7;
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struct sched_nr_ue_cc_cfg_t {
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bool active = false;
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uint32_t cc = 0;
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};
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struct sched_nr_ue_lc_ch_cfg_t {
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uint32_t lcid; // 1..32
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mac_lc_ch_cfg_t cfg;
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};
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struct sched_nr_ue_cfg_t {
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uint32_t maxharq_tx = 4;
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srsran::bounded_vector<sched_nr_ue_cc_cfg_t, SCHED_NR_MAX_CARRIERS> carriers;
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srsran::phy_cfg_nr_t phy_cfg = {};
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asn1::copy_ptr<asn1::rrc_nr::mac_cell_group_cfg_s> mac_cell_group_cfg;
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asn1::copy_ptr<asn1::rrc_nr::phys_cell_group_cfg_s> phy_cell_group_cfg;
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asn1::copy_ptr<asn1::rrc_nr::sp_cell_cfg_s> sp_cell_cfg;
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std::vector<sched_nr_ue_lc_ch_cfg_t> lc_ch_to_add;
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std::vector<uint32_t> lc_ch_to_rem;
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};
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struct sched_nr_bwp_cfg_t {
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uint32_t start_rb = 0;
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uint32_t rb_width = 100;
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srsran_pdcch_cfg_nr_t pdcch = {};
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srsran_sch_hl_cfg_nr_t pdsch = {};
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srsran_sch_hl_cfg_nr_t pusch = {};
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srsran_pucch_nr_hl_cfg_t pucch = {};
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srsran_harq_ack_cfg_hl_t harq_ack = {};
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uint32_t rar_window_size = 10; // See TS 38.331, ra-ResponseWindow: {1, 2, 4, 8, 10, 20, 40, 80}
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uint32_t numerology_idx = 0;
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};
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struct sched_nr_cell_cfg_sib_t {
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uint32_t len;
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uint32_t period_rf;
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uint32_t si_window_slots;
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};
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struct sched_nr_cell_cfg_t {
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static const size_t MAX_SIBS = 2;
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using ssb_positions_in_burst_t = asn1::rrc_nr::serving_cell_cfg_common_sib_s::ssb_positions_in_burst_s_;
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uint32_t nof_layers;
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uint32_t pci;
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uint32_t dl_cell_nof_prb;
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uint32_t ul_cell_nof_prb;
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asn1::rrc_nr::dl_cfg_common_sib_s dl_cfg_common;
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asn1::rrc_nr::ul_cfg_common_sib_s ul_cfg_common;
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srsran::optional<asn1::rrc_nr::tdd_ul_dl_cfg_common_s> tdd_ul_dl_cfg_common;
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ssb_positions_in_burst_t ssb_positions_in_burst;
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uint32_t ssb_periodicity_ms = 0;
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asn1::rrc_nr::mib_s::dmrs_type_a_position_e_ dmrs_type_a_position;
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asn1::rrc_nr::subcarrier_spacing_e ssb_scs;
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asn1::rrc_nr::pdcch_cfg_sib1_s pdcch_cfg_sib1;
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int ss_pbch_block_power = 0;
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// Extras
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std::vector<sched_nr_bwp_cfg_t> bwps{1}; // idx0 for BWP-common
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std::vector<sched_nr_cell_cfg_sib_t> sibs;
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double dl_center_frequency_hz;
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double ul_center_frequency_hz;
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double ssb_center_freq_hz;
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};
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class sched_nr_interface
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{
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public:
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static const size_t MAX_GRANTS = mac_interface_phy_nr::MAX_GRANTS;
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static const size_t MAX_SUBPDUS = 8;
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///// Configuration /////
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struct sched_args_t {
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bool pdsch_enabled = true;
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bool pusch_enabled = true;
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bool auto_refill_buffer = false;
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int fixed_dl_mcs = 28;
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int fixed_ul_mcs = 28;
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std::string logger_name = "MAC-NR";
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};
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using ue_cc_cfg_t = sched_nr_ue_cc_cfg_t;
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using ue_cfg_t = sched_nr_ue_cfg_t;
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////// RA signalling //////
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struct rar_info_t {
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uint32_t msg3_size = 7;
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uint32_t cc;
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uint16_t temp_crnti;
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slot_point prach_slot;
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uint32_t ofdm_symbol_idx;
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uint32_t freq_idx;
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uint32_t preamble_idx;
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uint32_t ta_cmd;
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};
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struct msg3_grant_t {
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rar_info_t data;
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srsran_dci_ul_nr_t msg3_dci = {};
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};
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struct rar_t {
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srsran::bounded_vector<msg3_grant_t, MAX_GRANTS> grants;
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};
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////// DL data signalling //////
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struct dl_pdu_t {
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srsran::bounded_vector<uint32_t, MAX_SUBPDUS> subpdus;
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};
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///// Sched Result /////
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using dl_sched_t = mac_interface_phy_nr::dl_sched_t;
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using ul_res_t = mac_interface_phy_nr::ul_sched_t;
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using sched_sib_list_t = srsran::bounded_vector<uint32_t, MAX_GRANTS>; /// list of SI indexes
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using sched_rar_list_t = srsran::bounded_vector<rar_t, MAX_GRANTS>;
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using sched_dl_pdu_list_t = srsran::bounded_vector<dl_pdu_t, MAX_GRANTS>;
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struct dl_res_t {
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dl_sched_t phy;
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sched_dl_pdu_list_t data;
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sched_rar_list_t rar;
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sched_sib_list_t sib_idxs;
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};
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virtual ~sched_nr_interface() = default;
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virtual int config(const sched_args_t& sched_cfg, srsran::const_span<sched_nr_cell_cfg_t> ue_cfg) = 0;
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virtual void ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) = 0;
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virtual void ue_rem(uint16_t rnti) = 0;
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virtual void slot_indication(slot_point slot_tx) = 0;
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virtual dl_res_t* get_dl_sched(slot_point slot_rx, uint32_t cc) = 0;
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virtual ul_res_t* get_ul_sched(slot_point slot_rx, uint32_t cc) = 0;
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virtual void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) = 0;
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virtual void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) = 0;
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virtual void ul_sr_info(uint16_t rnti) = 0;
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virtual void ul_bsr(uint16_t rnti, uint32_t lcg_id, uint32_t bsr) = 0;
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/**
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* Enqueue MAC CEs for DL transmission
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*
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* @param rnti user rnti
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* @param ce_lcid lcid of the MAC CE
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* @return error code
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*/
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virtual void dl_mac_ce(uint16_t rnti, uint32_t ce_lcid) = 0;
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};
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} // namespace srsenb
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#endif // SRSRAN_SCHED_NR_INTERFACE_H
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