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102 lines
3.8 KiB
C++
102 lines
3.8 KiB
C++
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSRAN_SCHED_COMMON_TEST_SUITE_H
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#define SRSRAN_SCHED_COMMON_TEST_SUITE_H
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#include "srsenb/hdr/stack/mac/sched_common.h"
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#include "srsran/adt/bounded_bitset.h"
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#include "srsran/adt/span.h"
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#include "srsran/common/tti_point.h"
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#include "srsran/interfaces/sched_interface.h"
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namespace srsenb {
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struct sf_output_res_t {
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srsran::span<const sched_cell_params_t> cc_params;
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srsran::tti_point tti_rx;
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srsran::span<const sched_interface::ul_sched_res_t> ul_cc_result;
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srsran::span<const sched_interface::dl_sched_res_t> dl_cc_result;
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};
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/**
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* verifies correctness of the output of PUSCH allocations for a subframe. Current checks:
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* - individual ul allocs are within (0, n_prb) bounds
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* - individual ul allocs occupy at least one prb
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* - no collisions between individual ul allocs
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* - space is left for PRACH and PUCCH
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* - if expected_ul_mask arg is not null, assert it matches the cumulative mask of all PUSCH allocations
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* @param sf_out result of subframe allocation and associated metadata
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* @param expected_ul_mask optional arg for expected cumulative UL PRB mask
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* @return error code
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*/
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int test_pusch_collisions(const sf_output_res_t& sf_out, uint32_t enb_cc_idx, const prbmask_t* expected_ul_mask);
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/**
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* verifies correctness of the output of PDSCH allocations for a subframe. Current checks:
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* - individual DL allocs are within (0, n_prb) bounds
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* - individual DL allocs occupy at least one RBG
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* - no collisions between individual DL allocs
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* - DL data alloc ACKs do not collide with PRACH in UL
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* - if expected_rbgmask arg is not null, assert it matches the cumulative mask of all PDSCH allocations
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* @param sf_out result of subframe allocation and associated metadata
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* @param expected_rbgmask optional arg for expected cumulative DL RBG mask
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* @return error code
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*/
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int test_pdsch_collisions(const sf_output_res_t& sf_out, uint32_t enb_cc_idx, const rbgmask_t* expected_rbgmask);
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/**
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* verifies correctness of SIB allocations. Current checks:
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* - SIB1 is allocated in correct TTIs
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* - TB size is adequate for SIB allocation
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* - The SIBs with index>1 are allocated in expected TTI windows
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* @param sf_out result of subframe allocation and associated metadata
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* @return error code
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*/
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int test_sib_scheduling(const sf_output_res_t& sf_out, uint32_t enb_cc_idx);
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/**
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* verifies correctness of PDCCH allocations for DL, RAR, UL, Broadcast. Current checks:
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* - DCI CCE positions fit in available PDCCH resources
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* - no collisions between individual DCI CCE positions
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* @param sf_out
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* @param used_cce
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* @return error code
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*/
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int test_pdcch_collisions(const sf_output_res_t& sf_out,
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uint32_t enb_cc_idx,
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const srsran::bounded_bitset<128, true>* expected_cce_mask);
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/**
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* verifies correctness of DCI content for params that are independent of the UE configuration.
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* - TB size is large enough
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* - No repeated rntis in PDSCH and PUSCH
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* @param sf_out
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* @return error code
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*/
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int test_dci_content_common(const sf_output_res_t& sf_out, uint32_t enb_cc_idx);
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/**
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* Call all available eNB common tests
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* @return error code
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*/
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int test_all_common(const sf_output_res_t& sf_out);
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/// Helper function to get DL PRBs from DCI
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int extract_dl_prbmask(const srsran_cell_t& cell,
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const srsran_dci_dl_t& dci,
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srsran::bounded_bitset<100, true>& alloc_mask);
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} // namespace srsenb
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#endif // SRSRAN_SCHED_COMMON_TEST_SUITE_H
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