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172 lines
6.2 KiB
C++
172 lines
6.2 KiB
C++
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSRAN_SCHED_NR_CFG_H
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#define SRSRAN_SCHED_NR_CFG_H
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#include "sched_nr_interface.h"
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#include "sched_nr_rb.h"
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#include "srsenb/hdr/common/common_enb.h"
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#include "srsran/adt/optional_array.h"
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namespace srsenb {
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const static size_t SCHED_NR_MAX_USERS = SRSENB_MAX_UES;
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const static size_t SCHED_NR_NOF_SUBFRAMES = 10;
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const static size_t SCHED_NR_NOF_HARQS = 16;
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static const size_t MAX_NOF_AGGR_LEVELS = 5;
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namespace sched_nr_impl {
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constexpr static size_t MAX_GRANTS = sched_nr_interface::MAX_GRANTS;
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using pdcch_dl_t = mac_interface_phy_nr::pdcch_dl_t;
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using pdcch_ul_t = mac_interface_phy_nr::pdcch_ul_t;
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using pdsch_t = mac_interface_phy_nr::pdsch_t;
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using pusch_t = mac_interface_phy_nr::pusch_t;
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using pucch_t = mac_interface_phy_nr::pucch_t;
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using pdcch_dl_list_t = srsran::bounded_vector<pdcch_dl_t, MAX_GRANTS>;
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using pdcch_ul_list_t = srsran::bounded_vector<pdcch_ul_t, MAX_GRANTS>;
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using pucch_list_t = srsran::bounded_vector<pucch_t, MAX_GRANTS>;
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using pusch_list_t = srsran::bounded_vector<pusch_t, MAX_GRANTS>;
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using nzp_csi_rs_list = srsran::bounded_vector<srsran_csi_rs_nzp_resource_t, mac_interface_phy_nr::MAX_NZP_CSI_RS>;
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using ssb_t = mac_interface_phy_nr::ssb_t;
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using ssb_list = srsran::bounded_vector<ssb_t, mac_interface_phy_nr::MAX_SSB>;
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using sched_args_t = sched_nr_interface::sched_args_t;
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using cell_cfg_t = sched_nr_interface::cell_cfg_t;
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using bwp_cfg_t = sched_nr_interface::bwp_cfg_t;
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using ue_cfg_t = sched_nr_interface::ue_cfg_t;
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using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t;
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using pdcch_cce_pos_list = srsran::bounded_vector<uint32_t, SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR>;
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using bwp_cce_pos_list = std::array<std::array<pdcch_cce_pos_list, MAX_NOF_AGGR_LEVELS>, SRSRAN_NOF_SF_X_FRAME>;
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using dl_sched_t = sched_nr_interface::dl_sched_t;
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using ul_sched_t = sched_nr_interface::ul_res_t;
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using dl_sched_res_t = sched_nr_interface::dl_res_t;
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/// Generate list of CCE locations for UE based on coreset and search space configurations
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void get_dci_locs(const srsran_coreset_t& coreset,
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const srsran_search_space_t& search_space,
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uint16_t rnti,
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bwp_cce_pos_list& cce_locs);
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/// Structure that extends the sched_nr_interface::bwp_cfg_t passed by upper layers with other
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/// derived BWP-specific params
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struct bwp_params_t {
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const uint32_t bwp_id;
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const uint32_t cc;
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const bwp_cfg_t& cfg;
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const cell_cfg_t& cell_cfg;
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const sched_args_t& sched_cfg;
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// derived params
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srslog::basic_logger& logger;
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uint32_t P;
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uint32_t N_rbg;
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uint32_t nof_prb() const { return cell_cfg.carrier.nof_prb; }
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/// Table specifying if a slot has DL or UL enabled
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struct slot_cfg {
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bool is_dl;
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bool is_ul;
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};
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srsran::bounded_vector<slot_cfg, SRSRAN_NOF_SF_X_FRAME> slots;
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struct pusch_ra_time_cfg {
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uint32_t msg3_delay; ///< Includes K2 and delta. See TS 36.214 6.1.2.1.1-2/4/5
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uint32_t K;
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uint32_t S;
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uint32_t L;
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};
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std::vector<pusch_ra_time_cfg> pusch_ra_list;
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bwp_cce_pos_list rar_cce_list;
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srsran::optional_vector<bwp_cce_pos_list> common_cce_list;
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bwp_params_t(const cell_cfg_t& cell, const sched_args_t& sched_cfg_, uint32_t cc, uint32_t bwp_id);
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};
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/// Structure packing a single cell config params, and sched args
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struct cell_params_t {
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const uint32_t cc;
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const cell_cfg_t cfg;
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const sched_args_t& sched_args;
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std::vector<bwp_params_t> bwps;
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cell_params_t(uint32_t cc_, const cell_cfg_t& cell, const sched_args_t& sched_cfg_);
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uint32_t nof_prb() const { return cfg.carrier.nof_prb; }
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};
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/// Structure packing both the sched args and all gNB NR cell configurations
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struct sched_params_t {
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sched_args_t sched_cfg;
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std::vector<cell_params_t> cells;
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sched_params_t() = default;
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explicit sched_params_t(const sched_args_t& sched_cfg_);
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};
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/// Semi-static configuration of a UE for a given CC.
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class ue_carrier_params_t
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{
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public:
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ue_carrier_params_t() = default;
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explicit ue_carrier_params_t(uint16_t rnti, const bwp_params_t& active_bwp_cfg, const ue_cfg_t& uecfg_);
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uint16_t rnti = SRSRAN_INVALID_RNTI;
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uint32_t cc = SRSRAN_MAX_CARRIERS;
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const ue_cfg_t& ue_cfg() const { return *cfg_; }
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const srsran::phy_cfg_nr_t& phy() const { return cfg_->phy_cfg; }
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const bwp_params_t& active_bwp() const { return *bwp_cfg; }
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srsran::const_span<uint32_t> cce_pos_list(uint32_t search_id, uint32_t slot_idx, uint32_t aggr_idx) const
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{
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if (cce_positions_list.size() > ss_id_to_cce_idx[search_id]) {
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auto& lst = cce_pos_list(search_id);
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return lst[slot_idx][aggr_idx];
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}
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return srsran::const_span<uint32_t>{};
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}
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const bwp_cce_pos_list& cce_pos_list(uint32_t search_id) const
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{
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return cce_positions_list[ss_id_to_cce_idx[search_id]];
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}
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uint32_t get_k1(slot_point pdsch_slot) const
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{
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if (phy().duplex.mode == SRSRAN_DUPLEX_MODE_TDD) {
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return phy().harq_ack.dl_data_to_ul_ack[pdsch_slot.to_uint() % phy().duplex.tdd.pattern1.period_ms];
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}
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return phy().harq_ack.dl_data_to_ul_ack[pdsch_slot.to_uint() % phy().harq_ack.nof_dl_data_to_ul_ack];
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}
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int fixed_pdsch_mcs() const { return bwp_cfg->sched_cfg.fixed_dl_mcs; }
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int fixed_pusch_mcs() const { return bwp_cfg->sched_cfg.fixed_ul_mcs; }
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private:
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const ue_cfg_t* cfg_ = nullptr;
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const bwp_params_t* bwp_cfg = nullptr;
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std::vector<bwp_cce_pos_list> cce_positions_list;
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std::array<uint32_t, SRSRAN_UE_DL_NR_MAX_NOF_SEARCH_SPACE> ss_id_to_cce_idx;
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};
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} // namespace sched_nr_impl
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} // namespace srsenb
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#endif // SRSRAN_SCHED_NR_CFG_H
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