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249 lines
7.8 KiB
C
249 lines
7.8 KiB
C
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2015 Software Radio Systems Limited
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*
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* \section LICENSE
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*
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* This file is part of the srsLTE library.
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*
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* srsLTE is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsLTE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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/******************************************************************************
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* File: dci.h
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*
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* Description: Downlink control information (DCI).
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* Packing/Unpacking functions to convert between bit streams
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* and packed DCI UL/DL grants defined in ra.h
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*
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* Reference: 3GPP TS 36.212 version 10.0.0 Release 10 Sec. 5.3.3
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*****************************************************************************/
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#ifndef SRSLTE_DCI_H
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#define SRSLTE_DCI_H
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#include <stdint.h>
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#include "srslte/config.h"
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#include "srslte/phy/common/phy_common.h"
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#include "srslte/phy/phch/ra.h"
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#define SRSLTE_DCI_MAX_BITS 128
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#define SRSLTE_RAR_GRANT_LEN 20
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#define SRSLTE_DCI_IS_TB_EN(tb) (!(tb.mcs_idx == 0 && tb.rv == 1))
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#define SRSLTE_DCI_TB_DISABLE(tb) \
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do { \
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tb.mcs_idx = 0; \
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tb.rv = 1; \
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} while (0)
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#define SRSLTE_DCI_HEXDEBUG 0
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typedef struct {
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bool multiple_csi_request_enabled;
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bool cif_enabled;
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bool srs_request_enabled;
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bool ra_format_enabled;
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} srslte_dci_cfg_t;
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typedef struct SRSLTE_API {
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uint32_t L; // Aggregation level
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uint32_t ncce; // Position of first CCE of the dci
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} srslte_dci_location_t;
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typedef struct SRSLTE_API {
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uint8_t payload[SRSLTE_DCI_MAX_BITS];
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uint32_t nof_bits;
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srslte_dci_location_t location;
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srslte_dci_format_t format;
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uint16_t rnti;
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} srslte_dci_msg_t;
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typedef struct SRSLTE_API {
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uint32_t mcs_idx;
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int rv;
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bool ndi;
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uint32_t cw_idx;
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} srslte_dci_tb_t;
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typedef struct SRSLTE_API {
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uint16_t rnti;
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srslte_dci_format_t format;
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srslte_dci_location_t location;
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// Resource Allocation
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srslte_ra_type_t alloc_type;
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union {
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srslte_ra_type0_t type0_alloc;
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srslte_ra_type1_t type1_alloc;
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srslte_ra_type2_t type2_alloc;
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};
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// Codeword information
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srslte_dci_tb_t tb[SRSLTE_MAX_CODEWORDS];
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bool tb_cw_swap;
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uint32_t pinfo;
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// Power control
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bool pconf;
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bool power_offset;
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uint8_t tpc_pucch;
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// RA order
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bool is_ra_order;
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uint32_t ra_preamble;
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uint32_t ra_mask_idx;
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// Release 10
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uint32_t cif;
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bool cif_present;
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bool srs_request;
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bool srs_request_present;
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// Other parameters
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uint32_t pid;
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uint32_t dai;
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bool is_tdd;
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bool is_dwpts;
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bool sram_id;
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// For debugging purposes
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#if SRSLTE_DCI_HEXDEBUG
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uint32_t nof_bits;
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char hex_str[SRSLTE_DCI_MAX_BITS];
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#endif
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} srslte_dci_dl_t;
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/** Unpacked DCI Format0 message */
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typedef struct SRSLTE_API {
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uint16_t rnti;
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srslte_dci_format_t format;
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srslte_dci_location_t location;
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srslte_ra_type2_t type2_alloc;
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/* 36.213 Table 8.4-2: SRSLTE_RA_PUSCH_HOP_HALF is 0 for < 10 Mhz and 10 for > 10 Mhz.
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* SRSLTE_RA_PUSCH_HOP_QUART is 00 for > 10 Mhz and SRSLTE_RA_PUSCH_HOP_QUART_NEG is 01 for > 10 Mhz.
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*/
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enum {
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SRSLTE_RA_PUSCH_HOP_DISABLED = -1,
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SRSLTE_RA_PUSCH_HOP_QUART = 0,
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SRSLTE_RA_PUSCH_HOP_QUART_NEG = 1,
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SRSLTE_RA_PUSCH_HOP_HALF = 2,
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SRSLTE_RA_PUSCH_HOP_TYPE2 = 3
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} freq_hop_fl;
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// Codeword information
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srslte_dci_tb_t tb;
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uint32_t n_dmrs;
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bool cqi_request;
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// TDD parametres
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uint32_t dai;
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uint32_t ul_idx;
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bool is_tdd;
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// Power control
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uint8_t tpc_pusch;
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// Release 10
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uint32_t cif;
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bool cif_present;
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bool multiple_csi_request_present;
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uint32_t srs_request;
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bool srs_request_present;
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srslte_ra_type_t ra_type;
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bool ra_type_present;
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// For debugging purposes
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#ifdef SRSLTE_DCI_HEXDEBUG
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uint32_t nof_bits;
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char hex_str[SRSLTE_DCI_MAX_BITS];
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#endif
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} srslte_dci_ul_t;
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typedef struct SRSLTE_API {
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uint32_t rba;
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uint32_t trunc_mcs;
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uint32_t tpc_pusch;
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bool ul_delay;
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bool cqi_request;
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bool hopping_flag;
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} srslte_dci_rar_grant_t;
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SRSLTE_API void srslte_dci_rar_unpack(uint8_t payload[SRSLTE_RAR_GRANT_LEN], srslte_dci_rar_grant_t* rar);
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SRSLTE_API void srslte_dci_rar_pack(srslte_dci_rar_grant_t* rar, uint8_t payload[SRSLTE_RAR_GRANT_LEN]);
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SRSLTE_API int srslte_dci_rar_to_ul_dci(srslte_cell_t* cell, srslte_dci_rar_grant_t* rar, srslte_dci_ul_t* dci_ul);
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SRSLTE_API int srslte_dci_msg_pack_pusch(srslte_cell_t* cell,
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srslte_dl_sf_cfg_t* sf,
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srslte_dci_cfg_t* cfg,
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srslte_dci_ul_t* dci,
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srslte_dci_msg_t* msg);
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SRSLTE_API int srslte_dci_msg_unpack_pusch(srslte_cell_t* cell,
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srslte_dl_sf_cfg_t* sf,
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srslte_dci_cfg_t* cfg,
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srslte_dci_msg_t* msg,
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srslte_dci_ul_t* dci);
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SRSLTE_API int srslte_dci_msg_pack_pdsch(srslte_cell_t* cell,
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srslte_dl_sf_cfg_t* sf,
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srslte_dci_cfg_t* cfg, srslte_dci_dl_t* dci, srslte_dci_msg_t* msg);
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SRSLTE_API int srslte_dci_msg_unpack_pdsch(srslte_cell_t* cell,
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srslte_dl_sf_cfg_t* sf,
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srslte_dci_cfg_t* cfg,
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srslte_dci_msg_t* msg,
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srslte_dci_dl_t* dci);
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SRSLTE_API uint32_t srslte_dci_format_sizeof(srslte_cell_t* cell,
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srslte_dl_sf_cfg_t* sf,
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srslte_dci_cfg_t* cfg,
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srslte_dci_format_t format);
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SRSLTE_API void srslte_dci_dl_fprint(FILE* f,
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srslte_dci_dl_t* dci,
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uint32_t nof_prb);
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SRSLTE_API uint32_t srslte_dci_dl_info(srslte_dci_dl_t* dci_dl,
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char* str,
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uint32_t str_len);
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SRSLTE_API uint32_t srslte_dci_ul_info(srslte_dci_ul_t* dci_ul,
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char* info_str,
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uint32_t len);
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SRSLTE_API srslte_dci_format_t srslte_dci_format_from_string(char* str);
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SRSLTE_API char* srslte_dci_format_string(srslte_dci_format_t format);
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SRSLTE_API char* srslte_dci_format_string_short(srslte_dci_format_t format);
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SRSLTE_API int srslte_dci_location_set(srslte_dci_location_t* c,
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uint32_t L,
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uint32_t nCCE);
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SRSLTE_API bool srslte_dci_location_isvalid(srslte_dci_location_t* c);
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#endif // DCI_
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