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Xavier Arteaga 1a6e5cdee5 Demodulator sets LLR to zero for 0.0 symbols 4 years ago
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examples rename srsLTE to srsRAN 4 years ago
include Added partial NR time resource mapping tables 4 years ago
src Demodulator sets LLR to zero for 0.0 symbols 4 years ago
test NR PDSCH zeroes RE around the DC. Added delay and CFO emulation to phy_dl_nr_test 4 years ago
CMakeLists.txt rename srsLTE to srsRAN 4 years ago