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110 lines
3.6 KiB
C++
110 lines
3.6 KiB
C++
/**
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*
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* \section COPYRIGHT
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*
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* Copyright 2013-2021 Software Radio Systems Limited
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*
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* By using this file, you agree to the terms and conditions set
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* forth in the LICENSE file which can be found at the top level of
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* the distribution.
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*
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*/
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#ifndef SRSRAN_SCHED_NR_INTERFACE_H
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#define SRSRAN_SCHED_NR_INTERFACE_H
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#include "srsran/adt/bounded_bitset.h"
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#include "srsran/adt/bounded_vector.h"
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#include "srsran/adt/optional.h"
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#include "srsran/adt/span.h"
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#include "srsran/common/phy_cfg_nr.h"
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#include "srsran/common/slot_point.h"
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#include "srsran/interfaces/gnb_interfaces.h"
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#include "srsran/phy/phch/dci_nr.h"
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namespace srsenb {
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const static size_t SCHED_NR_MAX_CARRIERS = 4;
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const static uint16_t SCHED_NR_INVALID_RNTI = 0;
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const static size_t SCHED_NR_MAX_NOF_RBGS = 18;
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const static size_t SCHED_NR_MAX_TB = 1;
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const static size_t SCHED_NR_MAX_HARQ = 16;
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const static size_t SCHED_NR_MAX_BWP_PER_CELL = 2;
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class sched_nr_interface
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{
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public:
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static const size_t MAX_GRANTS = mac_interface_phy_nr::MAX_GRANTS;
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///// Configuration /////
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struct pdsch_td_res_alloc {
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uint8_t k0 = 0; // 0..32
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uint8_t k1 = 4; // 0..32
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};
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using pdsch_td_res_alloc_list = srsran::bounded_vector<pdsch_td_res_alloc, MAX_GRANTS>;
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struct pusch_td_res_alloc {
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uint8_t k2 = 4; // 0..32
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};
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using pusch_td_res_alloc_list = srsran::bounded_vector<pusch_td_res_alloc, MAX_GRANTS>;
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struct bwp_cfg_t {
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uint32_t start_rb = 0;
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uint32_t rb_width = 100;
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srsran_pdcch_cfg_nr_t pdcch = {};
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srsran_sch_hl_cfg_nr_t pdsch = {};
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srsran_sch_hl_cfg_nr_t pusch = {};
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uint32_t rar_window_size = 3;
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};
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struct cell_cfg_t {
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srsran_carrier_nr_t carrier = {};
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srsran_tdd_config_nr_t tdd = {};
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srsran::bounded_vector<bwp_cfg_t, SCHED_NR_MAX_BWP_PER_CELL> bwps{1}; // idx0 for BWP-common
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};
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struct sched_cfg_t {};
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struct ue_cc_cfg_t {
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bool active = false;
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uint32_t cc = 0;
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};
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struct ue_cfg_t {
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uint32_t maxharq_tx = 4;
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int fixed_dl_mcs = -1;
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int fixed_ul_mcs = -1;
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srsran::bounded_vector<ue_cc_cfg_t, SCHED_NR_MAX_CARRIERS> carriers;
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srsran::phy_cfg_nr_t phy_cfg = {};
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};
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////// RACH //////
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struct dl_sched_rar_info_t {
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uint32_t preamble_idx;
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uint32_t ta_cmd;
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uint16_t temp_crnti;
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uint32_t msg3_size;
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uint32_t prach_slot;
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};
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///// Sched Result /////
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using dl_sched_t = mac_interface_phy_nr::dl_sched_t;
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using ul_sched_t = mac_interface_phy_nr::ul_sched_t;
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virtual ~sched_nr_interface() = default;
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virtual int cell_cfg(srsran::const_span<sched_nr_interface::cell_cfg_t> ue_cfg) = 0;
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virtual void ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) = 0;
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virtual int get_dl_sched(slot_point slot_rx, uint32_t cc, dl_sched_t& result) = 0;
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virtual int get_ul_sched(slot_point slot_rx, uint32_t cc, ul_sched_t& result) = 0;
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virtual void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) = 0;
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virtual void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) = 0;
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virtual void ul_sr_info(slot_point, uint16_t rnti) = 0;
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};
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} // namespace srsenb
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#endif // SRSRAN_SCHED_NR_INTERFACE_H
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