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srsRAN_4G
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382 Commits (df06443470970606535423a783ca1600946b8566)

Author SHA1 Message Date
Andre Puschmann d6e0153b40 sci: add SCI format 1 transmission format flag 5 years ago
Andre Puschmann 80b303dbde sl: set correct SL-SCH max TB size 5 years ago
luis_pereira87 baf0ad5bf4 PSSCH implementation 5 years ago
Andre Puschmann a82b2da2dd dft_precoding: add helper to get largest valid PRB 5 years ago
Xavier Arteaga 7291a5db91 Implement on the fly sequence generation 5 years ago
Xavier Arteaga 89dcd6339f More LGTM fixes 5 years ago
Xavier Arteaga 60c4daccab Removed redundant code 5 years ago
Xavier Arteaga 77d5dedddc Fix LGTM warnings and recommendations 5 years ago
Xavier Arteaga 562590e595 Fix LGTM warnings 5 years ago
Xavier Arteaga e6792cf9b7 Refactored OFDM and added half CP window offset in UL Demodulator 5 years ago
Andre Puschmann e76e31e652 adding NB-IoT DL shared channel, UE DL object and PHY examples 5 years ago
Andre Puschmann dcb9004a71 zmq: refactor zmq argument parsing, allow zero indexing 
It allows to provide an index for tx_port, rx_port, tx_freq and rx_freq even
for the first (and possibly only) port. So for example a MIMO config would be this for example:

tx_port0=tcp://*:2001,tx_port1=tcp://*:2003,rx_port0=tcp://localhost:2000,rx_port1=tcp://localhost:2002
 5 years ago
luis_pereira87 653a1e0619 Added PSBCH Extended CP 5 years ago
Andre Puschmann e495c4d553 vector: add uint8 zero'ing function 5 years ago
Andre Puschmann 8f72d4c55e simd: fix compilation error under NEON 5 years ago
Xavier Arteaga 2bca321d4d Fix NEON 16 bit turbodecoder 5 years ago
Xavier Arteaga dc6128617b Fix SSE 16 bit turbodecoder 5 years ago
Xavier Arteaga a0fb150e58 Fix memory issues in PSCCH decoder 5 years ago
Xavier Arteaga 5b7493cab5 Added 256QAM modulation tables to scheduler 5 years ago
Xavier Arteaga 5e45e63519 Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 5 years ago
Xavier Arteaga 784bf81a1a Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 5 years ago
Xavier Arteaga cb6a8444df Added srsLTE helper for determining number of RI bits 5 years ago
Tiago Alves 47145c18b7 sidelink: refactor channel estimation 5 years ago
Xavier Arteaga 6d355ab61e SRSUE: Fix HO initial CFO 5 years ago
Xavier Arteaga cca3cccfbe Improved fading model generation 5 years ago
Xavier Arteaga a44a61d781 Fix HST channel emulator for keeping coherent phase between frames 5 years ago
Xavier Arteaga cd2f86687f Correction in AWGN generator 5 years ago
Xavier Arteaga 8e891b7038 Added AWGN channel to SRSUE and SRSENB 5 years ago
Xavier Arteaga c107b04f5a Implemented high performance AWGN generator 5 years ago
Xavier Arteaga b5be0b94b8 Added SIMD i32 add and and functions 5 years ago
Xavier Arteaga 8bf7acdeaf Added vector malloc for i32 and u32 5 years ago
Xavier Arteaga 2c93f6d20a Fix PUCCH DMRS correlation 5 years ago
Xavier Arteaga f3f03ad12d SRSUE PHY: Add extra debugging information to errors 5 years ago
Xavier Arteaga ada8772f57 Initial srenb TA compensation 5 years ago
Xavier Arteaga 0408d357a7 Minor fixes 5 years ago
Ismael Gomez 73447972d8
Fix issue with simultaneous CQI and ACK/NACK transmission in CA (#1067) 
* Fix memory corruption when phy calling mac scheduler and not yet initiated

* Do not drop CQI if collision with ACK/NACK and PUSCH

* Allocate CQI resources for SCell properly

* Use UE_PCELL_CC_IDX macro

* Protect ul_sched from being called if not yet started
 5 years ago
Xavier Arteaga e832769ae6 Updated copyright 5 years ago
yagoda 943d90bc48 consolidating different ringbuffer functionalities into one, adding unit tests for ringbuffer 5 years ago
Xavier Arteaga 5af89513eb use double precission for frequency in srsue and srsenb 5 years ago
Xavier Arteaga 834a081c09 Add EPRE measurement to PUSCH decoder 5 years ago
Xavier Arteaga 76408b195e Rename TX_DELAY and FDD_HARQ_DELAY_MS 5 years ago
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 5 years ago
Francisco Paisana 639f473042 fixed unsigned signed comparison 5 years ago
Francisco Paisana 1e63fa41cf made ue_cc_idx int to set to -1 for rar and bc allocs 5 years ago
Francisco Paisana f3c3c52fcd added ue_cc_idx to dci allocation 5 years ago
Xavier Arteaga 002a68e183 SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold 5 years ago
Xavier Arteaga 64caa4321b Fix UL control decoding. Some minor aesthetic changes. 5 years ago
Xavier Arteaga 44a5ce172e Added vector srslte_vec_avg_power_sf 5 years ago
Ismael Gomez 4e12405fff
Remove radio_multi class and organize channels, ports and carrier buffers (#1019) 5 years ago
Xavier Arteaga a968fb02d3 Increase PUCCH correlatiion threasholds 5 years ago