1964 Commits (cc7dfefa1abd5a59417990d776555ce6bac1cb80)

Author SHA1 Message Date
Ismael Gomez cc7dfefa1a
Fix logic for UL HARQ retx causing Msg3 adaptive retx to be identified as a new transmission 5 years ago
Andre Puschmann 81b46723f6 adding NPDCCH 5 years ago
Andre Puschmann 073c57dc3d add NB-IoT DCI formats and move define to phy_common 5 years ago
Xavier Arteaga 9ee651d094 srsLTE: Added set vector zeros for float and cf 5 years ago
Xavier Arteaga b08c1f003e SRSENB: enabled multiple cells from rr.cfg 5 years ago
Andre Puschmann e5b1673b3b move PCAP into own compilation unit
this removes inline keyword from PCAP functions and puts all functions
into own C file

before forced inlining caused an issue when compiling for ARM on Ubuntu 19.10 on the RPi4
using gcc version 9.2.1
5 years ago
Francisco Paisana 883c2900c8 fix issue with future clear 5 years ago
Francisco Paisana 91d83fc20d different way to retrieve a proc future 5 years ago
Ismael Gomez 171e26ee68 Add checks more checks for UL grants 5 years ago
Xavier Arteaga dcb3bc0135 srsLTE: apply CLang Format in sch.c 5 years ago
Xavier Arteaga 905273b36a srsLTE: more memory corruption counter measures in ul_sch_encode 5 years ago
Xavier Arteaga 3b138b25c6 srsLTE: UL SCH Beta offset access fortification 5 years ago
Xavier Arteaga 8b6ba1aacf srsLTE: removed overlap bytes check in RLC AM 5 years ago
Xavier Arteaga 5872e763bf SRSLTE: RLC AM remove completely overlapped segments 5 years ago
Xavier Arteaga 39bec9aab1 SRSLTE: fix RLC reordering and segment overlaping 5 years ago
Xavier Arteaga d3537fc340 srsLTE: expanded RLC stress test with the addition of multiple PDU per TTI in reverse order 5 years ago
Francisco Paisana 5ae3afd2b8 created cbit_ref for unpacking const buffers 5 years ago
Francisco Paisana 58e555e86c update all asn1 files 5 years ago
Francisco Paisana 5468189cd9 fix some variables' naming (e.g. x2_ap -> x2ap, e_rab -> erab) 5 years ago
Francisco Paisana 2a83eee0ee fix security key setup 5 years ago
Francisco Paisana ee24b59924 converted s1ap to new s1ap asn1 lib. Cleaned up bitstring packing/unpacking and bitstring types 5 years ago
Francisco Paisana 25bb36cdc3 converted ho preparation to new s1ap asn1 lib. Extended s1ap test 5 years ago
Francisco Paisana 3066b404ac fix integer ext asn1 generation 5 years ago
Francisco Paisana c87de9d889 added s1ap_asn1_test 5 years ago
Francisco Paisana b6c53d786b updated s1ap rrc interface with new asn1 lib types 5 years ago
Francisco Paisana 61b3e6b57e imported new s1ap asn1 lib 5 years ago
Andre Puschmann b43c531c15 adding CMW500 SLSS capture and enable PSBCH test 5 years ago
Andre Puschmann d98bc71057 fix PSBCH and use UL-SCH interleaver 5 years ago
Andre Puschmann 9012ca5faa fix PSBCH tests 5 years ago
Andre Puschmann 2e7a357226 expose UL-SCH interleaver to use in Sidelink 5 years ago
Andre Puschmann b0bfc7956d use const& in metrics interface 5 years ago
Xavier Arteaga bca5d1a95a srsLTE: extend viterbi test 5 years ago
Francisco Paisana 182a721329 fix some integer printf potential warnings 5 years ago
Xavier Arteaga 8a666ee455 srsLTE: Increase UHD default sampling rate. Enables warning if USB2 is used. 5 years ago
Andre Puschmann be4ba504bd fix another bunch of uninit memory in tests, and one in srsENB 5 years ago
Andre Puschmann 0554064bf0 refactor NPBCH init, fix memset with zero length 5 years ago
Andre Puschmann 0394d21dd2 fix uninit memory in chest sl test when not test is executed 5 years ago
Andre Puschmann 06afe74bef add virtual dtor in sched_interface base class 5 years ago
Andre Puschmann 6ec573987a remove default value for 'blocking' param from pdcp::write_sdu()
there were two defaults and one was shadowing the other. This
commit removes both defaults and uses blocking-mode for RRC
calls to PDCP in the UE. The eNB write_sdu() uses the non-blocking
mode by default. We have to review the eNB's RRC perhaps and use blocking
there too and non-blocking only for data plane
5 years ago
Andre Puschmann 1155adf007 fixing printfs in asn1_utils 5 years ago
Andre Puschmann 0bd493b567 call byte_buffer cleanup in two enb tests and fix typo 5 years ago
Andre Puschmann c54fa568be fixing typo in CMake for PHY DL test 5 years ago
Andre Puschmann 03512547f5 add test for Sidelink channel estimator 5 years ago
Xavier Arteaga 0912701cb0 srsLTE: sidelink minor corrections 5 years ago
Andre Puschmann 7de51c8236 refactor Sidelink PSBCH and DMRS code 5 years ago
Xavier Arteaga 36b2102de8 SRSUE: avoid testing ue_phy_test 5 years ago
Xavier Arteaga 307c27dc30 srsLTE: ZMQ renamed struct field 5 years ago
Xavier Arteaga 2d98f92823 srsLTE: upgraded ZMQ for supporting frequency selection 5 years ago
Xavier Arteaga 11eafa8ab4 srsLTE: FFTW wisdom gets loaded and saved by default 5 years ago
Xavier Arteaga 892ece8cdd srsLTE: reduce number of SF for rf_zmq_test 5 years ago