Xavier Arteaga
834a081c09
Add EPRE measurement to PUSCH decoder
5 years ago
Francisco Paisana
fad897cb35
DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations
5 years ago
Francisco Paisana
639f473042
fixed unsigned signed comparison
5 years ago
Francisco Paisana
1e63fa41cf
made ue_cc_idx int to set to -1 for rar and bc allocs
5 years ago
Francisco Paisana
f3c3c52fcd
added ue_cc_idx to dci allocation
5 years ago
Xavier Arteaga
002a68e183
SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold
5 years ago
Xavier Arteaga
64caa4321b
Fix UL control decoding. Some minor aesthetic changes.
5 years ago
Xavier Arteaga
a968fb02d3
Increase PUCCH correlatiion threasholds
5 years ago
Xavier Arteaga
da701cd82b
SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup.
5 years ago
Xavier Arteaga
47cbbcbd57
Improve PUSCH UCI decoder
5 years ago
Francisco Paisana
a6320f93b8
remove remaining const_casts
5 years ago
Francisco Paisana
ec1f1cc677
remove const_casts from scheduler. Fix ODR issue
5 years ago
Andre Puschmann
e4b5fa122f
add set_cell() call to PSCCH and allocate for max PRB in pscch_init()
5 years ago
Andre Puschmann
09f7355870
use srslte_cell_sl_t in PSCCH
5 years ago
Andre Puschmann
14000f7ae7
adding phy_common_sl.{c,h}
5 years ago
Tiago Alves
cabd9ae742
baseline implementation of pscch
5 years ago
Xavier Arteaga
a4135e41a5
Added PUCCH collision checker
5 years ago
Xavier Arteaga
2fc0832f05
Addition of DL HARQ-ACK generation procedure for eNb DL and minor aesthetic changes
5 years ago
Xavier Arteaga
e621853566
Minor aesthetics changes
5 years ago
Xavier Arteaga
f261365c91
Initial EVM calculation commit and other easthetic changes
5 years ago
Pedro Alvarez
aecfb151ce
Apply clang-format to the lib in preperation for PR.
5 years ago
Ismael Gomez
d8d10daebe
Fix bug in SRS using the previous grant to compute collision with PUSCH ( #958 )
5 years ago
Xavier Arteaga
67c07dfb56
Moved UL/DL PUCCH procedures into pucch_proc
5 years ago
Xavier Arteaga
5dbc96458a
Sets PUCCH decode threshold as macro
5 years ago
Xavier Arteaga
bc10943a2b
Added get max TB from DCI format
5 years ago
Xavier Arteaga
231431f569
SRSENB: enabled CA PUCCH decode in eNb
5 years ago
Xavier Arteaga
d66fdefbb3
Added more docs to PUCCH 1b CS resource selection
5 years ago
Xavier Arteaga
1f762844ee
Initial PUCCH format 3 decoder
5 years ago
Xavier Arteaga
35f4e5d69a
Initial PUCCH 1B with channel selection
5 years ago
Andre Puschmann
81b46723f6
adding NPDCCH
5 years ago
Andre Puschmann
d98bc71057
fix PSBCH and use UL-SCH interleaver
5 years ago
Andre Puschmann
2e7a357226
expose UL-SCH interleaver to use in Sidelink
5 years ago
Xavier Arteaga
0912701cb0
srsLTE: sidelink minor corrections
5 years ago
Andre Puschmann
7de51c8236
refactor Sidelink PSBCH and DMRS code
5 years ago
Tiago Ferreira Alves
3fed21ce3e
PSSS and SSSS implementation
5 years ago
Andre Puschmann
476f970ee1
replace FIXME with TODO
5 years ago
Pedro Alvarez
c5979f59eb
Clang format UE, eNB and lib ( #850 )
...
* Clang-formated UE, eNB and lib.
* Fixed compiling errors from clang-format.
* Fix linking issues introduced by clang-format
* Fix poor formating in initializing arrays of arrays.
* Fix mistake in conflict resolution on rm_turbo.c
* Re-apply clang format to gtpc_ies.h
5 years ago
Andre Puschmann
40bacb80b1
fixing comments from Xavier's review
5 years ago
Andre Puschmann
e05ecdb139
adding NB-IoT DL channel estamiation and NPBCH code
5 years ago
Ismael Gomez
3828e03f33
Refactor in eNodeB, add channel emulator and fixes in OFDM
...
* Added channel emulator to srsENB. Added support for fixed delay
* Bug in OFDM when using nonguru mode
* A few changes and refactor in eNodeB
5 years ago
Ismael Gomez
1d83bb08e2
Changes in ACK procedure to support CA. Tested 1 cell in SISO/MIMO
5 years ago
Ismael Gomez
bfddc55148
RRC-PHY interface ( #639 )
...
RRC-PHY interface refactor. Moved RRC-MAC interface to rrc_asn1_utils and created RRC-PHY interface also in rrc_asn1_utils. All ASN1 includes should be made from rrc_asn1_utils only keeping ue_interfaces clean of ASN1
Tested with different common and dedicated configurations (64QAM UL, 256QAM, CA, SRS enabled/disabled, etc)
5 years ago
Ismael Gomez
19066c49ab
Ad Rel10 info to dci logs
5 years ago
Guillem Foreman
535325bc37
srsLTE: added resource allocation extended tables for 256QAM and integration with PDSCH test
6 years ago
Ismael Gomez
786830daf3
Fix minor issues for TDD
6 years ago
Andre Puschmann
4b01a2e4a0
update copyright notice
6 years ago
Ismael Gomez
7780b1aba5
add tdd/ca support
6 years ago
Francisco Paisana
0204db2e12
new asn1 rrc library
6 years ago
Ismael Gomez
197d855d3f
Fix issue #240
6 years ago
Ismael Gomez
bc9d342959
New optimization on the PHY for both UE and eNodeB ( #251 )
...
* New parallel Turbodecoder implementation in SSE/AVX 16-bit and 8-bit
* Optimised UL Interleaver
* Include TB CRC calculation in FEC encoder
* New threading priorities
6 years ago