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8667 Commits (5aa2279990dc2a3b70a8cee7b29224a1a28f9631)
 

Author SHA1 Message Date
Francisco Paisana 97f2e4336e refactor of functions for filling the asn1 radio resource config structs. This functions are used during rrc setup/reest/reconf 4 years ago
Xavier Arteaga 9487d27ef9 Renamed NR constants and comments 4 years ago
Xavier Arteaga e8f168b20c PDSCH NR: Added files 4 years ago
Xavier Arteaga c8477483d9 PDSCH NR: Added files 4 years ago
Xavier Arteaga 30d8e05d50 Fix PDSCH-DMRS symbol index 4 years ago
Xavier Arteaga 275cbafe6e Modified comments 4 years ago
Xavier Arteaga 8d34d344a8 Created PDSCH-NR configuration structures and refactored DMRS 4 years ago
Xavier Arteaga 009f300c5e Initial PHY Data procedures 4 years ago
Xavier Arteaga 775692f461 Rearanged PDCCH NR functions structures 4 years ago
Xavier Arteaga 452eb2dbbf Updated some DOCS 4 years ago
Xavier Arteaga 937c52339d Added PDCCH DMRS estimation and measurement 4 years ago
Xavier Arteaga 5799100e42 FFT based Resampler admits NULL inputs/outputs 4 years ago
Xavier Arteaga 44ae70dcc6 Initial implementation of the 5G NR PDCCH DMRS encoding 4 years ago
Xavier Arteaga 29ad2427d9 Initial implementation of the 5G NR PDCCH DMRS encoding 4 years ago
Xavier Arteaga 579526f1fe Added sequence advance without generating data 4 years ago
Xavier Arteaga fa837925d0 Fix inter-frequency/intra-enb HO 4 years ago
Xavier Arteaga eba20b6367 Radio: fix frame overlap at start-of-burst 4 years ago
Xavier Arteaga a5f9ea5654 SRSUE: force paging for every cell reselection procedure end 4 years ago
Andre Puschmann fd5cde525c proc_bsr: fix race condition in BSR reporting 
fix for #1934

This fixes a race condition between Stack thread and DL
PDU processing that lead to updates of the RLC buffer that
are undetected by the BSR routine.

What happens is that in a UL SCH PDU all outstanding data is transmitted
and and a LBSR with all zero buffers is sent.

14:39:47.327301 [MAC ] [D] [ 3793] BSR:   LCID=3 old_buffer=59
14:39:47.330600 [MAC ] [I] [ 3793] UL LCID=3 len=58 LBSR: b=0 0 0 0

Note that "old_buffer" isn't set to zero here.

At the same time (same TTI), the MAC PDU processing thread handles DL-SCH PDUs
that may generate new UL PDUs:

14:39:47.330749 [RLC ] [I] DRB1 Tx SDU (54 B, tx_sdu_queue_len=1)
14:39:47.330762 [RLC ] [I] DRB1 Tx SDU (54 B, tx_sdu_queue_len=2)
14:39:47.330775 [RLC ] [I] DRB1 Tx SDU (54 B, tx_sdu_queue_len=3)
..

Those PDUs are "new data" since the previous buffer state was zero.

Here is the race now between the threads, at the end of the bsr::step() function
old_buffer of each LCG is updated with the previous new_buffer, so
the buffer state of LCG=2 is now 59.

Now MAC starts the next TTI:

14:39:47.331910 [MAC ] [D] [ 3794] Running MAC tti=3794
14:39:47.331928 [MAC ] [D] [ 3794] Update Bj: lcid=0, Bj=0
14:39:47.331934 [MAC ] [D] [ 3794] Update Bj: lcid=1, Bj=0
14:39:47.331938 [MAC ] [D] [ 3794] Update Bj: lcid=2, Bj=0
14:39:47.331941 [MAC ] [D] [ 3794] Update Bj: lcid=3, Bj=-1752
14:39:47.331951 [MAC ] [D] [ 3794] BSR:   LCID=0 update new buffer=0
14:39:47.331960 [MAC ] [D] [ 3794] BSR:   LCID=1 update new buffer=0
14:39:47.331964 [MAC ] [D] [ 3794] BSR:   LCID=2 update new buffer=0
14:39:47.331971 [MAC ] [D] [ 3794] BSR:   LCID=3 update new buffer=335
14:39:47.331976 [MAC ] [D] [ 3794] BSR:    check_new_data() -> get_buffer_state_lcg(0)=0
14:39:47.331980 [MAC ] [D] [ 3794] BSR:    check_new_data() -> get_buffer_state_lcg(1)=0
14:39:47.331984 [MAC ] [D] [ 3794] BSR:    check_new_data() -> get_buffer_state_lcg(2)=59
14:39:47.331988 [MAC ] [D] [ 3794] BSR:    check_new_data() -> get_buffer_state_lcg(3)=0
14:39:47.331993 [MAC ] [D] [ 3794] BSR:   LCID=0 old_buffer=0
14:39:47.332000 [MAC ] [D] [ 3794] BSR:   LCID=1 old_buffer=0
14:39:47.332003 [MAC ] [D] [ 3794] BSR:   LCID=2 old_buffer=0
14:39:47.332007 [MAC ] [D] [ 3794] BSR:   LCID=3 old_buffer=335

And since the buffer state of LCG=2 isn't zero, the new data for LCID=3 of that LCG is considered.
So effectivly, the BSR missed the "empty" buffer state for a fraction of time and doesn't
consider the outgoing data generated in the same TTI as new. It therefore
doesn't transmit a BSR.

in which a BSR wasn't
 4 years ago
Andre Puschmann 465c3d9186 proc_sr: remove info log when starting SR proc 
this was a very noisy log that was printed in pretty much
every TTI because the BSR procedure starts a SR whenever
it needs to send a regular BSR. The SR is canceled when a UL
grant arrives but the log line stays there.

Since we are printing a log when we actually signal a SR
to the PHY, this line is not needed.
 4 years ago
Andre Puschmann 1e3ad5b0dc proc_bsr: fix high priority channel trigger logic 
this fixes the trigger logic for periodic BSRs. Previously we
would always trigger the "new data for highest priority LCID"
whenever new data becomes available for a LCID for which
a BSR has already been sent.

However, a BSR should only be sent if the priority is in fact higher
(lower int number).
 4 years ago
Andre Puschmann debbab93e8 mac_test: cosmetic change 4 years ago
Andre Puschmann e89254ad1f mac_test: fix mac_ra_test according to BSR changes 
the BSR routine had a bug in which it would generate a BSR even
before the reTx timer expires if new data becomes availble
for a LCID that already had data and a BSR was already sent.

The RA test here relies on a BSR in the generated MAC PDU to pass.

However, since after fixing the BSR bug the PDU the MUX unit
no longer generates a BSR, we need generate data for a LCID
which has higher priority than the one for which a BSR has
already been sent.
 4 years ago
Andre Puschmann d6ef66b0dc mac_test: add periodic BSR test 4 years ago
Andre Puschmann d5286e70aa proc_bsr: refactor and add extra print_state() method 
allows to call the print_state() routine from other places in the BSR
 4 years ago
Andre Puschmann d1ef5bd915 demux: log DL PDUs 
instead of just printing the LCIDs that contain SDUs,
we use the to_string() function to log the entire MAC DL-SCH PDU
 4 years ago
Andre Puschmann ff21d9c077 enb: fix error log when parsing cell config 4 years ago
Andre Puschmann 41e3bc5eaf update changelog and readme for 20.10 release 4 years ago
Xavier Arteaga be400503b9 Add pass criteria to PRACH USRP test 4 years ago
Xavier Arteaga 28bb4709ff Solved possible high impact PHY out-of-bounds issues 4 years ago
Pedro Alvarez e4f143059e Simple log fix to make it easier to compare PDCP RX and TX. 4 years ago
Xavier Arteaga 58be68f856 Changed cell gain command from cell index to cell id 4 years ago
Andre Puschmann 0740154bff rrc,sync: fix two uninit vars 
detected by Valgrind when running UE with TDD cell
 4 years ago
Andre Puschmann 723ca2dd48 ra_dl: fix TDD reference symbol extraction 
reported/provided by user softdev86 in https://github.com/srsLTE/srsLTE/issues/566

author tested with local 4 port cell. I am not able to verify locally but
it looks ok, we'll revise later if needed.
 4 years ago
gracid f67a152a2a Remove unnecessary Lime calibration step from Soapy implementation 
When using srsLTE with Lime devices, calibration was performed before any configuration steps have happened, thus making calibration values invalid. Removing Lime specific calibration step from rf_soapy_imp makes so that devices will be automatically calibrated by SoapyLMS on rf_soapy_start_stream call.

Tested and working with srsENB using LimeSDR-USB v1.4 and LimeSDR-Mini v1.2 boards.
 4 years ago
gracid 78b63c9465 Set same antennas for all Soapy channels 
This commit adresses an issue where two or more channels could have different antennas, despite being explicitly set in the configuration file
 4 years ago
Andre Puschmann 58776bc227
ue,sync: increase timeout for entering IDLE to 2s (#1941) 
in ZMQ runs we've seen that entering idle could take quite
a bit of time depending how quickly workers get their samples
sent or reconfigurations done.

In one example up to ~160ms

this patch increases the maximum wait time to 2s.
 4 years ago
Francisco Paisana 9b40d1da99 fix 256qam for handover 4 years ago
Francisco Paisana c24d754dbb add 256qam to scell as well 4 years ago
Francisco Paisana 514deaf25b fix resetting of phy and mac during reestablishment 4 years ago
Francisco Paisana 83d13cf20f uncomment 256qam features 4 years ago
Francisco Paisana 4cb6ed27eb updated scheduler ue mcs computation to account for new 256QAM tables 4 years ago
Francisco Paisana 461f34785d activation of 256qam in reconf message if the UE supports it. 4 years ago
Francisco Paisana 44a9ad76f1 avoid sched_ue dangling pointer 
With the sched feature that allows scheduling in TTIs
ahead of time, there is no guarantee that when
the tti arrives to generate a sched result, the stored
raw sched_ue pointers are still valid. For this reason,
I now store the rnti and check if the rnti still exists.
 4 years ago
Francisco Paisana c7697b62a6 fix asn1_utils_test. arrays used for equal comparison where not being initialized. 4 years ago
Francisco Paisana 0d38e28ce7 address PR comments. Change warning message if sched ue cells cqi configs will lead to time collisions. 4 years ago
Francisco Paisana 852c31c0bc log warnings when the sched ue cfg is not valid 4 years ago
Xavier Arteaga fac6d40a45 SRSENB: fix PUSCH max number of iterations 4 years ago
Xavier Arteaga 791c979063 Vector: fix cf to cs conjugate conversion 4 years ago
yagoda e09b6aaacb updating sib13 config for mbms, fixing small bug with metrics 4 years ago