Xavier Arteaga
76408b195e
Rename TX_DELAY and FDD_HARQ_DELAY_MS
5 years ago
Francisco Paisana
fad897cb35
DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations
5 years ago
Francisco Paisana
639f473042
fixed unsigned signed comparison
5 years ago
Francisco Paisana
1e63fa41cf
made ue_cc_idx int to set to -1 for rar and bc allocs
5 years ago
Francisco Paisana
f3c3c52fcd
added ue_cc_idx to dci allocation
5 years ago
Xavier Arteaga
002a68e183
SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold
5 years ago
Xavier Arteaga
64caa4321b
Fix UL control decoding. Some minor aesthetic changes.
5 years ago
Xavier Arteaga
44a5ce172e
Added vector srslte_vec_avg_power_sf
5 years ago
Ismael Gomez
4e12405fff
Remove radio_multi class and organize channels, ports and carrier buffers ( #1019 )
5 years ago
Xavier Arteaga
a968fb02d3
Increase PUCCH correlatiion threasholds
5 years ago
Xavier Arteaga
da701cd82b
SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup.
5 years ago
Xavier Arteaga
47cbbcbd57
Improve PUSCH UCI decoder
5 years ago
Francisco Paisana
a6320f93b8
remove remaining const_casts
5 years ago
Francisco Paisana
ec1f1cc677
remove const_casts from scheduler. Fix ODR issue
5 years ago
Andre Puschmann
e4b5fa122f
add set_cell() call to PSCCH and allocate for max PRB in pscch_init()
5 years ago
Andre Puschmann
151ce10a96
remove SL specific CFO correction method
5 years ago
Andre Puschmann
09f7355870
use srslte_cell_sl_t in PSCCH
5 years ago
Andre Puschmann
14000f7ae7
adding phy_common_sl.{c,h}
5 years ago
Andre Puschmann
8b70ff7654
simplify SL chest and add RSRP and sync error measurements
5 years ago
Tiago Alves
cabd9ae742
baseline implementation of pscch
5 years ago
Xavier Arteaga
125747ae4a
Added external C to phy_common header and ACK/NACK feedack mode parser
5 years ago
Xavier Arteaga
a4135e41a5
Added PUCCH collision checker
5 years ago
Xavier Arteaga
2fc0832f05
Addition of DL HARQ-ACK generation procedure for eNb DL and minor aesthetic changes
5 years ago
Xavier Arteaga
e621853566
Minor aesthetics changes
5 years ago
Xavier Arteaga
f261365c91
Initial EVM calculation commit and other easthetic changes
5 years ago
Pedro Alvarez
aecfb151ce
Apply clang-format to the lib in preperation for PR.
5 years ago
Ismael Gomez
d8d10daebe
Fix bug in SRS using the previous grant to compute collision with PUSCH ( #958 )
5 years ago
Andre Puschmann
327aa97cfd
add macro for invalid RNTI 0x0
5 years ago
Xavier Arteaga
67c07dfb56
Moved UL/DL PUCCH procedures into pucch_proc
5 years ago
Xavier Arteaga
7a20e3a51e
Added boolean random generator
5 years ago
Xavier Arteaga
5dbc96458a
Sets PUCCH decode threshold as macro
5 years ago
Xavier Arteaga
bc10943a2b
Added get max TB from DCI format
5 years ago
Xavier Arteaga
231431f569
SRSENB: enabled CA PUCCH decode in eNb
5 years ago
Xavier Arteaga
d66fdefbb3
Added more docs to PUCCH 1b CS resource selection
5 years ago
Xavier Arteaga
1f762844ee
Initial PUCCH format 3 decoder
5 years ago
Xavier Arteaga
35f4e5d69a
Initial PUCCH 1B with channel selection
5 years ago
Andre Puschmann
6cce22d6b8
add support for GPS-based sync to UE sync object
5 years ago
Andre Puschmann
c7343cf6d8
protect sf_buffer from overrun in receive_samples
...
this patch adds a buffer len paramter to the receive_samples() call
that protects the (also) provided buffer from overflowing.
currently each call to srslte_ue_sync_zerocopy() which then calls receive_samples()
relies on a buffer that is "big enough". But that buffer is sometimes
2 subframes, sometimes 3 or 5, sometimes has space for the maximum PRB size, sometimes
only for 6 PRBs (i.e. during cell search).
By extending the interface to pass the buffer size we can make sure that
only samples are received that actually fit inside the provided buffer.
5 years ago
Xavier Arteaga
68ad4960eb
SRSLTE: added holding time before AGC starts measuring after setting gain
5 years ago
Francisco Paisana
1b958a60b5
casting .c_str() to mutable char* and changing the char* was causing all sort of weird format messages
5 years ago
Ismael Gomez
cc7dfefa1a
Fix logic for UL HARQ retx causing Msg3 adaptive retx to be identified as a new transmission
5 years ago
Andre Puschmann
81b46723f6
adding NPDCCH
5 years ago
Andre Puschmann
073c57dc3d
add NB-IoT DCI formats and move define to phy_common
5 years ago
Xavier Arteaga
9ee651d094
srsLTE: Added set vector zeros for float and cf
5 years ago
Andre Puschmann
d98bc71057
fix PSBCH and use UL-SCH interleaver
5 years ago
Andre Puschmann
2e7a357226
expose UL-SCH interleaver to use in Sidelink
5 years ago
Xavier Arteaga
bca5d1a95a
srsLTE: extend viterbi test
5 years ago
Xavier Arteaga
0912701cb0
srsLTE: sidelink minor corrections
5 years ago
Andre Puschmann
7de51c8236
refactor Sidelink PSBCH and DMRS code
5 years ago
Xavier Arteaga
11eafa8ab4
srsLTE: FFTW wisdom gets loaded and saved by default
5 years ago