faluco
453a7760b3
Port misc SSN changes to dev.
3 years ago
Andre Puschmann
0ee82ed0f6
ue_dl_nr_file_test: add option to select ue specific search space
...
* add option to select search space: ue and common1
* print coreset info
3 years ago
Andre Puschmann
b7f9dd5d75
phy_common_nr: add helper method to print coreset info to string
3 years ago
Francisco
5a3e99fb58
nr,gnb,rrc: fix missing return for mib generation
3 years ago
Francisco
25a8ea53d3
nr,gnb,sched: pass mib config to scheduler so it is used during SSB allocation
3 years ago
Francisco
fec97689a2
rrc,nr,gnb: refactored rrc nr cfg default and derived param generation to be mostly independent of parser
3 years ago
Francisco
f2a5f00bb3
nr,gnb: fix abs freq ssb arfcn derivation
3 years ago
Francisco
0b8a6970f0
nr,gnb,rrc: fix ssb frequency derivation when coreset0 is active
3 years ago
Francisco
92c4e6e2d0
nr,gnb: account for CORESET#0 RB offset (See 38.213, table 13-1) in computation of SSB center frequency
3 years ago
Ismael Gomez
4836e90b2c
Move place to apply reference_point_k_rb to dmrs
3 years ago
Andre Puschmann
883ddef4a6
ue_dl_nr_file_test: fix compilation on gcc 4.8
3 years ago
Andre Puschmann
66871b1e8e
ue_dl_nr_file_test: disable failing file tests temporarily
...
they will be enabled again as soon as the decoding issues are solved
3 years ago
Ismael Gomez
798e9b7a5e
ue_dl: reference point for DMRS varies for SIB
3 years ago
Ismael Gomez
e7c2cea032
Fix data conversion parse in ue_dl_nr_file_test
3 years ago
Andre Puschmann
9c6f9f5949
dci_nr: print coreset0_bw when DCI is scrambled with SI-RNTI
3 years ago
Andre Puschmann
d5a00fcdad
dci_nr_test: add test for DCI 1_0 with SI-RNTI
3 years ago
Andre Puschmann
573b2f657a
ssb_file_test: make duplex and SSB SCS configurable, add new unit test for FDD+15kHz SCS
3 years ago
Andre Puschmann
dd34f5b274
ue_dl_nr_file_test: fix coreset0 bandwidth when decoding SI-RNTI
3 years ago
Andre Puschmann
972e080e48
ue_dl_nr_file_test: update SSB/SIB TV
...
update capture and make sure its rv=0
// Cell 0x01: nr_arfcn=368500 ul_nr_arfcn=349500 pci=500 mode=FDD rat=nr n_rb_dl=52 n_rb_ul=52 dl_mu=0 ul_mu=0 ssb_mu=0 ssb_arfcn=368410 ssb_prb=13:21 k_ssb=6 coreset0_prb=1:48 coreset0_idx=6
20:43:31.997 [PHY] DL - 01 ffff 784.0 PDSCH: harq=si prb=1:7 symb=2:12 CW0: tb_len=84 mod=2 rv_idx=0 cr=0.44
0000: 74 81 01 70 10 40 04 02 00 00 c8 00 24 68 a0 38 t..p.@......$h.8
0010: 05 01 00 40 1a 00 00 06 6c 6d 92 21 f3 70 40 20 ...@....lm.!.p@
0020: 00 00 80 80 00 41 06 80 a0 90 9c 20 08 55 19 40 .....A..... .U.@
0030: 00 00 33 a1 c6 d9 22 40 10 00 1e b8 94 63 c0 09 ..3..."@.....c..
0040: 28 c4 1b 8a 36 e1 5b 1c 3a 01 3c 5b 46 14 00 00 (...6.[.:.<[F...
0050: 00 00 00 00 ....
20:43:31.997 [PHY] DL - 01 ffff 784.0 PDCCH: ss_id=0 cce_index=0 al=4 dci=1_0
rb_alloc=0x120
time_domain_rsc=0
vrb_to_prb_map=0
mcs=6
rv_idx=0
si_indicator=0
dci_len=39
3 years ago
Andre Puschmann
7a64163aa4
ue_dl_nr_file_test: enable coreset0_idx=6 file test
3 years ago
Andre Puschmann
16b5f4c3db
ue_dl_nr_file_test: add further IQ capture with coreset0_idx=6
...
Cell 0x01: nr_arfcn=368500 ul_nr_arfcn=349500 pci=500 mode=FDD rat=nr n_rb_dl=52 n_rb_ul=52 dl_mu=0 ul_mu=0 ssb_mu=0 ssb_arfcn=368410 ssb_prb=13:21 k_ssb=6 coreset0_prb=1:48 coreset0_idx=6
12:58:46.197 [PHY] DL - 01 ffff 556.0 PDSCH: harq=si prb=1:7 symb=2:12 CW0: tb_len=84 mod=2 rv_idx=2 cr=0.44
0000: 74 81 01 70 10 40 04 02 00 00 c8 00 24 68 a0 38 t..p.@......$h.8
0010: 05 01 00 40 1a 00 00 06 6c 6d 92 21 f3 70 40 20 ...@....lm.!.p@
0020: 00 00 80 80 00 41 06 80 a0 90 9c 20 08 55 19 40 .....A..... .U.@
0030: 00 00 33 a1 c6 d9 22 40 10 00 1e b8 94 63 c0 09 ..3..."@.....c..
0040: 28 c4 1b 8a 36 e1 5b 1c 3a 01 3c 5b 46 14 00 00 (...6.[.:.<[F...
0050: 00 00 00 00 ....
12:58:46.197 [PHY] DL - 01 ffff 556.0 PDCCH: ss_id=0 cce_index=0 al=4 dci=1_0
rb_alloc=0x120
time_domain_rsc=0
vrb_to_prb_map=0
mcs=6
rv_idx=2
si_indicator=0
dci_len=39
3 years ago
Andre Puschmann
d2fc11fbec
ue_dl_nr_file_test: add missing parameter to existing file tests
3 years ago
Andre Puschmann
830cbcde08
ue_dl_nr_file_test: add all zero PDSCH check and let test fail in this case
3 years ago
Andre Puschmann
77269c055d
ue_dl_nr_file_test: expose ARFCN for center and SSB and use it to derive RB offset
3 years ago
Andre Puschmann
1684c56ca0
phy: add two IQ dumps with coreset0 and coreset1
...
coreset0:
15:03:16.697 [PHY] DL - 01 ffff 86.0 PDSCH: harq=si prb=2:7 symb=2:12 CW0: tb_len=84 mod=2 rv_idx=1 cr=0.44
0000: 74 81 01 70 10 40 04 02 00 00 c8 00 24 68 a0 38 t..p.@......$h.8
0010: 05 01 02 60 24 00 00 06 6c 6d 92 21 f3 70 40 20 ...`$...lm.!.p@
0020: 00 00 80 80 00 41 06 80 a0 90 9c 20 4c 29 21 00 .....A..... L)!.
0030: 00 00 33 a1 c6 d9 22 40 10 00 1e b8 94 63 c0 09 ..3..."@.....c..
0040: 28 c4 1b 8a 36 fd 5b 1c 3a 00 bc 5b 46 14 00 00 (...6.[.:..[F...
0050: 00 00 00 00 ....
15:03:16.697 [PHY] DL - 01 ffff 86.0 PDCCH: ss_id=0 cce_index=0 al=4 dci=1_0
rb_alloc=0x120
time_domain_rsc=0
vrb_to_prb_map=0
mcs=6
rv_idx=1
si_indicator=0
dci_len=39
coreset1:
15:03:16.693 [PHY] DL 0001 01 0100 85.6 PDCCH: ss_id=1 cce_index=0 al=4 dci=1_0
rb_alloc=0x5f
time_domain_rsc=0
vrb_to_prb_map=0
mcs=6
ndi=1
rv_idx=0
harq_process=0
dai=0
tpc_command=1
pucch_rsc=0
harq_feedback_timing=3
dci_len=39
15:03:16.693 [PHY] DL 0001 01 0100 85.6 PDSCH: harq=0 prb=2:48 symb=1:13 k1=4 CW0: tb_len=624 mod=2 rv_idx=0 cr=0.44 retx=0
0000: 43 02 6d 40 00 80 00 00 d6 5b 77 92 be 29 a1 5c C.m@.....[w..).\
0010: 9d d9 a3 42 64 bf d7 c0 cc 20 a6 4f b3 5e f5 06 ...Bd.... .O.^..
0020: 5f fc 03 02 83 ca e9 ee 04 e7 1a 1d 00 3f 9c 01 _............?..
0030: ec 1c 32 bb 6b 0f e2 e9 dc 7c f6 84 41 b2 2b e8 ..2.k....|..A.+.
0040: 10 f0 23 2c 91 f1 5d c7 6f b5 6e ac b6 fb c2 e6 ..#,..].o.n.....
0050: 32 2d b2 8b 07 36 11 f3 81 78 5d ff 1a 85 8d 6c 2-...6...x]....l
0060: 18 ce ca 52 1f 81 0f 78 c6 1a ab b5 e8 71 50 34 ...R...x.....qP4
3 years ago
Andre Puschmann
8c99d7a3bd
ue_dl_nr_file_test: use common helper function to derive coreset0 params
3 years ago
Andre Puschmann
279d82aa31
ue_dl_nr: debug to print PDCCH received symbols
3 years ago
Andre Puschmann
36a287edd8
ue_dl_nr_file_test: expose various coreset and search space related parameters
3 years ago
Andre Puschmann
f708635a5d
rrc_nr_cfg: set default PLMN for NR cell to 00101
3 years ago
Andre Puschmann
779bfcf791
phy_common: fix symbol size derivation for NR-only cells
...
make sure that 52 PRB cell with LTE rates gives 15.36e6 as sample rate
3 years ago
Andre Puschmann
853d870c52
rlc_um_nr: fix SN wrap-around in a few places
3 years ago
Andre Puschmann
813adb9567
rlc_um_nr: reduce verbosity in info mode
...
this will only print the most relevant messages in info mode.
also streamlines some messages with RLC AM entity.
3 years ago
Andre Puschmann
1bec07a64a
rlc_um_nr: fix starting/stopping of reassemble timer
3 years ago
Andre Puschmann
b3c7eeedd3
rlc_um_nr_test: add extra check to verify reassembly timer isn't running
3 years ago
Andre Puschmann
4187be3ff9
Revert "Revert "rlc_um_nr: reimplement update of RX_Next_Reassembly""
...
This reverts commit 296758e4ab
.
3 years ago
Andre Puschmann
7141fda69c
Revert "rlc_um_nr_test: disable test9 until low TCP UL rates are understood/fixed"
...
This reverts commit e491aef74e
.
3 years ago
Pedro Alvarez
f99d6bc224
lib,rlc: changed get_bearer() to get_lcid().
3 years ago
Pedro Alvarez
3b150e26cb
rlc_am_nr: Changed header_t to HeaderType typename in RLC data structs.
...
Fix issue in clear_pdcp_sdu()
3 years ago
Pedro Alvarez
123ac16653
rlc_am_nr: fixed issue with pointers from rx entity to tx entity
3 years ago
Pedro Alvarez
f99e841421
Changed using a rlc_am_lte and rlc_am_nr entity, to a single rlc_am entity.
3 years ago
Pedro Alvarez
eefedcfccd
rlc_am_nr: renamed rlc_am_base to just rlc_am
3 years ago
Pedro Alvarez
aef87d5366
rlc_am_nr: Change rlc_am_base to use unique_ptr to hold rx/tx entities
3 years ago
Pedro Alvarez
779eda98bd
Temporarly silence unused variable warnings.
3 years ago
Pedro Alvarez
e780eb5ab0
Fixed missing TM and RLC AM NR in mem_pool
3 years ago
Pedro Alvarez
debb4a0c6b
Refactored RLC AM segment pool for re-use in both LTE and NR
...
Moved RLC AMD PDU definitions from rlc_am_lte.h to rlc_common.h to make them re-usable in both RLC LTE and RLC NR
3 years ago
Pedro Alvarez
54be15e7a6
Moved write pdu to rlc_am_base::rlc_am_base_rx
3 years ago
Pedro Alvarez
476f9e1156
Changed logger initialization in RLC AM entities
3 years ago
Pedro Alvarez
022c51493b
Refactored RLC AM NR/LTE Rx and Tx entities to use a rlc_am_base_rx/tx class.
...
This was done to make it easier to share entity specific code between LTE and NR.
This removes the previously used templates.
3 years ago
Pedro Alvarez
b15f63f32f
Added an RLC AM base class to avoid code duplication in the RLC AM NR entity.
...
This class is based on a template that receives as argument the
rlc_am_*_tx/rx entities, so that those are different for LTE and NR.
Moved code from rlc_am_lte/nr entities so that they use the new base class.
3 years ago
Pedro Alvarez
e65bcd7147
Changed default max S1 Setup retries to infinity
3 years ago