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srsRAN_4G
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118 Commits (210eae8e7eae656f3931dc8749cdcfc23df891f5)

Author SHA1 Message Date
yagoda faf1cf6975 limiting prach search space to number of prachs set in sib2 5 years ago
Andre Puschmann d6e0153b40 sci: add SCI format 1 transmission format flag 5 years ago
luis_pereira87 baf0ad5bf4 PSSCH implementation 5 years ago
Xavier Arteaga 89dcd6339f More LGTM fixes 5 years ago
Xavier Arteaga 562590e595 Fix LGTM warnings 5 years ago
Andre Puschmann e76e31e652 adding NB-IoT DL shared channel, UE DL object and PHY examples 5 years ago
Xavier Arteaga 5b7493cab5 Added 256QAM modulation tables to scheduler 5 years ago
Xavier Arteaga 784bf81a1a Multiple fixes HARQ ACK/NACK feedback and CSI reporting for MIMO and CA 5 years ago
Tiago Alves 47145c18b7 sidelink: refactor channel estimation 5 years ago
Xavier Arteaga 2c93f6d20a Fix PUCCH DMRS correlation 5 years ago
Xavier Arteaga f3f03ad12d SRSUE PHY: Add extra debugging information to errors 5 years ago
Xavier Arteaga 0408d357a7 Minor fixes 5 years ago
Ismael Gomez 73447972d8
Fix issue with simultaneous CQI and ACK/NACK transmission in CA (#1067) 
* Fix memory corruption when phy calling mac scheduler and not yet initiated

* Do not drop CQI if collision with ACK/NACK and PUSCH

* Allocate CQI resources for SCell properly

* Use UE_PCELL_CC_IDX macro

* Protect ul_sched from being called if not yet started
 5 years ago
Xavier Arteaga e832769ae6 Updated copyright 5 years ago
Xavier Arteaga 834a081c09 Add EPRE measurement to PUSCH decoder 5 years ago
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 5 years ago
Francisco Paisana 639f473042 fixed unsigned signed comparison 5 years ago
Francisco Paisana 1e63fa41cf made ue_cc_idx int to set to -1 for rar and bc allocs 5 years ago
Francisco Paisana f3c3c52fcd added ue_cc_idx to dci allocation 5 years ago
Xavier Arteaga 002a68e183 SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold 5 years ago
Xavier Arteaga 64caa4321b Fix UL control decoding. Some minor aesthetic changes. 5 years ago
Xavier Arteaga a968fb02d3 Increase PUCCH correlatiion threasholds 5 years ago
Xavier Arteaga da701cd82b SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup. 5 years ago
Xavier Arteaga 47cbbcbd57 Improve PUSCH UCI decoder 5 years ago
Francisco Paisana a6320f93b8 remove remaining const_casts 5 years ago
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 5 years ago
Andre Puschmann e4b5fa122f add set_cell() call to PSCCH and allocate for max PRB in pscch_init() 5 years ago
Andre Puschmann 09f7355870 use srslte_cell_sl_t in PSCCH 5 years ago
Andre Puschmann 14000f7ae7 adding phy_common_sl.{c,h} 5 years ago
Tiago Alves cabd9ae742 baseline implementation of pscch 5 years ago
Xavier Arteaga a4135e41a5 Added PUCCH collision checker 5 years ago
Xavier Arteaga 2fc0832f05 Addition of DL HARQ-ACK generation procedure for eNb DL and minor aesthetic changes 5 years ago
Xavier Arteaga e621853566 Minor aesthetics changes 5 years ago
Xavier Arteaga f261365c91 Initial EVM calculation commit and other easthetic changes 5 years ago
Pedro Alvarez aecfb151ce Apply clang-format to the lib in preperation for PR. 5 years ago
Ismael Gomez d8d10daebe
Fix bug in SRS using the previous grant to compute collision with PUSCH (#958) 5 years ago
Xavier Arteaga 67c07dfb56 Moved UL/DL PUCCH procedures into pucch_proc 5 years ago
Xavier Arteaga 5dbc96458a Sets PUCCH decode threshold as macro 5 years ago
Xavier Arteaga bc10943a2b Added get max TB from DCI format 5 years ago
Xavier Arteaga 231431f569 SRSENB: enabled CA PUCCH decode in eNb 5 years ago
Xavier Arteaga d66fdefbb3 Added more docs to PUCCH 1b CS resource selection 5 years ago
Xavier Arteaga 1f762844ee Initial PUCCH format 3 decoder 5 years ago
Xavier Arteaga 35f4e5d69a Initial PUCCH 1B with channel selection 5 years ago
Andre Puschmann 81b46723f6 adding NPDCCH 5 years ago
Andre Puschmann d98bc71057 fix PSBCH and use UL-SCH interleaver 5 years ago
Andre Puschmann 2e7a357226 expose UL-SCH interleaver to use in Sidelink 5 years ago
Xavier Arteaga 0912701cb0 srsLTE: sidelink minor corrections 5 years ago
Andre Puschmann 7de51c8236 refactor Sidelink PSBCH and DMRS code 5 years ago
Tiago Ferreira Alves 3fed21ce3e PSSS and SSSS implementation 5 years ago
Andre Puschmann 476f970ee1 replace FIXME with TODO 5 years ago