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apply separate cqi configurations to scells

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master
Francisco Paisana 5 years ago committed by Xavier Arteaga
parent d5f0ad9f35
commit fe8f8be62d
9 changed files with 112 additions and 37 deletions
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18
lib/include/srslte/interfaces/sched_interface.h
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@ -131,17 +131,17 @@ public:
struct ue_cfg_t {
struct cc_cfg_t {
bool active = false;
uint32_t enb_cc_idx = 0; ///< eNB CC index
bool active = false;
uint32_t enb_cc_idx = 0; ///< eNB CC index
srslte_dl_cfg_t dl_cfg = {};
uint32_t aperiodic_cqi_period = 0; // if 0 is periodic CQI
};
/* ue capabilities, etc */
uint32_t maxharq_tx = 5;
bool continuous_pusch = false;
srslte_uci_offset_cfg_t uci_offset = {};
srslte_pucch_cfg_t pucch_cfg = {};
uint32_t aperiodic_cqi_period = 0; // if 0 is periodic CQI
srslte_dl_cfg_t dl_cfg;
std::array<ue_bearer_cfg_t, MAX_LC> ue_bearers = {};
uint32_t maxharq_tx = 5;
bool continuous_pusch = false;
srslte_uci_offset_cfg_t uci_offset = {};
srslte_pucch_cfg_t pucch_cfg = {};
std::array<ue_bearer_cfg_t, MAX_LC> ue_bearers = {};
std::vector<cc_cfg_t> supported_cc_list; ///< list of UE supported CCs. First index for PCell
ant_info_ded_t dl_ant_info;
bool use_tbs_index_alt = false;

4
srsenb/hdr/stack/rrc/mac_controller.h
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@ -50,6 +50,7 @@ private:
int apply_basic_conn_cfg(const asn1::rrc::rr_cfg_ded_s& rr_cfg);
void apply_current_bearers_cfg();
void apply_phy_cfg_updates_common(const asn1::rrc::phys_cfg_ded_s& phy_cfg);
void apply_scell_cfg_updates(uint32_t ue_cc_idx);
srslte::log_ref log_h;
rrc_cfg_t* rrc_cfg = nullptr;
@ -57,6 +58,9 @@ private:
mac_interface_rrc* mac = nullptr;
sched_interface::ue_cfg_t current_sched_ue_cfg = {};
bool crnti_set = false;
// pending changes
std::unique_ptr<asn1::rrc::scell_to_add_mod_list_r10_l> pending_scells_cfg;
};
} // namespace srsenb

2
srsenb/src/stack/mac/mac.cc
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@ -480,7 +480,7 @@ void mac::rach_detected(uint32_t tti, uint32_t enb_cc_idx, uint32_t preamble_idx
ue_cfg.supported_cc_list.back().active = true;
ue_cfg.supported_cc_list.back().enb_cc_idx = enb_cc_idx;
ue_cfg.ue_bearers[0].direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
ue_cfg.dl_cfg.tm = SRSLTE_TM1;
ue_cfg.supported_cc_list[0].dl_cfg.tm = SRSLTE_TM1;
if (scheduler.ue_cfg(rnti, ue_cfg) != SRSLTE_SUCCESS) {
Error("Registering new user rnti=0x%x to SCHED\n", rnti);
return;

15
srsenb/src/stack/mac/scheduler_grid.cc
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@ -733,6 +733,18 @@ std::pair<alloc_outcome_t, uint32_t> sf_sched::alloc_rar(uint32_t aggr_lvl, cons
return ret;
}
bool is_periodic_cqi_expected(const sched_interface::ue_cfg_t& ue_cfg, uint32_t tti_tx_ul)
{
for (const sched_interface::ue_cfg_t::cc_cfg_t& cc : ue_cfg.supported_cc_list) {
if (cc.dl_cfg.cqi_report.periodic_configured) {
if (srslte_cqi_periodic_send(&cc.dl_cfg.cqi_report, tti_tx_ul, SRSLTE_FDD)) {
return true;
}
}
}
return false;
}
alloc_outcome_t sf_sched::alloc_dl_user(sched_ue* user, const rbgmask_t& user_mask, uint32_t pid)
{
if (is_dl_alloc(user)) {
@ -755,8 +767,7 @@ alloc_outcome_t sf_sched::alloc_dl_user(sched_ue* user, const rbgmask_t& user_ma
// Check if there is space in the PUCCH for HARQ ACKs
const sched_interface::ue_cfg_t& ue_cfg = user->get_ue_cfg();
bool has_scells = ue_cfg.supported_cc_list.size() > 1;
const srslte_cqi_report_cfg_t& cqi_report = ue_cfg.dl_cfg.cqi_report;
if (has_scells and srslte_cqi_periodic_send(&cqi_report, get_tti_tx_ul(), SRSLTE_FDD)) {
if (has_scells and is_periodic_cqi_expected(ue_cfg, get_tti_tx_ul())) {
bool has_pusch_grant = is_ul_alloc(user) or cc_results->is_ul_alloc(user->get_rnti());
if (not has_pusch_grant) {
// Try to allocate small PUSCH grant, if there are no allocated PUSCH grants for this TTI yet

4
srsenb/src/stack/mac/scheduler_ue.cc
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@ -752,9 +752,9 @@ bool sched_ue::needs_cqi(uint32_t tti, uint32_t cc_idx, bool will_be_sent)
bool sched_ue::needs_cqi_unlocked(uint32_t tti, uint32_t cc_idx, bool will_be_sent)
{
bool ret = false;
if (phy_config_dedicated_enabled && cfg.aperiodic_cqi_period && get_pending_dl_new_data() > 0) {
if (phy_config_dedicated_enabled && cfg.supported_cc_list[0].aperiodic_cqi_period && get_pending_dl_new_data() > 0) {
uint32_t interval = srslte_tti_interval(tti, carriers[cc_idx].dl_cqi_tti);
bool needscqi = interval >= cfg.aperiodic_cqi_period;
bool needscqi = interval >= cfg.supported_cc_list[0].aperiodic_cqi_period;
if (needscqi) {
uint32_t interval_sent = srslte_tti_interval(tti, cqi_request_tti);
if (interval_sent >= 16) {

76
srsenb/src/stack/rrc/mac_controller.cc
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@ -93,7 +93,7 @@ int rrc::ue::mac_controller::apply_basic_conn_cfg(const asn1::rrc::rr_cfg_ded_s&
current_sched_ue_cfg.ue_bearers[1].direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
// Set basic antenna configuration
current_sched_ue_cfg.dl_cfg.tm = SRSLTE_TM1;
current_sched_ue_cfg.supported_cc_list[0].dl_cfg.tm = SRSLTE_TM1;
// Apply common PhyConfig updates (e.g. SR/CQI resources, antenna cfg)
if (rr_cfg.phys_cfg_ded_present) {
@ -132,6 +132,14 @@ void rrc::ue::mac_controller::handle_con_reconf(const asn1::rrc::rrc_conn_recfg_
apply_phy_cfg_updates_common(conn_recfg.rr_cfg_ded.phys_cfg_ded);
}
// Store Scells Configuration
if (conn_recfg.non_crit_ext_present and conn_recfg.non_crit_ext.non_crit_ext_present and
conn_recfg.non_crit_ext.non_crit_ext.non_crit_ext_present and
conn_recfg.non_crit_ext.non_crit_ext.non_crit_ext.scell_to_add_mod_list_r10_present) {
pending_scells_cfg.reset(new asn1::rrc::scell_to_add_mod_list_r10_l{
conn_recfg.non_crit_ext.non_crit_ext.non_crit_ext.scell_to_add_mod_list_r10});
}
if (conn_recfg.mob_ctrl_info_present) {
// Handover Command
handle_con_reconf_with_mobility();
@ -154,6 +162,9 @@ void rrc::ue::mac_controller::handle_con_reconf_complete()
}
list[ue_cc_idx].active = true;
list[ue_cc_idx].enb_cc_idx = ue_cell.cell_common->enb_cc_idx;
if (ue_cc_idx > 0) {
apply_scell_cfg_updates(ue_cc_idx);
}
}
// Setup all bearers
@ -212,15 +223,16 @@ void rrc::ue::mac_controller::apply_phy_cfg_updates_common(const asn1::rrc::phys
}
// Apply CQI config
auto& pcell_cfg = current_sched_ue_cfg.supported_cc_list[0];
if (phy_cfg.cqi_report_cfg_present) {
if (phy_cfg.cqi_report_cfg.cqi_report_periodic_present) {
auto& cqi_cfg = phy_cfg.cqi_report_cfg.cqi_report_periodic.setup();
current_sched_ue_cfg.dl_cfg.cqi_report.pmi_idx = cqi_cfg.cqi_pmi_cfg_idx;
current_sched_ue_cfg.pucch_cfg.n_pucch = cqi_cfg.cqi_pucch_res_idx;
current_sched_ue_cfg.dl_cfg.cqi_report.periodic_configured = true;
auto& cqi_cfg = phy_cfg.cqi_report_cfg.cqi_report_periodic.setup();
current_sched_ue_cfg.pucch_cfg.n_pucch = cqi_cfg.cqi_pucch_res_idx;
pcell_cfg.dl_cfg.cqi_report.pmi_idx = cqi_cfg.cqi_pmi_cfg_idx;
pcell_cfg.dl_cfg.cqi_report.periodic_configured = true;
} else if (phy_cfg.cqi_report_cfg.cqi_report_mode_aperiodic_present) {
current_sched_ue_cfg.aperiodic_cqi_period = rrc_cfg->cqi_cfg.period;
current_sched_ue_cfg.dl_cfg.cqi_report.aperiodic_configured = true;
pcell_cfg.aperiodic_cqi_period = rrc_cfg->cqi_cfg.period;
pcell_cfg.dl_cfg.cqi_report.aperiodic_configured = true;
}
}
@ -236,10 +248,58 @@ void rrc::ue::mac_controller::apply_phy_cfg_updates_common(const asn1::rrc::phys
current_sched_ue_cfg.dl_ant_info = srslte::make_ant_info_ded(phy_cfg.ant_info.explicit_value());
} else {
log_h->warning("No antenna configuration provided\n");
current_sched_ue_cfg.dl_cfg.tm = SRSLTE_TM1;
pcell_cfg.dl_cfg.tm = SRSLTE_TM1;
current_sched_ue_cfg.dl_ant_info.tx_mode = sched_interface::ant_info_ded_t::tx_mode_t::tm1;
}
}
}
void rrc::ue::mac_controller::apply_scell_cfg_updates(uint32_t ue_cc_idx)
{
if (pending_scells_cfg == nullptr) {
return;
}
// Check if SCell ue_cc_idx is configured in this message
auto it = std::find_if(
pending_scells_cfg->begin(),
pending_scells_cfg->end(),
[&ue_cc_idx](const asn1::rrc::scell_to_add_mod_r10_s& scell) { return scell.scell_idx_r10 == ue_cc_idx; });
if (it == pending_scells_cfg->end()) {
return;
}
asn1::rrc::scell_to_add_mod_r10_s& asn1_scell = *it;
sched_interface::ue_cfg_t::cc_cfg_t& scell_cfg = current_sched_ue_cfg.supported_cc_list[ue_cc_idx];
if (asn1_scell.rr_cfg_ded_scell_r10_present) {
if (asn1_scell.rr_cfg_ded_scell_r10.phys_cfg_ded_scell_r10_present) {
if (asn1_scell.rr_cfg_ded_scell_r10.phys_cfg_ded_scell_r10.ul_cfg_r10_present) {
auto& ul_cfg = asn1_scell.rr_cfg_ded_scell_r10.phys_cfg_ded_scell_r10.ul_cfg_r10;
// Set CQI Config
if (ul_cfg.cqi_report_cfg_scell_r10_present) {
if (ul_cfg.cqi_report_cfg_scell_r10.cqi_report_periodic_scell_r10_present and
ul_cfg.cqi_report_cfg_scell_r10.cqi_report_periodic_scell_r10.type().value == setup_opts::setup) {
// periodic CQI
auto& periodic = ul_cfg.cqi_report_cfg_scell_r10.cqi_report_periodic_scell_r10.setup();
scell_cfg.dl_cfg.cqi_report.periodic_configured = true;
scell_cfg.dl_cfg.cqi_report.pmi_idx = periodic.cqi_pmi_cfg_idx;
} else if (ul_cfg.cqi_report_cfg_scell_r10.cqi_report_mode_aperiodic_r10_present) {
// aperiodic CQI
scell_cfg.dl_cfg.cqi_report.aperiodic_configured =
ul_cfg.cqi_report_cfg_scell_r10.cqi_report_mode_aperiodic_r10_present;
scell_cfg.aperiodic_cqi_period = ul_cfg.cqi_report_cfg_scell_r10.cqi_report_mode_aperiodic_r10.to_number();
} else {
log_h->error("Invalid Scell %d CQI configuration\n", ue_cc_idx);
}
}
}
}
}
pending_scells_cfg.reset();
}
} // namespace srsenb

8
srsenb/test/mac/scheduler_ca_test.cc
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@ -112,10 +112,10 @@ int test_scell_activation(test_scell_activation_params params)
sim_args.sim_log = log_global.get();
sim_args.start_tti = start_tti;
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list.resize(1);
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].active = true;
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].enb_cc_idx = cc_idxs[0];
sim_args.default_ue_sim_cfg.ue_cfg.dl_cfg.cqi_report.periodic_configured = true;
sim_args.default_ue_sim_cfg.ue_cfg.dl_cfg.cqi_report.pmi_idx = 0;
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].active = true;
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].enb_cc_idx = cc_idxs[0];
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].dl_cfg.cqi_report.periodic_configured = true;
sim_args.default_ue_sim_cfg.ue_cfg.supported_cc_list[0].dl_cfg.cqi_report.pmi_idx = 0;
/* Simulation Objects Setup */
sched_sim_event_generator generator;

20
srsenb/test/mac/scheduler_test_utils.h
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@ -65,13 +65,13 @@ inline srsenb::sched_interface::ue_cfg_t generate_default_ue_cfg()
{
srsenb::sched_interface::ue_cfg_t ue_cfg = {};
ue_cfg.aperiodic_cqi_period = 40;
ue_cfg.maxharq_tx = 5;
ue_cfg.dl_cfg.tm = SRSLTE_TM1;
ue_cfg.maxharq_tx = 5;
ue_cfg.supported_cc_list.resize(1);
ue_cfg.supported_cc_list[0].enb_cc_idx = 0;
ue_cfg.supported_cc_list[0].active = true;
ue_cfg.ue_bearers[0].direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
ue_cfg.supported_cc_list[0].aperiodic_cqi_period = 40;
ue_cfg.supported_cc_list[0].enb_cc_idx = 0;
ue_cfg.supported_cc_list[0].active = true;
ue_cfg.supported_cc_list[0].dl_cfg.tm = SRSLTE_TM1;
ue_cfg.ue_bearers[0].direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
return ue_cfg;
}
@ -104,12 +104,12 @@ inline srsenb::sched_interface::ue_cfg_t generate_setup_ue_cfg(const srsenb::sch
cfg.maxharq_tx = final_cfg.maxharq_tx;
cfg.ue_bearers[srsenb::RB_ID_SRB1].direction = srsenb::sched_interface::ue_bearer_cfg_t::BOTH;
cfg.dl_cfg.tm = SRSLTE_TM1;
cfg.supported_cc_list[0].dl_cfg.tm = SRSLTE_TM1;
cfg.continuous_pusch = final_cfg.continuous_pusch;
cfg.dl_cfg.cqi_report = final_cfg.dl_cfg.cqi_report;
cfg.pucch_cfg = final_cfg.pucch_cfg;
cfg.aperiodic_cqi_period = final_cfg.aperiodic_cqi_period;
cfg.supported_cc_list[0].dl_cfg.cqi_report = final_cfg.supported_cc_list[0].dl_cfg.cqi_report;
cfg.pucch_cfg = final_cfg.pucch_cfg;
cfg.supported_cc_list[0].aperiodic_cqi_period = final_cfg.supported_cc_list[0].aperiodic_cqi_period;
return cfg;
}

2
srsenb/test/upper/rrc_mobility_test.cc
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@ -530,7 +530,7 @@ int test_intraenb_mobility(mobility_test_params test_params)
TESTASSERT(ue_cfg.pucch_cfg.sr_configured);
TESTASSERT(ue_cfg.pucch_cfg.n_pucch_sr == phy_cfg_ded.sched_request_cfg.setup().sr_pucch_res_idx);
TESTASSERT(ue_cfg.pucch_cfg.I_sr == phy_cfg_ded.sched_request_cfg.setup().sr_cfg_idx);
TESTASSERT(ue_cfg.dl_cfg.cqi_report.pmi_idx ==
TESTASSERT(ue_cfg.supported_cc_list[0].dl_cfg.cqi_report.pmi_idx ==
phy_cfg_ded.cqi_report_cfg.cqi_report_periodic.setup().cqi_pmi_cfg_idx);
TESTASSERT(ue_cfg.pucch_cfg.n_pucch == phy_cfg_ded.cqi_report_cfg.cqi_report_periodic.setup().cqi_pucch_res_idx);

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