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srsRAN_4G
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Added new rrc_nr to phy flattening functions and fixes

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master
David Rupprecht 4 years ago committed by Xavier Arteaga
parent 635db8dde1
commit fe8727050b
7 changed files with 560 additions and 9 deletions
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4
lib/include/srsran/asn1/rrc_nr_utils.h
Unescape Escape View File

@ -48,6 +48,8 @@ struct sched_request_res_cfg_s;
struct dmrs_ul_cfg_s;
struct beta_offsets_s;
struct uci_on_pusch_s;
struct zp_csi_rs_res_s;
struct nzp_csi_rs_res_s;
} // namespace rrc_nr
} // namespace asn1
@ -88,6 +90,8 @@ bool make_phy_dmrs_additional_pos(const asn1::rrc_nr::dmrs_ul_cfg_s& dmrs_ul_cfg
bool make_phy_beta_offsets(const asn1::rrc_nr::beta_offsets_s& beta_offsets,
srsran_beta_offsets_t* srsran_beta_offsets);
bool make_phy_pusch_scaling(const asn1::rrc_nr::uci_on_pusch_s& uci_on_pusch, float* scaling);
bool make_phy_zp_csi_rs_resource(const asn1::rrc_nr::zp_csi_rs_res_s & zp_csi_rs_res, srsran_csi_rs_zp_resource_t* zp_csi_rs_resource);
bool make_phy_nzp_csi_rs_resource(const asn1::rrc_nr::nzp_csi_rs_res_s & nzp_csi_rs_res, srsran_csi_rs_nzp_resource_t* csi_rs_nzp_resource);
/***************************
* MAC Config
**************************/

2
lib/include/srsran/phy/ch_estimation/csi_rs_cfg.h
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@ -94,6 +94,7 @@ typedef struct SRSRAN_API {
* @brief Contains TS 38.331 NZP-CSI-RS-Resource flattened configuration
*/
typedef struct SRSRAN_API {
uint32_t id;
srsran_csi_rs_resource_mapping_t resource_mapping; ///< CSI-RS time/frequency mapping
float power_control_offset; ///< -8..15 dB
float power_control_offset_ss; ///< -3, 0, 3, 6 dB
@ -114,6 +115,7 @@ typedef struct SRSRAN_API {
* @brief Contains TS 38.331 ZP-CSI-RS-Resource flattened configuration
*/
typedef struct {
uint32_t id;
srsran_csi_rs_resource_mapping_t resource_mapping; ///< CSI-RS time/frequency mapping
srsran_csi_rs_period_and_offset_t periodicity;
} srsran_csi_rs_zp_resource_t;

1
lib/include/srsran/phy/common/phy_common_nr.h
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@ -310,7 +310,6 @@ typedef struct SRSRAN_API {
*/
typedef struct SRSRAN_API {
uint32_t id;
uint32_t coreset_id;
srsran_coreset_mapping_type_t mapping_type;
uint32_t duration;
bool freq_resources[SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE];

337
lib/src/asn1/rrc_nr_utils.cc
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@ -564,8 +564,7 @@ bool make_phy_csi_report(const csi_report_cfg_s& csi_report_cfg,
bool make_phy_coreset_cfg(const ctrl_res_set_s& ctrl_res_set, srsran_coreset_t* in_srsran_coreset)
{
srsran_coreset_t srsran_coreset = {};
srsran_coreset.coreset_id = ctrl_res_set.ctrl_res_set_id;
srsran_coreset.id = ctrl_res_set.ctrl_res_set_id;
switch (ctrl_res_set.precoder_granularity) {
case ctrl_res_set_s::precoder_granularity_opts::same_as_reg_bundle:
srsran_coreset.precoder_granularity = srsran_coreset_precoder_granularity_reg_bundle;
@ -576,6 +575,18 @@ bool make_phy_coreset_cfg(const ctrl_res_set_s& ctrl_res_set, srsran_coreset_t*
asn1::log_warning("Invalid option for precoder_granularity %s", ctrl_res_set.precoder_granularity.to_string());
return false;
};
switch (ctrl_res_set.cce_reg_map_type.type()) {
case ctrl_res_set_s::cce_reg_map_type_c_::types_opts::options::interleaved:
srsran_coreset.mapping_type = srsran_coreset_mapping_type_interleaved;
break;
case ctrl_res_set_s::cce_reg_map_type_c_::types_opts::options::non_interleaved:
srsran_coreset.mapping_type = srsran_coreset_mapping_type_non_interleaved;
break;
default:
asn1::log_warning("Invalid option for cce_reg_map_type: %s", ctrl_res_set.cce_reg_map_type.type().to_string());
return false;
}
srsran_coreset.duration = ctrl_res_set.dur;
for (uint32_t i = 0; i < SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE; i++) {
srsran_coreset.freq_resources[i] = ctrl_res_set.freq_domain_res.get(SRSRAN_CORESET_FREQ_DOMAIN_RES_SIZE - 1 - i);
@ -828,6 +839,328 @@ bool make_phy_pusch_scaling(const uci_on_pusch_s& uci_on_pusch, float* in_scalin
return true;
}
bool make_phy_zp_csi_rs_resource(const asn1::rrc_nr::zp_csi_rs_res_s& zp_csi_rs_res,
srsran_csi_rs_zp_resource_t* out_zp_csi_rs_resource)
{
srsran_csi_rs_zp_resource_t zp_csi_rs_resource;
zp_csi_rs_resource.id = zp_csi_rs_res.zp_csi_rs_res_id;
switch (zp_csi_rs_res.res_map.freq_domain_alloc.type()) {
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row1:
zp_csi_rs_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_1;
for (uint32_t i = 0; i < zp_csi_rs_res.res_map.freq_domain_alloc.row1().length(); i++) {
zp_csi_rs_resource.resource_mapping.frequency_domain_alloc[i] =
zp_csi_rs_res.res_map.freq_domain_alloc.row1().get(zp_csi_rs_res.res_map.freq_domain_alloc.row1().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row2:
zp_csi_rs_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_2;
for (uint32_t i = 0; i < zp_csi_rs_res.res_map.freq_domain_alloc.row2().length(); i++) {
zp_csi_rs_resource.resource_mapping.frequency_domain_alloc[i] =
zp_csi_rs_res.res_map.freq_domain_alloc.row2().get(zp_csi_rs_res.res_map.freq_domain_alloc.row2().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row4:
zp_csi_rs_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_4;
for (uint32_t i = 0; i < zp_csi_rs_res.res_map.freq_domain_alloc.row4().length(); i++) {
zp_csi_rs_resource.resource_mapping.frequency_domain_alloc[i] =
zp_csi_rs_res.res_map.freq_domain_alloc.row4().get(zp_csi_rs_res.res_map.freq_domain_alloc.row4().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::other:
zp_csi_rs_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_other;
break;
default:
asn1::log_warning("Invalid option for freq_domain_alloc %s",
zp_csi_rs_res.res_map.freq_domain_alloc.type().to_string());
return false;
}
zp_csi_rs_resource.resource_mapping.nof_ports = zp_csi_rs_res.res_map.nrof_ports.to_number();
zp_csi_rs_resource.resource_mapping.first_symbol_idx = zp_csi_rs_res.res_map.first_ofdm_symbol_in_time_domain;
switch (zp_csi_rs_res.res_map.cdm_type) {
case csi_rs_res_map_s::cdm_type_opts::options::no_cdm:
zp_csi_rs_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_nocdm;
break;
case csi_rs_res_map_s::cdm_type_opts::options::fd_cdm2:
zp_csi_rs_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_fd_cdm2;
break;
case csi_rs_res_map_s::cdm_type_opts::options::cdm4_fd2_td2:
zp_csi_rs_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_cdm4_fd2_td2;
break;
case csi_rs_res_map_s::cdm_type_opts::options::cdm8_fd2_td4:
zp_csi_rs_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_cdm8_fd2_td4;
break;
default:
asn1::log_warning("Invalid option for cdm_type %s", zp_csi_rs_res.res_map.cdm_type.to_string());
return false;
}
switch (zp_csi_rs_res.res_map.density.type()) {
case csi_rs_res_map_s::density_c_::types_opts::options::dot5:
switch (zp_csi_rs_res.res_map.density.dot5()) {
case csi_rs_res_map_s::density_c_::dot5_opts::options::even_prbs:
zp_csi_rs_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_dot5_even;
break;
case csi_rs_res_map_s::density_c_::dot5_opts::options::odd_prbs:
zp_csi_rs_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_dot5_odd;
break;
default:
asn1::log_warning("Invalid option for dot5 %s", zp_csi_rs_res.res_map.density.dot5().to_string());
return false;
}
break;
case csi_rs_res_map_s::density_c_::types_opts::options::one:
zp_csi_rs_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_one;
break;
case csi_rs_res_map_s::density_c_::types_opts::options::three:
zp_csi_rs_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_three;
break;
case csi_rs_res_map_s::density_c_::types_opts::options::spare:
zp_csi_rs_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_spare;
break;
default:
asn1::log_warning("Invalid option for density %s", zp_csi_rs_res.res_map.density.type().to_string());
return false;
}
zp_csi_rs_resource.resource_mapping.freq_band.nof_rb = zp_csi_rs_res.res_map.freq_band.nrof_rbs;
zp_csi_rs_resource.resource_mapping.freq_band.start_rb = zp_csi_rs_res.res_map.freq_band.start_rb;
if(zp_csi_rs_res.periodicity_and_offset_present){
switch (zp_csi_rs_res.periodicity_and_offset.type())
{
case csi_res_periodicity_and_offset_c::types_opts::options::slots4:
zp_csi_rs_resource.periodicity.period = 4;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots4();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots5:
zp_csi_rs_resource.periodicity.period = 5;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots5();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots8:
zp_csi_rs_resource.periodicity.period = 8;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots8();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots10:
zp_csi_rs_resource.periodicity.period = 10;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots10();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots16:
zp_csi_rs_resource.periodicity.period = 16;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots16();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots20:
zp_csi_rs_resource.periodicity.period = 20;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots20();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots32:
zp_csi_rs_resource.periodicity.period = 32;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots32();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots40:
zp_csi_rs_resource.periodicity.period = 40;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots40();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots64:
zp_csi_rs_resource.periodicity.period = 64;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots64();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots80:
zp_csi_rs_resource.periodicity.period = 80;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots80();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots160:
zp_csi_rs_resource.periodicity.period = 160;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots160();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots320:
zp_csi_rs_resource.periodicity.period = 320;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots320();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots640:
zp_csi_rs_resource.periodicity.period = 640;
zp_csi_rs_resource.periodicity.offset = zp_csi_rs_res.periodicity_and_offset.slots640();
break;
default:
asn1::log_warning("Invalid option for periodicity_and_offset %s",
zp_csi_rs_res.periodicity_and_offset.type().to_string());
return false;
}
} else {
asn1::log_warning("Option periodicity_and_offset not present");
return false;
}
*out_zp_csi_rs_resource = zp_csi_rs_resource;
return true;
}
bool make_phy_nzp_csi_rs_resource(const asn1::rrc_nr::nzp_csi_rs_res_s& asn1_nzp_csi_rs_res,
srsran_csi_rs_nzp_resource_t* out_csi_rs_nzp_resource)
{
srsran_csi_rs_nzp_resource_t csi_rs_nzp_resource;
csi_rs_nzp_resource.id = asn1_nzp_csi_rs_res.nzp_csi_rs_res_id;
switch (asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.type()) {
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row1:
csi_rs_nzp_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_1;
for (uint32_t i = 0; i < asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row1().length(); i++) {
csi_rs_nzp_resource.resource_mapping.frequency_domain_alloc[i] =
asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row1().get(asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row1().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row2:
csi_rs_nzp_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_2;
for (uint32_t i = 0; i < asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row2().length(); i++) {
csi_rs_nzp_resource.resource_mapping.frequency_domain_alloc[i] =
asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row2().get(asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row2().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::row4:
csi_rs_nzp_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_4;
for (uint32_t i = 0; i < asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row4().length(); i++) {
csi_rs_nzp_resource.resource_mapping.frequency_domain_alloc[i] =
asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row4().get(asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.row4().length() -
1 - i);
}
break;
case csi_rs_res_map_s::freq_domain_alloc_c_::types_opts::options::other:
csi_rs_nzp_resource.resource_mapping.row = srsran_csi_rs_resource_mapping_row_other;
break;
default:
asn1::log_warning("Invalid option for freq_domain_alloc %s",
asn1_nzp_csi_rs_res.res_map.freq_domain_alloc.type().to_string());
return false;
}
csi_rs_nzp_resource.resource_mapping.nof_ports = asn1_nzp_csi_rs_res.res_map.nrof_ports.to_number();
csi_rs_nzp_resource.resource_mapping.first_symbol_idx = asn1_nzp_csi_rs_res.res_map.first_ofdm_symbol_in_time_domain;
switch (asn1_nzp_csi_rs_res.res_map.cdm_type) {
case csi_rs_res_map_s::cdm_type_opts::options::no_cdm:
csi_rs_nzp_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_nocdm;
break;
case csi_rs_res_map_s::cdm_type_opts::options::fd_cdm2:
csi_rs_nzp_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_fd_cdm2;
break;
case csi_rs_res_map_s::cdm_type_opts::options::cdm4_fd2_td2:
csi_rs_nzp_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_cdm4_fd2_td2;
break;
case csi_rs_res_map_s::cdm_type_opts::options::cdm8_fd2_td4:
csi_rs_nzp_resource.resource_mapping.cdm = srsran_csi_rs_cdm_t::srsran_csi_rs_cdm_cdm8_fd2_td4;
break;
default:
asn1::log_warning("Invalid option for cdm_type %s", asn1_nzp_csi_rs_res.res_map.cdm_type.to_string());
return false;
}
switch (asn1_nzp_csi_rs_res.res_map.density.type()) {
case csi_rs_res_map_s::density_c_::types_opts::options::dot5:
switch (asn1_nzp_csi_rs_res.res_map.density.dot5()) {
case csi_rs_res_map_s::density_c_::dot5_opts::options::even_prbs:
csi_rs_nzp_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_dot5_even;
break;
case csi_rs_res_map_s::density_c_::dot5_opts::options::odd_prbs:
csi_rs_nzp_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_dot5_odd;
break;
default:
asn1::log_warning("Invalid option for dot5 %s", asn1_nzp_csi_rs_res.res_map.density.dot5().to_string());
return false;
}
break;
case csi_rs_res_map_s::density_c_::types_opts::options::one:
csi_rs_nzp_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_one;
break;
case csi_rs_res_map_s::density_c_::types_opts::options::three:
csi_rs_nzp_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_three;
break;
case csi_rs_res_map_s::density_c_::types_opts::options::spare:
csi_rs_nzp_resource.resource_mapping.density = srsran_csi_rs_resource_mapping_density_spare;
break;
default:
asn1::log_warning("Invalid option for density %s", asn1_nzp_csi_rs_res.res_map.density.type().to_string());
return false;
}
csi_rs_nzp_resource.resource_mapping.freq_band.nof_rb = asn1_nzp_csi_rs_res.res_map.freq_band.nrof_rbs;
csi_rs_nzp_resource.resource_mapping.freq_band.start_rb = asn1_nzp_csi_rs_res.res_map.freq_band.start_rb;
csi_rs_nzp_resource.power_control_offset = asn1_nzp_csi_rs_res.pwr_ctrl_offset;
if (asn1_nzp_csi_rs_res.pwr_ctrl_offset_ss_present) {
csi_rs_nzp_resource.power_control_offset_ss = asn1_nzp_csi_rs_res.pwr_ctrl_offset_ss.to_number();
}
if(asn1_nzp_csi_rs_res.periodicity_and_offset_present){
switch (asn1_nzp_csi_rs_res.periodicity_and_offset.type())
{
case csi_res_periodicity_and_offset_c::types_opts::options::slots4:
csi_rs_nzp_resource.periodicity.period = 4;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots4();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots5:
csi_rs_nzp_resource.periodicity.period = 5;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots5();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots8:
csi_rs_nzp_resource.periodicity.period = 8;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots8();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots10:
csi_rs_nzp_resource.periodicity.period = 10;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots10();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots16:
csi_rs_nzp_resource.periodicity.period = 16;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots16();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots20:
csi_rs_nzp_resource.periodicity.period = 20;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots20();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots32:
csi_rs_nzp_resource.periodicity.period = 32;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots32();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots40:
csi_rs_nzp_resource.periodicity.period = 40;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots40();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots64:
csi_rs_nzp_resource.periodicity.period = 64;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots64();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots80:
csi_rs_nzp_resource.periodicity.period = 80;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots80();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots160:
csi_rs_nzp_resource.periodicity.period = 160;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots160();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots320:
csi_rs_nzp_resource.periodicity.period = 320;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots320();
break;
case csi_res_periodicity_and_offset_c::types_opts::options::slots640:
csi_rs_nzp_resource.periodicity.period = 640;
csi_rs_nzp_resource.periodicity.offset = asn1_nzp_csi_rs_res.periodicity_and_offset.slots640();
break;
default:
asn1::log_warning("Invalid option for periodicity_and_offset %s",
asn1_nzp_csi_rs_res.periodicity_and_offset.type().to_string());
return false;
}
} else {
asn1::log_warning("Option periodicity_and_offset not present");
return false;
}
csi_rs_nzp_resource.scrambling_id = asn1_nzp_csi_rs_res.scrambling_id;
*out_csi_rs_nzp_resource = csi_rs_nzp_resource;
return true;
}
} // namespace srsran
namespace srsenb {

126
lib/test/asn1/rrc_nr_utils_test.cc
Unescape Escape View File

@ -126,7 +126,7 @@ int make_phy_coreset_cfg_test()
srsran_coreset_t srsran_coreset;
TESTASSERT(make_phy_coreset_cfg(ctrl_res_set, &srsran_coreset) == true);
TESTASSERT(srsran_coreset.coreset_id == 1);
TESTASSERT(srsran_coreset.id == 1);
TESTASSERT(srsran_coreset.precoder_granularity == srsran_coreset_precoder_granularity_reg_bundle);
TESTASSERT(srsran_coreset.duration == 1);
TESTASSERT(srsran_coreset.mapping_type == srsran_coreset_mapping_type_non_interleaved);
@ -546,6 +546,127 @@ int make_phy_pusch_scaling_test()
return SRSRAN_SUCCESS;
}
int make_phy_zp_csi_rs_resource_test()
{
srsran_csi_rs_zp_resource_t zp_csi_rs_resource0 = {};
// Item 0
// ZP-CSI-RS-Resource
// zp-CSI-RS-ResourceId: 0
// resourceMapping
// frequencyDomainAllocation: row4 (2)
// row4: 80 [bit length 3, 5 LSB pad bits, 100. ....
// decimal value 4]
// nrofPorts: p4 (2)
// firstOFDMSymbolInTimeDomain: 8
// cdm-Type: fd-CDM2 (1)
// density: one (1)
// one: NULL
// freqBand
// startingRB: 0
// nrofRBs: 52
// periodicityAndOffset: slots80 (9)
// slots80: 1
asn1::rrc_nr::zp_csi_rs_res_s zp_csi_rs_res0;
zp_csi_rs_res0.res_map.freq_domain_alloc.set_row4();
zp_csi_rs_res0.res_map.freq_domain_alloc.row4().from_string("100");
zp_csi_rs_res0.res_map.nrof_ports = csi_rs_res_map_s::nrof_ports_opts::options::p4;
zp_csi_rs_res0.res_map.first_ofdm_symbol_in_time_domain = 8;
zp_csi_rs_res0.res_map.cdm_type = csi_rs_res_map_s::cdm_type_opts::options::fd_cdm2;
zp_csi_rs_res0.res_map.density.set_one();
zp_csi_rs_res0.res_map.freq_band.start_rb = 0;
zp_csi_rs_res0.res_map.freq_band.nrof_rbs = 52;
zp_csi_rs_res0.periodicity_and_offset_present = true;
zp_csi_rs_res0.periodicity_and_offset.set_slots80() = 1;
TESTASSERT(make_phy_zp_csi_rs_resource(zp_csi_rs_res0, &zp_csi_rs_resource0) == true);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.row == srsran_csi_rs_resource_mapping_row_4);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.frequency_domain_alloc[0] == true);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.frequency_domain_alloc[1] == false);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.frequency_domain_alloc[2] == false);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.nof_ports == 4);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.first_symbol_idx == 8);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.cdm == srsran_csi_rs_cdm_fd_cdm2);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.density == srsran_csi_rs_resource_mapping_density_one);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.freq_band.start_rb == 0);
TESTASSERT(zp_csi_rs_resource0.resource_mapping.freq_band.nof_rb == 52);
TESTASSERT(zp_csi_rs_resource0.periodicity.period == 80);
TESTASSERT(zp_csi_rs_resource0.periodicity.offset == 1);
return SRSRAN_SUCCESS;
}
int make_phy_nzp_csi_rs_resource_test()
{
// nzp-CSI-RS-ResourceToAddModList: 5 items
// Item 0
// NZP-CSI-RS-Resource
// nzp-CSI-RS-ResourceId: 0
// resourceMapping
// frequencyDomainAllocation: row2 (1)
// row2: 8000 [bit length 12, 4 LSB pad bits, 1000 0000 0000 .... decimal value 2048]
// nrofPorts: p1 (0)
// firstOFDMSymbolInTimeDomain: 4
// cdm-Type: noCDM (0)
// density: one (1)
// one: NULL
// freqBand
// startingRB: 0
// nrofRBs: 52
// powerControlOffset: 0dB
// powerControlOffsetSS: db0 (1)
// scramblingID: 0
// periodicityAndOffset: slots80 (9)
// slots80: 1
// qcl-InfoPeriodicCSI-RS: 0
asn1::rrc_nr::nzp_csi_rs_res_s nzp_csi_rs_res;
nzp_csi_rs_res.nzp_csi_rs_res_id = 0;
nzp_csi_rs_res.res_map.freq_domain_alloc.set_row2();
nzp_csi_rs_res.res_map.freq_domain_alloc.row2().from_string("100000000000");
nzp_csi_rs_res.res_map.nrof_ports = csi_rs_res_map_s::nrof_ports_opts::options::p1;
nzp_csi_rs_res.res_map.first_ofdm_symbol_in_time_domain = 4;
nzp_csi_rs_res.res_map.cdm_type = csi_rs_res_map_s::cdm_type_opts::options::no_cdm;
nzp_csi_rs_res.res_map.density.set_one();
nzp_csi_rs_res.res_map.freq_band.start_rb = 0;
nzp_csi_rs_res.res_map.freq_band.nrof_rbs = 52;
nzp_csi_rs_res.pwr_ctrl_offset = 0;
nzp_csi_rs_res.pwr_ctrl_offset_ss_present = true;
nzp_csi_rs_res.pwr_ctrl_offset_ss = nzp_csi_rs_res_s::pwr_ctrl_offset_ss_opts::options::db0;
nzp_csi_rs_res.scrambling_id = 0;
nzp_csi_rs_res.periodicity_and_offset_present = true;
nzp_csi_rs_res.periodicity_and_offset.set_slots80() = 1;
srsran_csi_rs_nzp_resource_t nzp_resource_0;
TESTASSERT(make_phy_nzp_csi_rs_resource(nzp_csi_rs_res, &nzp_resource_0) == true);
TESTASSERT(nzp_resource_0.resource_mapping.row == srsran_csi_rs_resource_mapping_row_2);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[0] == true);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[1] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[2] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[3] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[4] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[5] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[6] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[7] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[8] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[9] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[10] == false);
TESTASSERT(nzp_resource_0.resource_mapping.frequency_domain_alloc[11] == false);
TESTASSERT(nzp_resource_0.resource_mapping.nof_ports == 1);
TESTASSERT(nzp_resource_0.resource_mapping.first_symbol_idx == 4);
TESTASSERT(nzp_resource_0.resource_mapping.cdm == srsran_csi_rs_cdm_nocdm);
TESTASSERT(nzp_resource_0.resource_mapping.density == srsran_csi_rs_resource_mapping_density_one);
TESTASSERT(nzp_resource_0.resource_mapping.freq_band.start_rb == 0);
TESTASSERT(nzp_resource_0.resource_mapping.freq_band.nof_rb == 52);
TESTASSERT(nzp_resource_0.power_control_offset == 0);
TESTASSERT(nzp_resource_0.power_control_offset_ss == 0);
TESTASSERT(nzp_resource_0.scrambling_id == 0);
TESTASSERT(nzp_resource_0.periodicity.period == 80);
TESTASSERT(nzp_resource_0.periodicity.offset == 1);
return SRSRAN_SUCCESS;
}
int main()
{
auto& asn1_logger = srslog::fetch_basic_logger("ASN1", false);
@ -572,7 +693,8 @@ int main()
TESTASSERT(make_phy_dmrs_additional_pos_test() == SRSRAN_SUCCESS);
TESTASSERT(make_phy_beta_offsets_test() == SRSRAN_SUCCESS);
TESTASSERT(make_phy_pusch_scaling_test() == SRSRAN_SUCCESS);
TESTASSERT(make_phy_zp_csi_rs_resource_test() == SRSRAN_SUCCESS);
TESTASSERT(make_phy_nzp_csi_rs_resource_test() == SRSRAN_SUCCESS);
srslog::flush();
printf("Success\n");

6
srsue/hdr/stack/rrc/rrc_nr.h
Unescape Escape View File

@ -188,8 +188,10 @@ private:
std::map<uint32_t, uint32_t> drb_eps_bearer_id; // Map of drb id to eps_bearer_id
// temporary maps for building the pucch nr resources
std::map<uint32_t, srsran_pucch_nr_resource_t> res_list;
std::map<uint32_t, bool> res_list_present;
std::map<uint32_t, srsran_pucch_nr_resource_t> res_list;
std::map<uint32_t, bool> res_list_present;
std::map<uint32_t, srsran_csi_rs_zp_resource_t> csi_rs_zp_res;
std::map<uint32_t, srsran_csi_rs_nzp_resource_t> csi_rs_nzp_res;
bool apply_cell_group_cfg(const asn1::rrc_nr::cell_group_cfg_s& cell_group_cfg);
bool apply_radio_bearer_cfg(const asn1::rrc_nr::radio_bearer_cfg_s& radio_bearer_cfg);

93
srsue/src/stack/rrc/rrc_nr.cc
Unescape Escape View File

@ -578,11 +578,61 @@ bool rrc_nr::apply_sp_cell_init_dl_pdcch(const asn1::rrc_nr::pdcch_cfg_s& pdcch_
logger.warning("Option search_spaces_to_add_mod_list not present");
return false;
}
if (pdcch_cfg.ctrl_res_set_to_add_mod_list_present) {
for (uint32_t i = 0; i < pdcch_cfg.ctrl_res_set_to_add_mod_list.size(); i++) {
srsran_coreset_t coreset;
if (make_phy_coreset_cfg(pdcch_cfg.ctrl_res_set_to_add_mod_list[i], &coreset) == true) {
phy_cfg.pdcch.coreset[coreset.id] = coreset;
phy_cfg.pdcch.coreset_present[coreset.id] = true;
} else {
logger.warning("Warning while building coreset structure");
return false;
}
}
} else {
logger.warning("Option ctrl_res_set_to_add_mod_list not present");
}
return true;
}
bool rrc_nr::apply_sp_cell_init_dl_pdsch(const asn1::rrc_nr::pdsch_cfg_s& pdsch_cfg)
{
if (pdsch_cfg.zp_csi_rs_res_to_add_mod_list_present) {
for (uint32_t i = 0; i < pdsch_cfg.zp_csi_rs_res_to_add_mod_list.size(); i++) {
srsran_csi_rs_zp_resource_t zp_csi_rs_resource;
if (make_phy_zp_csi_rs_resource(pdsch_cfg.zp_csi_rs_res_to_add_mod_list[i], &zp_csi_rs_resource) == true) {
// temporally store csi_rs_zp_res
csi_rs_zp_res[zp_csi_rs_resource.id] = zp_csi_rs_resource;
} else {
logger.warning("Warning while building zp_csi_rs resource");
return false;
}
}
} else {
logger.warning("Option zp_csi_rs_res_to_add_mod_list not present");
return false;
}
if (pdsch_cfg.p_zp_csi_rs_res_set_present) {
if (pdsch_cfg.p_zp_csi_rs_res_set.type() == setup_release_c<zp_csi_rs_res_set_s>::types_opts::setup) {
for (uint32_t i = 0; i < pdsch_cfg.p_zp_csi_rs_res_set.setup().zp_csi_rs_res_id_list.size(); i++) {
uint8_t res = pdsch_cfg.p_zp_csi_rs_res_set.setup().zp_csi_rs_res_id_list[i];
// use temporally stored values to assign
if (csi_rs_zp_res.find(res) == csi_rs_zp_res.end()) {
logger.warning("Can not find p_zp_csi_rs_res in temporally stored csi_rs_zp_res");
return false;
}
phy_cfg.pdsch.p_zp_csi_rs_set.data[i] = csi_rs_zp_res[res];
phy_cfg.pdsch.p_zp_csi_rs_set.count += 1;
}
} else {
logger.warning("Option p_zp_csi_rs_res_set not of type setup");
return false;
}
} else {
logger.warning("Option p_zp_csi_rs_res_set not present");
return false;
}
return true;
}
@ -627,6 +677,45 @@ bool rrc_nr::apply_csi_meas_cfg(const asn1::rrc_nr::csi_meas_cfg_s& csi_meas_cfg
logger.warning("Option csi_report_cfg_to_add_mod_list not present");
return false;
}
if (csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list_present) {
for (uint32_t i = 0; i < csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list.size(); i++) {
srsran_csi_rs_nzp_resource_t csi_rs_nzp_resource;
if (make_phy_nzp_csi_rs_resource(csi_meas_cfg.nzp_csi_rs_res_to_add_mod_list[i], &csi_rs_nzp_resource) == true) {
// temporally store csi_rs_zp_res
csi_rs_nzp_res[csi_rs_nzp_resource.id] = csi_rs_nzp_resource;
} else {
logger.warning("Warning while building phy_nzp_csi_rs resource");
return false;
}
}
} else {
logger.warning("Option nzp_csi_rs_res_to_add_mod_list not present");
return false;
}
if (csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list_present) {
for (uint32_t i = 0; i < csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list.size(); i++) {
uint8_t set_id = csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list[i].nzp_csi_res_set_id;
for (uint32_t j = 0; j < csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list[i].nzp_csi_rs_res.size(); j++) {
uint8_t res = csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list[i].nzp_csi_rs_res[j];
// use temporally stored values to assign
if (csi_rs_nzp_res.find(res) == csi_rs_nzp_res.end()) {
logger.warning("Can not find p_zp_csi_rs_res in temporally stored csi_rs_zp_res");
return false;
}
phy_cfg.pdsch.nzp_csi_rs_sets[set_id].data[i] = csi_rs_nzp_res[res];
phy_cfg.pdsch.nzp_csi_rs_sets[set_id].count += 1;
}
if (csi_meas_cfg.nzp_csi_rs_res_set_to_add_mod_list[i].trs_info_present) {
phy_cfg.pdsch.nzp_csi_rs_sets[set_id].trs_info = true;
}
}
} else {
logger.warning("Option p_zp_csi_rs_res_set not present");
return false;
}
return true;
}
@ -640,8 +729,8 @@ bool rrc_nr::apply_dl_common_cfg(const asn1::rrc_nr::dl_cfg_common_s& dl_cfg_com
if (pdcch_cfg_common.common_ctrl_res_set_present) {
srsran_coreset_t coreset;
if (make_phy_coreset_cfg(pdcch_cfg_common.common_ctrl_res_set, &coreset) == true) {
phy_cfg.pdcch.coreset[coreset.coreset_id] = coreset;
phy_cfg.pdcch.coreset_present[coreset.coreset_id] = true;
phy_cfg.pdcch.coreset[coreset.id] = coreset;
phy_cfg.pdcch.coreset_present[coreset.id] = true;
} else {
logger.warning("Warning while building coreset structure");
return false;

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