From f9c3dd2748ac742f6f699a21d76dcf30499ad847 Mon Sep 17 00:00:00 2001 From: Xavier Arteaga Date: Tue, 11 Feb 2020 13:06:43 +0100 Subject: [PATCH] more fixes in the srsenb --- lib/src/phy/enb/enb_ul.c | 6 ++-- lib/src/phy/ue/ue_ul.c | 63 ++++++++++++++++++------------------ srsenb/src/phy/phy_common.cc | 4 +-- srsenb/src/phy/sf_worker.cc | 7 ++-- 4 files changed, 40 insertions(+), 40 deletions(-) diff --git a/lib/src/phy/enb/enb_ul.c b/lib/src/phy/enb/enb_ul.c index 5321aad65..c68e74c6a 100644 --- a/lib/src/phy/enb/enb_ul.c +++ b/lib/src/phy/enb/enb_ul.c @@ -231,8 +231,8 @@ static int pucch_resource_selection(srslte_pucch_cfg_t* cfg, static int get_pucch(srslte_enb_ul_t* q, srslte_ul_sf_cfg_t* ul_sf, srslte_pucch_cfg_t* cfg, srslte_pucch_res_t* res) { int ret = SRSLTE_SUCCESS; - uint32_t n_pucch_i[SRSLTE_PUCCH_CS_MAX_ACK]; - srslte_pucch_res_t pucch_res; + uint32_t n_pucch_i[SRSLTE_PUCCH_CS_MAX_ACK] = {}; + srslte_pucch_res_t pucch_res = {}; // Drop CQI if there is collision with ACK if (!cfg->simul_cqi_ack && srslte_uci_cfg_total_ack(&cfg->uci_cfg) > 0 && cfg->uci_cfg.cqi.data_enable) { @@ -250,7 +250,7 @@ static int get_pucch(srslte_enb_ul_t* q, srslte_ul_sf_cfg_t* ul_sf, srslte_pucch } // Initialise minimum correlation - res->correlation = -INFINITY; + res->correlation = 0.0f; // Iterate possible resources and select the one with higher correlation for (int i = 0; i < nof_resources && ret == SRSLTE_SUCCESS; i++) { diff --git a/lib/src/phy/ue/ue_ul.c b/lib/src/phy/ue/ue_ul.c index bd8c8918c..0c5478d19 100644 --- a/lib/src/phy/ue/ue_ul.c +++ b/lib/src/phy/ue/ue_ul.c @@ -753,12 +753,12 @@ get_npucch(srslte_pucch_cfg_t* cfg, srslte_uci_cfg_t* uci_cfg, srslte_uci_value_ { uint32_t n_pucch_res = 0; - if (uci_cfg->is_scheduling_request_tti) { - return cfg->n_pucch_sr; - } - - if (uci_value) { - if (uci_value->scheduling_request) { + if (cfg->format != SRSLTE_PUCCH_FORMAT_3) { + if (uci_value) { + if (uci_value->scheduling_request) { + return cfg->n_pucch_sr; + } + } else if (uci_cfg->is_scheduling_request_tti) { return cfg->n_pucch_sr; } } @@ -768,23 +768,14 @@ get_npucch(srslte_pucch_cfg_t* cfg, srslte_uci_cfg_t* uci_cfg, srslte_uci_value_ return 0; } - if (cfg->format < SRSLTE_PUCCH_FORMAT_2) { - if (cfg->sps_enabled) { - n_pucch_res = cfg->n_pucch_1[uci_cfg->ack[0].tpc_for_pucch % 4]; - } else { - if (cell->frame_type == SRSLTE_FDD) { - switch (cfg->ack_nack_feedback_mode) { - case SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_PUCCH3: - n_pucch_res = cfg->n3_pucch_an_list[uci_cfg->ack[0].tpc_for_pucch % SRSLTE_PUCCH_SIZE_AN_CS]; - break; - case SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_CS: - n_pucch_res = get_npucch_cs(cfg, uci_cfg, uci_value); - break; - default: - n_pucch_res = uci_cfg->ack[0].ncce[0] + cfg->N_pucch_1; - break; - } - } else { + switch (cfg->format) { + + case SRSLTE_PUCCH_FORMAT_1: + case SRSLTE_PUCCH_FORMAT_1A: + case SRSLTE_PUCCH_FORMAT_1B: + if (cfg->sps_enabled) { + n_pucch_res = cfg->n_pucch_1[uci_cfg->ack[0].tpc_for_pucch % 4]; + } else if (cell->frame_type == SRSLTE_TDD) { // only 1 CC supported in TDD if (!uci_cfg->ack[0].tdd_is_multiplex || uci_cfg->ack[0].tdd_ack_M == 1) { n_pucch_res = n_pucch_i_tdd(uci_cfg->ack[0].ncce[0], @@ -804,10 +795,25 @@ get_npucch(srslte_pucch_cfg_t* cfg, srslte_uci_cfg_t* uci_cfg, srslte_uci_value_ ERROR("Invalid M=%d in PUCCH TDD multiplexing\n", uci_cfg->ack[0].tdd_ack_M); } } + } else if (cfg->ack_nack_feedback_mode == SRSLTE_PUCCH_ACK_NACK_FEEDBACK_MODE_CS) { + // Channel selection enabled + n_pucch_res = get_npucch_cs(cfg, uci_cfg, uci_value); + } else { + // Normal case + n_pucch_res = uci_cfg->ack[0].ncce[0] + cfg->N_pucch_1; } - } - } else { - n_pucch_res = cfg->n_pucch_2; + break; + case SRSLTE_PUCCH_FORMAT_2: + case SRSLTE_PUCCH_FORMAT_2A: + case SRSLTE_PUCCH_FORMAT_2B: + n_pucch_res = cfg->n_pucch_2; + break; + case SRSLTE_PUCCH_FORMAT_3: + n_pucch_res = cfg->n3_pucch_an_list[uci_cfg->ack[0].tpc_for_pucch % SRSLTE_PUCCH_SIZE_AN_CS]; + break; + case SRSLTE_PUCCH_FORMAT_ERROR: + default: + ERROR("Wrong PUCCH format %s\n", srslte_pucch_format_text_short(cfg->format)); } return n_pucch_res; @@ -824,11 +830,6 @@ void srslte_ue_ul_pucch_resource_selection(srslte_cell_t* cell, uci_cfg->cqi.data_enable = false; } - // Assume that if a scheduling request is carried, it is the right TTI - if (uci_value) { - uci_cfg->is_scheduling_request_tti |= uci_value->scheduling_request; - } - // Get PUCCH Resources cfg->format = srslte_pucch_select_format(cfg, uci_cfg, cell->cp); cfg->n_pucch = get_npucch(cfg, uci_cfg, uci_value, cell); diff --git a/srsenb/src/phy/phy_common.cc b/srsenb/src/phy/phy_common.cc index 71e8273d4..44502e79a 100644 --- a/srsenb/src/phy/phy_common.cc +++ b/srsenb/src/phy/phy_common.cc @@ -224,14 +224,14 @@ void phy_common::ue_db_set_ack_pending(uint32_t tti, uint32_t cc_idx, const srsl uint32_t scell_idx = ue.scell_map[cc_idx]; uint32_t tti_idx = TTIMOD(tti); - pending_ack_t& pending_ack = ue.pending_ack[tti_idx]; + pending_ack_t& pending_ack = ue.pending_ack[tti_idx]; // Assume it has been zero'ed for the TTI // Set DCI info pending_ack.ack[scell_idx].grant_cc_idx = scell_idx; // No cross carrier scheduling supported pending_ack.ack[scell_idx].ncce[0] = dci.location.ncce; // Set TB info - for (uint32_t i = 0; i < SRSLTE_MAX_TB; i++) { + for (uint32_t i = 0; i < srslte_dci_format_max_tb(dci.format); i++) { if (SRSLTE_DCI_IS_TB_EN(dci.tb[i])) { pending_ack.ack[scell_idx].pending_tb[i] = true; pending_ack.ack[scell_idx].nof_acks++; diff --git a/srsenb/src/phy/sf_worker.cc b/srsenb/src/phy/sf_worker.cc index 4ac762816..b21bfce0c 100644 --- a/srsenb/src/phy/sf_worker.cc +++ b/srsenb/src/phy/sf_worker.cc @@ -215,10 +215,9 @@ void sf_worker::work_imp() } } - if (dl_grants[t_tx_dl][0].cfi < 1 || dl_grants[t_tx_dl][0].cfi > 3) { - Error("Invalid CFI=%d\n", dl_grants[t_tx_dl][0].cfi); - return; - } + // Make sure CFI is in the right range + dl_grants[t_tx_dl][0].cfi = SRSLTE_MAX(dl_grants[t_tx_dl][0].cfi, 1); + dl_grants[t_tx_dl][0].cfi = SRSLTE_MIN(dl_grants[t_tx_dl][0].cfi, 3); // Get UL scheduling for the TX TTI from MAC if (stack->get_ul_sched(tti_tx_ul, ul_grants[t_tx_ul]) < 0) {