From f6996945382a47f676c7661e17a33465e0a559f4 Mon Sep 17 00:00:00 2001 From: Ismael Gomez Date: Sat, 13 Nov 2021 22:02:56 +0100 Subject: [PATCH] nr,sched: use coreset0_bw when calculating SIB freq domain allocation --- srsgnb/src/stack/mac/sched_nr_signalling.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/srsgnb/src/stack/mac/sched_nr_signalling.cc b/srsgnb/src/stack/mac/sched_nr_signalling.cc index 3da24f9cc..753203d9c 100644 --- a/srsgnb/src/stack/mac/sched_nr_signalling.cc +++ b/srsgnb/src/stack/mac/sched_nr_signalling.cc @@ -114,7 +114,8 @@ bool fill_dci_sib(prb_interval interv, dci.ctx.rnti_type = srsran_rnti_type_si; dci.ctx.rnti = SRSRAN_SIRNTI; dci.ctx.coreset_id = 0; - dci.freq_domain_assigment = srsran_ra_nr_type1_riv(bwp_cfg.cfg.rb_width, interv.start(), interv.length()); + dci.freq_domain_assigment = + srsran_ra_nr_type1_riv(srsran_coreset_get_bw(&bwp_cfg.cfg.pdcch.coreset[0]), interv.start(), interv.length()); dci.time_domain_assigment = 0; dci.tpc = 1; dci.bwp_id = bwp_cfg.bwp_id;