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srsRAN_4G
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Refactored carrier config

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master
David Rupprecht 4 years ago committed by Xavier Arteaga
parent 87f9b2babc
commit f42d4dbc28
23 changed files with 129 additions and 97 deletions
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23
lib/include/srsran/phy/common/phy_common_nr.h
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@ -260,14 +260,29 @@ typedef enum SRSRAN_API {
srsran_resource_alloc_dynamic,
} srsran_resource_alloc_t;
/**
* @brief Subcarrier spacing 15 or 30 kHz <6GHz and 60 or 120 kHz >6GHz
* @remark Described in TS 38.331 V15.10.0 subcarrier spacing
*/
typedef enum SRSRAN_API {
srsran_subcarrier_spacing_15kHz = 0,
srsran_subcarrier_spacing_30kHz,
srsran_subcarrier_spacing_60kHz,
srsran_subcarrier_spacing_120kHz,
srsran_subcarrier_spacing_240kHz,
} srsran_subcarrier_spacing_t;
/**
* @brief NR carrier parameters. It is a combination of fixed cell and bandwidth-part (BWP)
*/
typedef struct SRSRAN_API {
uint32_t id;
uint32_t numerology;
uint32_t nof_prb;
uint32_t start;
uint32_t pci;
uint32_t absolute_frequency_ssb;
uint32_t absolute_frequency_point_a;
srsran_subcarrier_spacing_t scs;
uint32_t nof_prb;
uint32_t start;
uint32_t max_mimo_layers; ///< @brief DL: Indicates the maximum number of MIMO layers to be used for PDSCH in all BWPs
///< of this serving cell. (see TS 38.212 [17], clause 5.4.2.1). UL: Indicates the maximum
///< MIMO layer to be used for PUSCH in all BWPs of the normal UL of this serving cell (see

2
lib/src/phy/ch_estimation/csi_rs.c
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@ -174,7 +174,7 @@ static uint32_t csi_rs_cinit(const srsran_carrier_nr_t* carrier,
const srsran_csi_rs_nzp_resource_t* resource,
uint32_t l)
{
uint32_t n = SRSRAN_SLOT_NR_MOD(carrier->numerology, slot_cfg->idx);
uint32_t n = SRSRAN_SLOT_NR_MOD(carrier->scs, slot_cfg->idx);
uint32_t n_id = resource->scrambling_id;
return ((SRSRAN_NSYMB_PER_SLOT_NR * n + l + 1UL) * (2UL * n_id) << 10UL) + n_id;

12
lib/src/phy/ch_estimation/dmrs_pdcch.c
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@ -154,13 +154,13 @@ int srsran_dmrs_pdcch_put(const srsran_carrier_nr_t* carrier,
}
// Use cell id if the DMR scrambling id is not provided by higher layers
uint32_t n_id = carrier->id;
uint32_t n_id = carrier->pci;
if (coreset->dmrs_scrambling_id_present) {
n_id = coreset->dmrs_scrambling_id;
}
// Bound slot index
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(carrier->numerology, slot_cfg->idx);
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(carrier->scs, slot_cfg->idx);
for (uint32_t l = 0; l < coreset->duration; l++) {
// Get Cin
@ -350,13 +350,13 @@ int srsran_dmrs_pdcch_estimate(srsran_dmrs_pdcch_estimator_t* q,
}
// Use cell id if the DMR scrambling id is not provided by higher layers
uint32_t n_id = q->carrier.id;
uint32_t n_id = q->carrier.pci;
if (q->coreset.dmrs_scrambling_id_present) {
n_id = q->coreset.dmrs_scrambling_id;
}
// Bound slot index
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(q->carrier.numerology, slot_cfg->idx);
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(q->carrier.scs, slot_cfg->idx);
// Extract pilots
for (uint32_t l = 0; l < q->coreset.duration; l++) {
@ -476,7 +476,7 @@ int srsran_dmrs_pdcch_get_measure(const srsran_dmrs_pdcch_estimator_t* q,
// Measure CFO only from the second and third symbols
if (l != 0) {
// Calculates the time between the previous and the current symbol
float Ts = srsran_symbol_distance_s(l - 1, l, q->carrier.numerology);
float Ts = srsran_symbol_distance_s(l - 1, l, q->carrier.scs);
if (isnormal(Ts)) {
// Compute phase difference between symbols and convert to Hz
cfo_avg_Hz += cargf(corr[l] * conjf(corr[l - 1])) / (2.0f * (float)M_PI * Ts);
@ -495,7 +495,7 @@ int srsran_dmrs_pdcch_get_measure(const srsran_dmrs_pdcch_estimator_t* q,
measure->cfo_hz = NAN;
}
measure->sync_error_us =
sync_err_avg / (4.0e-6f * (float)q->coreset.duration * SRSRAN_SUBC_SPACING_NR(q->carrier.numerology));
sync_err_avg / (4.0e-6f * (float)q->coreset.duration * SRSRAN_SUBC_SPACING_NR(q->carrier.scs));
// Convert power measurements into logarithmic scale
measure->rsrp_dBfs = srsran_convert_power_to_dB(measure->rsrp);

8
lib/src/phy/ch_estimation/dmrs_pucch.c
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@ -247,7 +247,7 @@ int srsran_dmrs_pucch_format1_estimate(const srsran_pucch_nr_t* q,
// Compute Time Aligment error in microseconds
if (isnormal(ta_err)) {
ta_err /= 15e3f * (float)(1U << carrier->numerology); // Convert from normalized frequency to seconds
ta_err /= 15e3f * (float)(1U << carrier->scs); // Convert from normalized frequency to seconds
ta_err *= 1e6f; // Convert to micro-seconds
ta_err = roundf(ta_err * 10.0f) / 10.0f; // Round to one tenth of micro-second
res->ta_us = ta_err;
@ -289,8 +289,8 @@ static uint32_t dmrs_pucch_format2_cinit(const srsran_carrier_nr_t* car
const srsran_slot_cfg_t* slot,
uint32_t l)
{
uint64_t n = SRSRAN_SLOT_NR_MOD(carrier->numerology, slot->idx);
uint64_t n_id = (cfg->scrambling_id_present) ? cfg->scambling_id : carrier->id;
uint64_t n = SRSRAN_SLOT_NR_MOD(carrier->scs, slot->idx);
uint64_t n_id = (cfg->scrambling_id_present) ? cfg->scambling_id : carrier->pci;
return SRSRAN_SEQUENCE_MOD((((SRSRAN_NSYMB_PER_SLOT_NR * n + l + 1UL) * (2UL * n_id + 1UL)) << 17UL) + 2UL * n_id);
}
@ -409,7 +409,7 @@ int srsran_dmrs_pucch_format2_estimate(const srsran_pucch_nr_t* q,
// Compute Time Aligment error in microseconds
if (isnormal(ta_err)) {
ta_err /= 15e3f * (float)(1U << carrier->numerology) * 3; // Convert from normalized frequency to seconds
ta_err /= 15e3f * (float)(1U << carrier->scs) * 3; // Convert from normalized frequency to seconds
ta_err *= 1e6f; // Convert to micro-seconds
ta_err = roundf(ta_err * 10.0f) / 10.0f; // Round to one tenth of micro-second
res->ta_us = ta_err;

14
lib/src/phy/ch_estimation/dmrs_sch.c
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@ -503,7 +503,7 @@ static uint32_t srsran_dmrs_sch_seed(const srsran_carrier_nr_t* carrier,
const srsran_dmrs_sch_cfg_t* dmrs_cfg = &cfg->dmrs;
// Calculate scrambling IDs
uint32_t n_id = carrier->id;
uint32_t n_id = carrier->pci;
uint32_t n_scid = (grant->n_scid) ? 1 : 0;
if (!grant->n_scid && dmrs_cfg->scrambling_id0_present) {
// n_scid = 0 and ID0 present
@ -640,7 +640,7 @@ int srsran_dmrs_sch_put_sf(srsran_dmrs_sch_t* q,
// Iterate symbols
for (uint32_t i = 0; i < nof_symbols; i++) {
uint32_t l = symbols[i]; // Symbol index inside the slot
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(q->carrier.numerology, slot_cfg->idx); // Slot index in the frame
uint32_t slot_idx = SRSRAN_SLOT_NR_MOD(q->carrier.scs, slot_cfg->idx); // Slot index in the frame
uint32_t cinit = srsran_dmrs_sch_seed(&q->carrier, pdsch_cfg, grant, slot_idx, l);
srsran_dmrs_sch_put_symbol(q, pdsch_cfg, grant, cinit, delta, &sf_symbols[symbol_sz * l]);
@ -771,7 +771,7 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
uint32_t l = symbols[i]; // Symbol index inside the slot
uint32_t cinit =
srsran_dmrs_sch_seed(&q->carrier, cfg, grant, SRSRAN_SLOT_NR_MOD(q->carrier.numerology, slot->idx), l);
srsran_dmrs_sch_seed(&q->carrier, cfg, grant, SRSRAN_SLOT_NR_MOD(q->carrier.scs, slot->idx), l);
nof_pilots_x_symbol = srsran_dmrs_sch_get_symbol(
q, cfg, grant, cinit, delta, &sf_symbols[symbol_sz * l], &q->pilot_estimates[nof_pilots_x_symbol * i]);
@ -789,7 +789,7 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
sync_err += srsran_vec_estimate_frequency(&q->pilot_estimates[nof_pilots_x_symbol * i], nof_pilots_x_symbol);
}
sync_err /= (float)nof_symbols;
chest_res->sync_error = sync_err / (dmrs_stride * SRSRAN_SUBC_SPACING_NR(q->carrier.numerology));
chest_res->sync_error = sync_err / (dmrs_stride * SRSRAN_SUBC_SPACING_NR(q->carrier.scs));
#if DMRS_SCH_SYNC_PRECOMPENSATE
// Pre-compensate synchronization error
@ -828,7 +828,7 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
// Measure CFO if more than one symbol is used
float cfo_avg = 0.0;
for (uint32_t i = 0; i < nof_symbols - 1; i++) {
float time_diff = srsran_symbol_distance_s(symbols[i], symbols[i + 1], q->carrier.numerology);
float time_diff = srsran_symbol_distance_s(symbols[i], symbols[i + 1], q->carrier.scs);
float phase_diff = cargf(corr[i + 1] * conjf(corr[i]));
if (isnormal(time_diff)) {
@ -843,11 +843,11 @@ int srsran_dmrs_sch_estimate(srsran_dmrs_sch_t* q,
if (isnormal(cfo_avg)) {
// Calculate phase of the first OFDM symbol (l = 0)
float arg0 =
cargf(corr[0]) - 2.0f * M_PI * srsran_symbol_distance_s(0, symbols[0], q->carrier.numerology) * cfo_avg;
cargf(corr[0]) - 2.0f * M_PI * srsran_symbol_distance_s(0, symbols[0], q->carrier.scs) * cfo_avg;
// Calculate CFO corrections
for (uint32_t l = 0; l < SRSRAN_NSYMB_PER_SLOT_NR; l++) {
float arg = arg0 + 2.0f * M_PI * cfo_avg * srsran_symbol_distance_s(0, l, q->carrier.numerology);
float arg = arg0 + 2.0f * M_PI * cfo_avg * srsran_symbol_distance_s(0, l, q->carrier.scs);
cfo_correction[l] = cexpf(I * arg);
}

18
lib/src/phy/ch_estimation/test/csi_rs_test.c
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@ -18,11 +18,13 @@
#include <stdlib.h>
static srsran_carrier_nr_t carrier = {
0, // cell_id
0, // numerology
50, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
50, // nof_prb
0, // start
1 // max_mimo_layers
};
static float snr_dB = 20.0;
@ -70,7 +72,7 @@ static void usage(char* prog)
{
printf("Usage: %s [recov]\n", prog);
printf("\t-p nof_prb [Default %d]\n", carrier.nof_prb);
printf("\t-c cell_id [Default %d]\n", carrier.id);
printf("\t-c cell_id [Default %d]\n", carrier.pci);
printf("\t-s SNR in dB [Default %.2f]\n", snr_dB);
printf("\t-S Start RB index [Default %d]\n", start_rb);
printf("\t-L Number of RB [Default %d]\n", nof_rb);
@ -88,7 +90,7 @@ static void parse_args(int argc, char** argv)
carrier.nof_prb = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'c':
carrier.id = (uint32_t)strtol(argv[optind], NULL, 10);
carrier.pci = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'o':
power_control_offset = strtof(argv[optind], NULL);
@ -169,7 +171,7 @@ int main(int argc, char** argv)
resource.resource_mapping.freq_band.nof_rb <= nof_rb_end;
resource.resource_mapping.freq_band.nof_rb += 4) {
// Iterate for all slot numbers
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot_cfg.idx++) {
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot_cfg.idx++) {
// Steer Frequency allocation
for (uint32_t freq_dom_alloc = 0; freq_dom_alloc < nof_freq_dom_alloc; freq_dom_alloc++) {
for (uint32_t i = 0; i < nof_freq_dom_alloc; i++) {

6
lib/src/phy/ch_estimation/test/dmrs_pdcch_test.c
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@ -30,7 +30,7 @@ void usage(char* prog)
printf("\t-r nof_prb [Default %d]\n", carrier.nof_prb);
printf("\t-e extended cyclic prefix [Default normal]\n");
printf("\t-c cell_id [Default %d]\n", carrier.id);
printf("\t-c cell_id [Default %d]\n", carrier.pci);
printf("\t-v increase verbosity\n");
}
@ -44,7 +44,7 @@ static void parse_args(int argc, char** argv)
carrier.nof_prb = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'c':
carrier.id = (uint32_t)strtol(argv[optind], NULL, 10);
carrier.pci = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'v':
srsran_verbose++;
@ -68,7 +68,7 @@ static int run_test(srsran_dmrs_pdcch_estimator_t* estimator,
srsran_dci_location_t dci_location = {};
dci_location.L = aggregation_level;
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot_cfg.idx++) {
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot_cfg.idx++) {
uint32_t locations[SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR] = {};
int nof_locations =

19
lib/src/phy/ch_estimation/test/dmrs_pdsch_test.c
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@ -20,12 +20,15 @@
#include <strings.h>
#include <unistd.h>
static srsran_carrier_nr_t carrier = {
0, // cell_id
0, // numerology
50, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
50, // nof_prb
0, // start
1 // max_mimo_layers
};
typedef struct {
@ -130,7 +133,7 @@ static void usage(char* prog)
printf("\t-r nof_prb [Default %d]\n", carrier.nof_prb);
printf("\t-c cell_id [Default %d]\n", carrier.id);
printf("\t-c cell_id [Default %d]\n", carrier.pci);
printf("\t-v increase verbosity\n");
}
@ -144,7 +147,7 @@ static void parse_args(int argc, char** argv)
carrier.nof_prb = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'c':
carrier.id = (uint32_t)strtol(argv[optind], NULL, 10);
carrier.pci = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'v':
srsran_verbose++;
@ -218,7 +221,7 @@ static int run_test(srsran_dmrs_sch_t* dmrs_pdsch,
TESTASSERT(assert_cfg(pdsch_cfg, grant) == SRSRAN_SUCCESS);
srsran_slot_cfg_t slot_cfg = {};
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(dmrs_pdsch->carrier.numerology); slot_cfg.idx++) {
for (slot_cfg.idx = 0; slot_cfg.idx < SRSRAN_NSLOTS_PER_FRAME_NR(dmrs_pdsch->carrier.scs); slot_cfg.idx++) {
TESTASSERT(srsran_dmrs_sch_put_sf(dmrs_pdsch, &slot_cfg, pdsch_cfg, grant, sf_symbols) == SRSRAN_SUCCESS);
TESTASSERT(srsran_dmrs_sch_estimate(dmrs_pdsch, &slot_cfg, pdsch_cfg, grant, sf_symbols, chest_res) ==

2
lib/src/phy/phch/pdcch_nr.c
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@ -327,7 +327,7 @@ static uint32_t pdcch_nr_c_init(const srsran_pdcch_nr_t* q, const srsran_dci_msg
{
uint32_t n_id = (dci_msg->ctx.ss_type == srsran_search_space_type_ue && q->coreset.dmrs_scrambling_id_present)
? q->coreset.dmrs_scrambling_id
: q->carrier.id;
: q->carrier.pci;
uint32_t n_rnti = (dci_msg->ctx.ss_type == srsran_search_space_type_ue && q->coreset.dmrs_scrambling_id_present)
? dci_msg->ctx.rnti
: 0U;

2
lib/src/phy/phch/pdsch_nr.c
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@ -295,7 +295,7 @@ static int srsran_pdsch_nr_get(const srsran_pdsch_nr_t* q,
static uint32_t
pdsch_nr_cinit(const srsran_carrier_nr_t* carrier, const srsran_sch_cfg_nr_t* cfg, uint16_t rnti, uint32_t cw_idx)
{
uint32_t n_id = carrier->id;
uint32_t n_id = carrier->pci;
if (cfg->scrambling_id_present && SRSRAN_RNTI_ISUSER(rnti)) {
n_id = cfg->scambling_id;
}

10
lib/src/phy/phch/pucch_nr.c
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@ -28,7 +28,7 @@ int srsran_pucch_nr_group_sequence(const srsran_carrier_nr_t* carrier,
{
uint32_t f_gh = 0;
uint32_t f_ss = 0;
uint32_t n_id = cfg->hopping_id_present ? cfg->hopping_id : carrier->id;
uint32_t n_id = cfg->hopping_id_present ? cfg->hopping_id : carrier->pci;
switch (cfg->group_hopping) {
case SRSRAN_PUCCH_NR_GROUP_HOPPING_NEITHER:
@ -71,13 +71,13 @@ int srsran_pucch_nr_alpha_idx(const srsran_carrier_nr_t* carrier,
}
// Compute number of slot
uint32_t n_slot = SRSRAN_SLOT_NR_MOD(carrier->numerology, slot->idx);
uint32_t n_slot = SRSRAN_SLOT_NR_MOD(carrier->scs, slot->idx);
// Generate pseudo-random sequence
uint32_t cinit = cfg->hopping_id_present ? cfg->hopping_id : carrier->id;
uint32_t cinit = cfg->hopping_id_present ? cfg->hopping_id : carrier->pci;
uint8_t cs[SRSRAN_NSYMB_PER_SLOT_NR * SRSRAN_NSLOTS_PER_FRAME_NR(SRSRAN_NR_MAX_NUMEROLOGY) * 8U] = {};
srsran_sequence_apply_bit(
cs, cs, SRSRAN_NSYMB_PER_SLOT_NR * SRSRAN_NSLOTS_PER_FRAME_NR(carrier->numerology) * 8, cinit);
cs, cs, SRSRAN_NSYMB_PER_SLOT_NR * SRSRAN_NSLOTS_PER_FRAME_NR(carrier->scs) * 8, cinit);
// Create n_cs parameter
uint32_t n_cs = 0;
@ -536,7 +536,7 @@ static uint32_t pucch_nr_format2_cinit(const srsran_carrier_nr_t* carri
const srsran_pucch_nr_common_cfg_t* pucch_cfg,
const srsran_uci_cfg_nr_t* uci_cfg)
{
uint32_t n_id = (pucch_cfg->scrambling_id_present) ? pucch_cfg->scrambling_id_present : carrier->id;
uint32_t n_id = (pucch_cfg->scrambling_id_present) ? pucch_cfg->scrambling_id_present : carrier->pci;
return ((uint32_t)uci_cfg->pucch.rnti << 15U) + n_id;
}

2
lib/src/phy/phch/pusch_nr.c
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@ -317,7 +317,7 @@ static int pusch_nr_get(const srsran_pusch_nr_t* q,
static uint32_t
pusch_nr_cinit(const srsran_carrier_nr_t* carrier, const srsran_sch_cfg_nr_t* cfg, uint16_t rnti, uint32_t cw_idx)
{
uint32_t n_id = carrier->id;
uint32_t n_id = carrier->pci;
if (cfg->scrambling_id_present && SRSRAN_RNTI_ISUSER(rnti)) {
n_id = cfg->scambling_id;
}

14
lib/src/phy/phch/test/pdcch_nr_test.c
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@ -16,11 +16,13 @@
#include <getopt.h>
static srsran_carrier_nr_t carrier = {
0, // cell_id
0, // numerology
50, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
50, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint16_t rnti = 0x1234;
@ -185,7 +187,7 @@ int main(int argc, char** argv)
aggregation_level++) {
uint32_t L = 1U << aggregation_level;
for (uint32_t slot_idx = 0; slot_idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot_idx++) {
for (uint32_t slot_idx = 0; slot_idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot_idx++) {
uint32_t dci_locations[SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR] = {};
// Calculate candidate locations

13
lib/src/phy/phch/test/pdsch_nr_test.c
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@ -21,13 +21,16 @@
#include <math.h>
static srsran_carrier_nr_t carrier = {
1, // cell_id
0, // numerology
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint32_t n_prb = 0; // Set to 0 for steering
static uint32_t mcs = 30; // Set to 30 for steering
static srsran_sch_cfg_nr_t pdsch_cfg = {};

22
lib/src/phy/phch/test/pucch_nr_test.c
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@ -23,11 +23,13 @@
#include <unistd.h>
static srsran_carrier_nr_t carrier = {
0, // cell_id
0, // numerology
6, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
6, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint32_t starting_prb_stride = 4;
@ -43,7 +45,7 @@ static int test_pucch_format0(srsran_pucch_nr_t* pucch, const srsran_pucch_nr_co
srsran_pucch_nr_resource_t resource = {};
resource.format = SRSRAN_PUCCH_NR_FORMAT_0;
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot.idx++) {
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot.idx++) {
for (resource.starting_prb = 0; resource.starting_prb < carrier.nof_prb;
resource.starting_prb += starting_prb_stride) {
for (resource.nof_symbols = 1; resource.nof_symbols <= 2; resource.nof_symbols++) {
@ -91,7 +93,7 @@ static int test_pucch_format1(srsran_pucch_nr_t* pucch,
srsran_pucch_nr_resource_t resource = {};
resource.format = SRSRAN_PUCCH_NR_FORMAT_1;
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot.idx++) {
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot.idx++) {
for (resource.starting_prb = 0; resource.starting_prb < carrier.nof_prb;
resource.starting_prb += starting_prb_stride) {
for (resource.nof_symbols = SRSRAN_PUCCH_NR_FORMAT1_MIN_NSYMB;
@ -164,7 +166,7 @@ static int test_pucch_format2(srsran_pucch_nr_t* pucch,
srsran_pucch_nr_resource_t resource = {};
resource.format = SRSRAN_PUCCH_NR_FORMAT_2;
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.numerology); slot.idx++) {
for (slot.idx = 0; slot.idx < SRSRAN_NSLOTS_PER_FRAME_NR(carrier.scs); slot.idx++) {
for (resource.nof_symbols = SRSRAN_PUCCH_NR_FORMAT2_MIN_NSYMB;
resource.nof_symbols <= SRSRAN_PUCCH_NR_FORMAT2_MAX_NSYMB;
resource.nof_symbols++) {
@ -247,7 +249,7 @@ static int test_pucch_format2(srsran_pucch_nr_t* pucch,
static void usage(char* prog)
{
printf("Usage: %s [csNnv]\n", prog);
printf("\t-c cell id [Default %d]\n", carrier.id);
printf("\t-c cell id [Default %d]\n", carrier.pci);
printf("\t-n nof_prb [Default %d]\n", carrier.nof_prb);
printf("\t-f format [Default %d]\n", format);
printf("\t-s SNR in dB [Default %.2f]\n", snr_db);
@ -260,7 +262,7 @@ static void parse_args(int argc, char** argv)
while ((opt = getopt(argc, argv, "cnfsv")) != -1) {
switch (opt) {
case 'c':
carrier.id = (uint32_t)strtol(argv[optind], NULL, 10);
carrier.pci = (uint32_t)strtol(argv[optind], NULL, 10);
break;
case 'n':
carrier.nof_prb = (uint32_t)strtol(argv[optind], NULL, 10);

14
lib/src/phy/phch/test/pusch_nr_test.c
Unescape Escape View File

@ -20,11 +20,13 @@
#include <getopt.h>
static srsran_carrier_nr_t carrier = {
1, // cell_id
0, // numerology
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint32_t n_prb = 0; // Set to 0 for steering
@ -158,7 +160,7 @@ int main(int argc, char** argv)
}
// Use grant default A time resources with m=0
if (srsran_ra_ul_nr_pusch_time_resource_default_A(carrier.numerology, 0, &pusch_cfg.grant) < SRSRAN_SUCCESS) {
if (srsran_ra_ul_nr_pusch_time_resource_default_A(carrier.scs, 0, &pusch_cfg.grant) < SRSRAN_SUCCESS) {
ERROR("Error loading default grant");
goto clean_exit;
}

12
lib/src/phy/phch/test/sch_nr_test.c
Unescape Escape View File

@ -19,11 +19,13 @@
#include <srsran/phy/utils/random.h>
static srsran_carrier_nr_t carrier = {
0, // cell_id
0, // numerology
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
1, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
SRSRAN_MAX_PRB_NR, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint32_t n_prb = 0; // Set to 0 for steering

2
lib/src/phy/ue/ue_dl_nr.c
Unescape Escape View File

@ -373,7 +373,7 @@ static int ue_dl_nr_find_dci_ss(srsran_ue_dl_nr_t* q,
// Calculate possible PDCCH DCI candidates
uint32_t candidates[SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR] = {};
int nof_candidates = srsran_pdcch_nr_locations_coreset(
coreset, search_space, rnti, L, SRSRAN_SLOT_NR_MOD(q->carrier.numerology, slot_cfg->idx), candidates);
coreset, search_space, rnti, L, SRSRAN_SLOT_NR_MOD(q->carrier.scs, slot_cfg->idx), candidates);
if (nof_candidates < SRSRAN_SUCCESS) {
ERROR("Error calculating DCI candidate location");
return SRSRAN_ERROR;

17
lib/test/phy/phy_dl_nr_test.c
Unescape Escape View File

@ -20,12 +20,13 @@
#include <getopt.h>
static srsran_carrier_nr_t carrier = {
501, // cell_id
0, // numerology
52, // nof_prb
0, // start
1 // max_mimo_layers
501, // pci
0, // absolute_frequency_ssb
0, // absolute_frequency_point_a
srsran_subcarrier_spacing_15kHz, // scs
52, // nof_prb
0, // start
1 // max_mimo_layers
};
static uint32_t n_prb = 0; // Set to 0 for steering
@ -375,7 +376,7 @@ int main(int argc, char** argv)
search_space,
pdsch_cfg.grant.rnti,
L,
SRSRAN_SLOT_NR_MOD(carrier.numerology, slot.idx),
SRSRAN_SLOT_NR_MOD(carrier.scs, slot.idx),
ncce_candidates);
if (nof_candidates < SRSRAN_SUCCESS) {
ERROR("Error getting PDCCH candidates");
@ -407,7 +408,7 @@ int main(int argc, char** argv)
// Emulate channel CFO
if (isnormal(cfo_hz) && ue_dl.fft[0].cfg.symbol_sz > 0) {
srsran_vec_apply_cfo(buffer_ue[0],
cfo_hz / (ue_dl.fft[0].cfg.symbol_sz * SRSRAN_SUBC_SPACING_NR(carrier.numerology)),
cfo_hz / (ue_dl.fft[0].cfg.symbol_sz * SRSRAN_SUBC_SPACING_NR(carrier.scs)),
buffer_ue[0],
sf_len);
}

2
srsenb/src/enb_cfg_parser.cc
Unescape Escape View File

@ -1002,7 +1002,7 @@ int set_derived_args(all_args_t* args_, rrc_cfg_t* rrc_cfg_, phy_cfg_t* phy_cfg_
phy_cell_cfg_nr_t phy_cell_cfg = {};
phy_cell_cfg.carrier.max_mimo_layers = cell_cfg_.nof_ports;
phy_cell_cfg.carrier.nof_prb = cell_cfg_.nof_prb;
phy_cell_cfg.carrier.id = cfg.pci;
phy_cell_cfg.carrier.pci = cfg.pci;
phy_cell_cfg.cell_id = cfg.cell_id;
phy_cell_cfg.root_seq_idx = cfg.root_seq_idx;
phy_cell_cfg.rf_port = cfg.rf_port;

4
srsue/hdr/phy/nr/state.h
Unescape Escape View File

@ -86,11 +86,11 @@ public:
state()
{
carrier.id = 500;
carrier.pci = 500;
carrier.nof_prb = 100;
carrier.max_mimo_layers = 1;
info_metrics.pci = carrier.id;
info_metrics.pci = carrier.pci;
// Hard-coded values, this should be set when the measurements take place
csi_measurements[0].K_csi_rs = 1;

2
srsue/src/phy/nr/sf_worker.cc
Unescape Escape View File

@ -99,7 +99,7 @@ void sf_worker::work_imp()
// Notify MAC about PRACH transmission
phy_state->stack->prach_sent(TTI_TX(tti_rx),
srsran_prach_nr_start_symbol_fr1_unpaired(phy_state->cfg.prach.config_idx),
SRSRAN_SLOT_NR_MOD(phy_state->carrier.numerology, TTI_TX(tti_rx)),
SRSRAN_SLOT_NR_MOD(phy_state->carrier.scs, TTI_TX(tti_rx)),
0,
0);

6
srsue/src/phy/nr/worker_pool.cc
Unescape Escape View File

@ -22,7 +22,7 @@ bool worker_pool::init(const phy_args_nr_t& args, phy_common* common, stack_inte
phy_state.args = args;
// Set carrier attributes
phy_state.carrier.id = 500;
phy_state.carrier.pci = 500;
phy_state.carrier.nof_prb = args.nof_prb;
// Set NR arguments
@ -72,7 +72,7 @@ sf_worker* worker_pool::wait_worker(uint32_t tti)
sf_worker* worker = (sf_worker*)pool.wait_worker(tti);
// Generate PRACH if ready
if (prach_buffer->is_ready_to_send(tti, phy_state.carrier.id)) {
if (prach_buffer->is_ready_to_send(tti, phy_state.carrier.pci)) {
uint32_t nof_prach_sf = 0;
float prach_target_power = 0.0f;
cf_t* prach_ptr = prach_buffer->generate(0.0f, &nof_prach_sf, &prach_target_power);
@ -129,7 +129,7 @@ bool worker_pool::set_config(const srsran::phy_cfg_nr_t& cfg)
// Set PRACH hard-coded cell
srsran_cell_t cell = {};
cell.nof_prb = 50;
cell.id = phy_state.carrier.id;
cell.id = phy_state.carrier.pci;
if (not prach_buffer->set_cell(cell, phy_state.cfg.prach)) {
logger.error("Error setting PRACH cell");
return false;

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