mirror of https://github.com/pvnis/srsRAN_4G.git
clean common sched output tests
parent
67690136be
commit
f24e5aadaf
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/*
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* Copyright 2013-2020 Software Radio Systems Limited
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*
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* This file is part of srsLTE.
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*
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* srsLTE is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsLTE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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#include "sched_common_test_suite.h"
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#include "lib/include/srslte/phy/phch/prach.h"
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#include "srslte/common/test_common.h"
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using srslte::tti_point;
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namespace srsenb {
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int test_pusch_collisions(const sf_output_res_t& sf_out, const prbmask_t* expected_ul_mask)
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{
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auto& cell_params = sf_out.cell_params;
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uint32_t nof_prb = cell_params.nof_prb();
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prbmask_t ul_allocs(nof_prb);
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auto try_ul_fill = [&](prb_interval alloc, const char* ch_str, bool strict = true) {
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CONDERROR(alloc.stop() > nof_prb, "Allocated RBs %s out-of-bounds\n", alloc.to_string().c_str());
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CONDERROR(alloc.empty(), "Allocations must have at least one PRB\n");
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if (strict and ul_allocs.any(alloc.start(), alloc.stop())) {
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TESTERROR("Collision Detected of %s alloc=%s and cumulative_mask=0x%s\n",
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ch_str,
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alloc.to_string().c_str(),
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ul_allocs.to_hex().c_str());
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}
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ul_allocs.fill(alloc.start(), alloc.stop(), true);
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return SRSLTE_SUCCESS;
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};
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/* TEST: Check if there is space for PRACH */
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bool is_prach_tti_tx_ul =
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srslte_prach_tti_opportunity_config_fdd(sf_out.cell_params.cfg.prach_config, sf_out.tti_tx_ul().to_uint(), -1);
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if (is_prach_tti_tx_ul) {
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try_ul_fill({cell_params.cfg.prach_freq_offset, cell_params.cfg.prach_freq_offset + 6}, "PRACH");
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}
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/* TEST: check collisions in PUCCH */
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bool strict = nof_prb != 6 or (not is_prach_tti_tx_ul); // and not tti_data.ul_pending_msg3_present);
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try_ul_fill({0, (uint32_t)cell_params.cfg.nrb_pucch}, "PUCCH", strict);
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try_ul_fill({cell_params.cfg.cell.nof_prb - cell_params.cfg.nrb_pucch, (uint32_t)cell_params.cfg.cell.nof_prb},
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"PUCCH",
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strict);
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/* TEST: check collisions in the UL PUSCH */
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for (uint32_t i = 0; i < sf_out.ul_result.nof_dci_elems; ++i) {
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uint32_t L, RBstart;
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srslte_ra_type2_from_riv(sf_out.ul_result.pusch[i].dci.type2_alloc.riv, &L, &RBstart, nof_prb, nof_prb);
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strict = sf_out.ul_result.pusch[i].needs_pdcch or nof_prb != 6; // Msg3 may collide with PUCCH at PRB==6
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try_ul_fill({RBstart, RBstart + L}, "PUSCH", strict);
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}
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CONDERROR(expected_ul_mask != nullptr and *expected_ul_mask != ul_allocs,
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"The derived UL PRB mask %s does not match the expected one %s\n",
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ul_allocs.to_string().c_str(),
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expected_ul_mask->to_string().c_str());
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return SRSLTE_SUCCESS;
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}
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int extract_dl_prbmask(const srslte_cell_t& cell,
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const srslte_dci_dl_t& dci,
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srslte::bounded_bitset<100, true>& alloc_mask)
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{
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srslte_pdsch_grant_t grant;
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srslte_dl_sf_cfg_t dl_sf = {};
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alloc_mask.resize(cell.nof_prb);
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alloc_mask.reset();
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CONDERROR(srslte_ra_dl_dci_to_grant(&cell, &dl_sf, SRSLTE_TM1, false, &dci, &grant) == SRSLTE_ERROR,
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"Failed to decode PDSCH grant\n");
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for (uint32_t j = 0; j < alloc_mask.size(); ++j) {
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if (grant.prb_idx[0][j]) {
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alloc_mask.set(j);
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}
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}
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return SRSLTE_SUCCESS;
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}
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int test_pdsch_collisions(const sf_output_res_t& sf_out, const rbgmask_t* expected_rbgmask)
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{
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srslte::bounded_bitset<100, true> dl_allocs(sf_out.cell_params.nof_prb()), alloc_mask(sf_out.cell_params.nof_prb());
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rbgmask_t rbgmask{sf_out.cell_params.nof_rbgs};
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auto try_dl_mask_fill = [&](const srslte_dci_dl_t& dci, const char* channel) {
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if (extract_dl_prbmask(sf_out.cell_params.cfg.cell, dci, alloc_mask) != SRSLTE_SUCCESS) {
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return SRSLTE_ERROR;
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}
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CONDERROR(alloc_mask.none(), "DL allocation must occupy at least one RBG.\n");
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if ((dl_allocs & alloc_mask).any()) {
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TESTERROR("Detected collision in the DL %s allocation (%s intersects %s)\n",
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channel,
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dl_allocs.to_string().c_str(),
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alloc_mask.to_string().c_str());
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}
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dl_allocs |= alloc_mask;
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return SRSLTE_SUCCESS;
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};
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// Decode BC allocations, check collisions, and fill cumulative mask
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for (uint32_t i = 0; i < sf_out.dl_result.nof_bc_elems; ++i) {
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TESTASSERT(try_dl_mask_fill(sf_out.dl_result.bc[i].dci, "BC") == SRSLTE_SUCCESS);
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}
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// Decode RAR allocations, check collisions, and fill cumulative mask
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for (uint32_t i = 0; i < sf_out.dl_result.nof_rar_elems; ++i) {
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TESTASSERT(try_dl_mask_fill(sf_out.dl_result.rar[i].dci, "RAR") == SRSLTE_SUCCESS);
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}
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// forbid Data in DL if its ACKs conflict with PRACH for PRB==6
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if (sf_out.cell_params.nof_prb() == 6) {
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if (srslte_prach_tti_opportunity_config_fdd(
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sf_out.cell_params.cfg.prach_config, sf_out.tti_rx_ack_dl().to_uint(), -1)) {
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dl_allocs.fill(0, dl_allocs.size());
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}
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}
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// Decode Data allocations, check collisions and fill cumulative mask
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for (uint32_t i = 0; i < sf_out.dl_result.nof_data_elems; ++i) {
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TESTASSERT(try_dl_mask_fill(sf_out.dl_result.data[i].dci, "data") == SRSLTE_SUCCESS);
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}
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// TEST: check for holes in the PRB mask (RBGs not fully filled)
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rbgmask.resize(sf_out.cell_params.nof_rbgs);
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rbgmask.reset();
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srslte::bounded_bitset<100, true> rev_alloc = ~dl_allocs;
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for (uint32_t i = 0; i < sf_out.cell_params.nof_rbgs; ++i) {
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uint32_t lim = SRSLTE_MIN((i + 1) * sf_out.cell_params.P, dl_allocs.size());
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bool val = dl_allocs.any(i * sf_out.cell_params.P, lim);
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CONDERROR(rev_alloc.any(i * sf_out.cell_params.P, lim) and val, "No holes can be left in an RBG\n");
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if (val) {
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rbgmask.set(i);
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}
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}
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CONDERROR(expected_rbgmask != nullptr and *expected_rbgmask != rbgmask,
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"The derived DL RBG mask %s does not match the expected one %s\n",
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rbgmask.to_string().c_str(),
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expected_rbgmask->to_string().c_str());
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return SRSLTE_SUCCESS;
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}
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/**
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* - SIB1 is allocated in correct TTIs
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* - TB size is adequate for SIB allocation
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* - The SIBs with index>1 are allocated in expected TTI windows
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*/
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int test_sib_scheduling(const sf_output_res_t& sf_out)
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{
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uint32_t sfn = sf_out.tti_tx_dl().to_uint() / 10;
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uint32_t sf_idx = sf_out.tti_tx_dl().to_uint() % 10;
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bool sib1_expected = ((sfn % 2) == 0) and sf_idx == 5;
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using bc_elem = const sched_interface::dl_sched_bc_t;
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bc_elem* bc_begin = &sf_out.dl_result.bc[0];
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bc_elem* bc_end = &sf_out.dl_result.bc[sf_out.dl_result.nof_bc_elems];
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/* Test if SIB1 was correctly scheduled */
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auto it = std::find_if(bc_begin, bc_end, [](bc_elem& elem) { return elem.index == 0; });
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CONDERROR(sib1_expected and it == bc_end, "Failed to allocate SIB1 in even sfn, sf_idx==5\n");
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CONDERROR(not sib1_expected and it != bc_end, "SIB1 allocated in wrong TTI.\n");
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/* Test if any SIB was scheduled with wrong index, tbs, or outside of its window */
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for (bc_elem* bc = bc_begin; bc != bc_end; ++bc) {
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if (bc->index == 0) {
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continue;
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}
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CONDERROR(bc->index >= sched_interface::MAX_SIBS, "Invalid SIB idx=%d\n", bc->index + 1);
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CONDERROR(bc->tbs < sf_out.cell_params.cfg.sibs[bc->index].len,
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"Allocated BC process with TBS=%d < sib_len=%d\n",
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bc->tbs,
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sf_out.cell_params.cfg.sibs[bc->index].len);
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uint32_t x = (bc->index - 1) * sf_out.cell_params.cfg.si_window_ms;
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uint32_t sf = x % 10;
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uint32_t sfn_start = sfn;
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while ((sfn_start % sf_out.cell_params.cfg.sibs[bc->index].period_rf) != x / 10) {
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sfn_start--;
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}
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srslte::tti_point win_start{sfn_start * 10 + sf};
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srslte::tti_interval window{win_start, win_start + sf_out.cell_params.cfg.si_window_ms};
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CONDERROR(not window.contains(sf_out.tti_tx_dl()), "Scheduled SIB is outside of its SIB window\n");
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}
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return SRSLTE_SUCCESS;
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}
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int test_pdcch_collisions(const sf_output_res_t& sf_out, const srslte::bounded_bitset<128, true>* expected_cce_mask)
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{
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int ret = srslte_regs_pdcch_ncce(sf_out.cell_params.regs.get(), sf_out.dl_result.cfi);
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TESTASSERT(ret > 0);
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uint32_t ncce = ret;
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srslte::bounded_bitset<128, true> used_cce{ncce};
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// Helper Function: checks if there is any collision. If not, fills the PDCCH mask
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auto try_cce_fill = [&](const srslte_dci_location_t& dci_loc, const char* ch) {
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uint32_t cce_start = dci_loc.ncce, cce_stop = dci_loc.ncce + (1u << dci_loc.L);
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CONDERROR(dci_loc.L == 0, "The aggregation level %d is not valid\n", dci_loc.L);
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CONDERROR(
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cce_start >= ncce or cce_stop > ncce, "The CCE positions (%u, %u) do not fit in PDCCH\n", cce_start, cce_stop);
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CONDERROR(used_cce.any(cce_start, cce_stop),
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"%s DCI collision between CCE positions (%u, %u)\n",
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ch,
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cce_start,
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cce_stop);
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used_cce.fill(cce_start, cce_stop);
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return SRSLTE_SUCCESS;
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};
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/* TEST: verify there are no dci collisions for UL, DL data, BC, RAR */
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for (uint32_t i = 0; i < sf_out.ul_result.nof_dci_elems; ++i) {
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const auto& pusch = sf_out.ul_result.pusch[i];
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if (not pusch.needs_pdcch) {
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// In case of non-adaptive retx or Msg3
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continue;
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}
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try_cce_fill(pusch.dci.location, "UL");
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_data_elems; ++i) {
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try_cce_fill(sf_out.dl_result.data[i].dci.location, "DL data");
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_bc_elems; ++i) {
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try_cce_fill(sf_out.dl_result.bc[i].dci.location, "DL BC");
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_rar_elems; ++i) {
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try_cce_fill(sf_out.dl_result.rar[i].dci.location, "DL RAR");
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}
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CONDERROR(expected_cce_mask != nullptr and *expected_cce_mask != used_cce,
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"The derived PDCCH mask %s does not match the expected one %s\n",
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used_cce.to_string().c_str(),
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expected_cce_mask->to_string().c_str());
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return SRSLTE_SUCCESS;
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}
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int test_dci_content_common(const sf_output_res_t& sf_out)
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{
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for (uint32_t i = 0; i < sf_out.ul_result.nof_dci_elems; ++i) {
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const auto& pusch = sf_out.ul_result.pusch[i];
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CONDERROR(pusch.tbs == 0, "Allocated PUSCH with invalid TBS=%d\n", pusch.tbs);
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if (not pusch.needs_pdcch) {
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// In case of non-adaptive retx or Msg3
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continue;
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}
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// TODO: extend this test
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_data_elems; ++i) {
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auto& data = sf_out.dl_result.data[i];
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CONDERROR(data.tbs[0] == 0, "Allocated DL data has empty TBS\n");
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_bc_elems; ++i) {
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auto& bc = sf_out.dl_result.bc[i];
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if (bc.type == sched_interface::dl_sched_bc_t::BCCH) {
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CONDERROR(bc.tbs < sf_out.cell_params.cfg.sibs[bc.index].len,
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"Allocated BC process with TBS=%d < sib_len=%d\n",
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bc.tbs,
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sf_out.cell_params.cfg.sibs[bc.index].len);
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} else if (bc.type == sched_interface::dl_sched_bc_t::PCCH) {
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CONDERROR(bc.tbs == 0, "Allocated paging process with invalid TBS=%d\n", bc.tbs);
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} else {
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TESTERROR("Invalid broadcast process id=%d\n", (int)bc.type);
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}
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}
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for (uint32_t i = 0; i < sf_out.dl_result.nof_rar_elems; ++i) {
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const auto& rar = sf_out.dl_result.rar[i];
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CONDERROR(rar.tbs == 0, "Allocated RAR process with invalid TBS=%d\n", rar.tbs);
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}
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return SRSLTE_SUCCESS;
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}
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int test_all_common(const sf_output_res_t& sf_out)
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{
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TESTASSERT(test_pusch_collisions(sf_out, nullptr) == SRSLTE_SUCCESS);
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TESTASSERT(test_pdsch_collisions(sf_out, nullptr) == SRSLTE_SUCCESS);
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TESTASSERT(test_sib_scheduling(sf_out) == SRSLTE_SUCCESS);
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TESTASSERT(test_pdcch_collisions(sf_out, nullptr) == SRSLTE_SUCCESS);
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TESTASSERT(test_dci_content_common(sf_out) == SRSLTE_SUCCESS);
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return SRSLTE_SUCCESS;
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}
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} // namespace srsenb
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@ -0,0 +1,109 @@
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/*
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* Copyright 2013-2020 Software Radio Systems Limited
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*
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* This file is part of srsLTE.
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*
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* srsLTE is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as
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* published by the Free Software Foundation, either version 3 of
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* the License, or (at your option) any later version.
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*
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* srsLTE is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Affero General Public License for more details.
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*
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* A copy of the GNU Affero General Public License can be found in
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* the LICENSE file in the top-level directory of this distribution
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* and at http://www.gnu.org/licenses/.
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*
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*/
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#ifndef SRSLTE_SCHED_COMMON_TEST_SUITE_H
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#define SRSLTE_SCHED_COMMON_TEST_SUITE_H
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#include "srsenb/hdr/stack/mac/scheduler_common.h"
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#include "srslte/common/bounded_bitset.h"
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#include "srslte/common/tti_point.h"
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#include "srslte/interfaces/sched_interface.h"
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namespace srsenb {
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struct sf_output_res_t {
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const sched_cell_params_t& cell_params;
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srslte::tti_point tti_rx;
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const sched_interface::ul_sched_res_t& ul_result;
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const sched_interface::dl_sched_res_t& dl_result;
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srslte::tti_point tti_tx_ul() const { return srslte::to_tx_ul(tti_rx); }
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srslte::tti_point tti_rx_ack_dl() const { return tti_tx_ul(); }
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srslte::tti_point tti_tx_dl() const { return srslte::to_tx_dl(tti_rx); }
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};
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/**
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* verifies correctness of the output of PUSCH allocations for a subframe. Current checks:
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* - individual ul allocs are within (0, n_prb) bounds
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* - individual ul allocs occupy at least one prb
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* - no collisions between individual ul allocs
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* - space is left for PRACH and PUCCH
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* - if expected_ul_mask arg is not null, assert it matches the cumulative mask of all PUSCH allocations
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* @param sf_out result of subframe allocation and associated metadata
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* @param expected_ul_mask optional arg for expected cumulative UL PRB mask
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* @return error code
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*/
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int test_pusch_collisions(const sf_output_res_t& sf_out, const prbmask_t* expected_ul_mask);
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|
||||
/**
|
||||
* verifies correctness of the output of PDSCH allocations for a subframe. Current checks:
|
||||
* - individual DL allocs are within (0, n_prb) bounds
|
||||
* - individual DL allocs occupy at least one RBG
|
||||
* - no collisions between individual DL allocs
|
||||
* - DL data alloc ACKs do not collide with PRACH in UL
|
||||
* - if expected_rbgmask arg is not null, assert it matches the cumulative mask of all PDSCH allocations
|
||||
* @param sf_out result of subframe allocation and associated metadata
|
||||
* @param expected_rbgmask optional arg for expected cumulative DL RBG mask
|
||||
* @return error code
|
||||
*/
|
||||
int test_pdsch_collisions(const sf_output_res_t& sf_out, const rbgmask_t* expected_rbgmask);
|
||||
|
||||
/**
|
||||
* verifies correctness of SIB allocations. Current checks:
|
||||
* - SIB1 is allocated in correct TTIs
|
||||
* - TB size is adequate for SIB allocation
|
||||
* - The SIBs with index>1 are allocated in expected TTI windows
|
||||
* @param sf_out result of subframe allocation and associated metadata
|
||||
* @return error code
|
||||
*/
|
||||
int test_sib_scheduling(const sf_output_res_t& sf_out);
|
||||
|
||||
/**
|
||||
* verifies correctness of PDCCH allocations for DL, RAR, UL, Broadcast. Current checks:
|
||||
* - DCI CCE positions fit in available PDCCH resources
|
||||
* - no collisions between individual DCI CCE positions
|
||||
* @param sf_out
|
||||
* @param used_cce
|
||||
* @return error code
|
||||
*/
|
||||
int test_pdcch_collisions(const sf_output_res_t& sf_out, const srslte::bounded_bitset<128, true>* expected_cce_mask);
|
||||
|
||||
/**
|
||||
* verifies correctness of DCI content for params that are independent of the UE configuration.
|
||||
* - TB size is large enough
|
||||
* @param sf_out
|
||||
* @return error code
|
||||
*/
|
||||
int test_dci_content_common(const sf_output_res_t& sf_out);
|
||||
|
||||
/**
|
||||
* Call all available eNB common tests
|
||||
* @return error code
|
||||
*/
|
||||
int test_all_common(const sf_output_res_t& sf_out);
|
||||
|
||||
/// Helper function to get DL PRBs from DCI
|
||||
int extract_dl_prbmask(const srslte_cell_t& cell,
|
||||
const srslte_dci_dl_t& dci,
|
||||
srslte::bounded_bitset<100, true>& alloc_mask);
|
||||
|
||||
} // namespace srsenb
|
||||
|
||||
#endif // SRSLTE_SCHED_COMMON_TEST_SUITE_H
|
Loading…
Reference in New Issue