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nr,sched: update sched_nr_test to support the new DL sched no-copy api

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master
Francisco 3 years ago committed by Andre Puschmann
parent be388aa53f
commit e4247517d0
10 changed files with 67 additions and 50 deletions
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4
srsenb/hdr/stack/mac/nr/sched_nr.h
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@ -50,8 +50,8 @@ public:
void ul_bsr(uint16_t rnti, uint32_t lcg_id, uint32_t bsr) override;
void dl_buffer_state(uint16_t rnti, uint32_t lcid, uint32_t newtx, uint32_t retx);
int run_slot(slot_point pdsch_tti, uint32_t cc, dl_sched_res_t& result) override;
int get_ul_sched(slot_point pusch_tti, uint32_t cc, ul_sched_t& result) override;
int run_slot(slot_point pdsch_tti, uint32_t cc, dl_res_t& result) override;
int get_ul_sched(slot_point pusch_tti, uint32_t cc, ul_res_t& result) override;
void get_metrics(mac_metrics_t& metrics);

4
srsenb/hdr/stack/mac/nr/sched_nr_cfg.h
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@ -48,8 +48,8 @@ using ue_cc_cfg_t = sched_nr_interface::ue_cc_cfg_t;
using pdcch_cce_pos_list = srsran::bounded_vector<uint32_t, SRSRAN_SEARCH_SPACE_MAX_NOF_CANDIDATES_NR>;
using bwp_cce_pos_list = std::array<std::array<pdcch_cce_pos_list, MAX_NOF_AGGR_LEVELS>, SRSRAN_NOF_SF_X_FRAME>;
using dl_sched_t = sched_nr_interface::dl_sched_t;
using ul_sched_t = sched_nr_interface::ul_sched_t;
using dl_sched_res_t = sched_nr_interface::dl_sched_res_t;
using ul_sched_t = sched_nr_interface::ul_res_t;
using dl_sched_res_t = sched_nr_interface::dl_res_t;
/// Generate list of CCE locations for UE based on coreset and search space configurations
void get_dci_locs(const srsran_coreset_t& coreset,

14
srsenb/hdr/stack/mac/nr/sched_nr_interface.h
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@ -114,13 +114,13 @@ public:
///// Sched Result /////
using dl_sched_t = mac_interface_phy_nr::dl_sched_t;
using ul_sched_t = mac_interface_phy_nr::ul_sched_t;
using ul_res_t = mac_interface_phy_nr::ul_sched_t;
using sched_rar_list_t = srsran::bounded_vector<rar_t, MAX_GRANTS>;
struct dl_sched_res_t {
sched_rar_list_t rar;
dl_sched_t& dl_sched;
dl_sched_res_t(dl_sched_t& dl_sched_) : dl_sched(dl_sched_) {}
struct dl_res_t {
sched_rar_list_t& rar;
dl_sched_t& dl_sched;
dl_res_t(sched_rar_list_t& rar_, dl_sched_t& dl_sched_) : rar(rar_), dl_sched(dl_sched_) {}
};
virtual ~sched_nr_interface() = default;
@ -128,8 +128,8 @@ public:
virtual void ue_cfg(uint16_t rnti, const ue_cfg_t& ue_cfg) = 0;
virtual void ue_rem(uint16_t rnti) = 0;
virtual bool ue_exists(uint16_t rnti) = 0;
virtual int run_slot(slot_point slot_rx, uint32_t cc, dl_sched_res_t& result) = 0;
virtual int get_ul_sched(slot_point slot_rx, uint32_t cc, ul_sched_t& result) = 0;
virtual int run_slot(slot_point slot_rx, uint32_t cc, dl_res_t& result) = 0;
virtual int get_ul_sched(slot_point slot_rx, uint32_t cc, ul_res_t& result) = 0;
virtual void dl_ack_info(uint16_t rnti, uint32_t cc, uint32_t pid, uint32_t tb_idx, bool ack) = 0;
virtual void ul_crc_info(uint16_t rnti, uint32_t cc, uint32_t pid, bool crc) = 0;

13
srsenb/src/stack/mac/nr/mac_nr.cc
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@ -167,9 +167,9 @@ void mac_nr::rach_detected(const rach_info_t& rach_info)
uecfg.carriers[0].cc = 0;
uecfg.ue_bearers[0].direction = mac_lc_ch_cfg_t::BOTH;
srsran::phy_cfg_nr_default_t::reference_cfg_t ref_args{};
ref_args.duplex = cell_config[0].duplex.mode == SRSRAN_DUPLEX_MODE_TDD
? srsran::phy_cfg_nr_default_t::reference_cfg_t::R_DUPLEX_TDD_CUSTOM_6_4
: srsran::phy_cfg_nr_default_t::reference_cfg_t::R_DUPLEX_FDD;
ref_args.duplex = cell_config[0].duplex.mode == SRSRAN_DUPLEX_MODE_TDD
? srsran::phy_cfg_nr_default_t::reference_cfg_t::R_DUPLEX_TDD_CUSTOM_6_4
: srsran::phy_cfg_nr_default_t::reference_cfg_t::R_DUPLEX_FDD;
uecfg.phy_cfg = srsran::phy_cfg_nr_default_t{ref_args};
uecfg.phy_cfg.csi = {}; // disable CSI until RA is complete
@ -295,15 +295,18 @@ int mac_nr::get_dl_sched(const srsran_slot_cfg_t& slot_cfg, dl_sched_t& dl_sched
{
logger.set_context(slot_cfg.idx - TX_ENB_DELAY);
slot_point pdsch_slot = srsran::slot_point{NUMEROLOGY_IDX, slot_cfg.idx};
sched_nr_interface::dl_sched_res_t dl_res(dl_sched);
slot_point pdsch_slot = srsran::slot_point{NUMEROLOGY_IDX, slot_cfg.idx};
// Run Scheduler
sched_nr_interface::sched_rar_list_t rar_list;
sched_nr_interface::dl_res_t dl_res(rar_list, dl_sched);
int ret = sched.run_slot(pdsch_slot, 0, dl_res);
if (ret != SRSRAN_SUCCESS) {
return ret;
}
// Generate MAC DL PDUs
uint32_t rar_count = 0;
srsran::rwlock_read_guard rw_lock(rwmutex);
for (pdsch_t& pdsch : dl_sched.pdsch) {

6
srsenb/src/stack/mac/nr/sched_nr.cc
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@ -131,10 +131,10 @@ void sched_nr::ue_cfg_impl(uint16_t rnti, const ue_cfg_t& uecfg)
}
/// Generate {pdcch_slot,cc} scheduling decision
int sched_nr::run_slot(slot_point slot_dl, uint32_t cc, dl_sched_res_t& result)
int sched_nr::run_slot(slot_point slot_dl, uint32_t cc, dl_res_t& result)
{
// Copy UL results to intermediate buffer
ul_sched_t& ul_res = pending_results->add_ul_result(slot_dl, cc);
ul_res_t& ul_res = pending_results->add_ul_result(slot_dl, cc);
// Generate {slot_idx,cc} result
sched_workers->run_slot(slot_dl, cc, result, ul_res);
@ -143,7 +143,7 @@ int sched_nr::run_slot(slot_point slot_dl, uint32_t cc, dl_sched_res_t& result)
}
/// Fetch {ul_slot,cc} UL scheduling decision
int sched_nr::get_ul_sched(slot_point slot_ul, uint32_t cc, ul_sched_t& result)
int sched_nr::get_ul_sched(slot_point slot_ul, uint32_t cc, ul_res_t& result)
{
if (not pending_results->has_ul_result(slot_ul, cc)) {
// sched result hasn't been generated

2
srsenb/src/stack/mac/nr/sched_nr_cell.cc
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@ -133,7 +133,7 @@ void ra_sched::run_slot(bwp_slot_allocator& slot_alloc)
if (pdcch_slot >= rar.rar_win.stop()) {
fmt::memory_buffer str_buffer;
fmt::format_to(str_buffer,
"SCHED: Could not transmit RAR within the window Window={}, PRACH={}, RAR={}",
"SCHED: Could not transmit RAR within the window={}, PRACH={}, RAR={}",
rar.rar_win,
rar.prach_slot,
pdcch_slot);

25
srsenb/test/mac/nr/sched_nr_sim_ue.cc
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@ -42,8 +42,8 @@ int sched_nr_ue_sim::update(const sched_nr_cc_result_view& cc_out)
{
update_dl_harqs(cc_out);
for (uint32_t i = 0; i < cc_out.dl_cc_result->dl_sched.pdcch_dl.size(); ++i) {
const auto& data = cc_out.dl_cc_result->dl_sched.pdcch_dl[i];
for (uint32_t i = 0; i < cc_out.dl_cc_result.dl_sched.pdcch_dl.size(); ++i) {
const auto& data = cc_out.dl_cc_result.dl_sched.pdcch_dl[i];
if (data.dci.ctx.rnti != ctxt.rnti) {
continue;
}
@ -64,8 +64,8 @@ int sched_nr_ue_sim::update(const sched_nr_cc_result_view& cc_out)
void sched_nr_ue_sim::update_dl_harqs(const sched_nr_cc_result_view& cc_out)
{
uint32_t cc = cc_out.cc;
for (uint32_t i = 0; i < cc_out.dl_cc_result->dl_sched.pdcch_dl.size(); ++i) {
const auto& data = cc_out.dl_cc_result->dl_sched.pdcch_dl[i];
for (uint32_t i = 0; i < cc_out.dl_cc_result.dl_sched.pdcch_dl.size(); ++i) {
const auto& data = cc_out.dl_cc_result.dl_sched.pdcch_dl[i];
if (data.dci.ctx.rnti != ctxt.rnti) {
continue;
}
@ -207,7 +207,9 @@ void sched_nr_base_tester::run_slot(slot_point slot_tx)
void sched_nr_base_tester::generate_cc_result(uint32_t cc)
{
// Run scheduler
sched_ptr->run_slot(current_slot_tx, cc, cc_results[cc].dl_res);
sched_nr_interface::dl_res_t dl_sched(cc_results[cc].rar, cc_results[cc].dl_res);
sched_ptr->run_slot(current_slot_tx, cc, dl_sched);
cc_results[cc].rar = dl_sched.rar;
sched_ptr->get_ul_sched(current_slot_tx, cc, cc_results[cc].ul_res);
auto tp2 = std::chrono::steady_clock::now();
cc_results[cc].cc_latency_ns = std::chrono::duration_cast<std::chrono::nanoseconds>(tp2 - slot_start_tp);
@ -229,17 +231,14 @@ void sched_nr_base_tester::process_results()
// Derived class-defined tests
process_slot_result(slot_ctxt, cc_results);
sched_nr_cc_result_view cc_out;
cc_out.slot = current_slot_tx;
for (uint32_t cc = 0; cc < cell_params.size(); ++cc) {
cc_out.cc = cc;
cc_out.dl_cc_result = &cc_results[cc].dl_res;
cc_out.ul_cc_result = &cc_results[cc].ul_res;
sched_nr_cc_result_view cc_out{
current_slot_tx, cc, cc_results[cc].rar, cc_results[cc].dl_res, cc_results[cc].ul_res};
// Run common tests
test_dl_pdcch_consistency(cc_out.dl_cc_result->dl_sched.pdcch_dl);
test_pdsch_consistency(cc_out.dl_cc_result->dl_sched.pdsch);
test_ssb_scheduled_grant(cc_out.slot, cell_params[cc_out.cc].cfg, cc_out.dl_cc_result->dl_sched.ssb);
test_dl_pdcch_consistency(cc_out.dl_cc_result.dl_sched.pdcch_dl);
test_pdsch_consistency(cc_out.dl_cc_result.dl_sched.pdsch);
test_ssb_scheduled_grant(cc_out.slot, cell_params[cc_out.cc].cfg, cc_out.dl_cc_result.dl_sched.ssb);
// Run UE-dedicated tests
test_dl_sched_result(slot_ctxt, cc_out);

27
srsenb/test/mac/nr/sched_nr_sim_ue.h
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@ -39,10 +39,18 @@ struct ue_nr_harq_ctxt_t {
slot_point last_slot_tx, first_slot_tx, last_slot_ack;
};
struct sched_nr_cc_result_view {
slot_point slot;
uint32_t cc;
const sched_nr_interface::dl_sched_res_t* dl_cc_result;
const sched_nr_interface::ul_sched_t* ul_cc_result;
slot_point slot;
uint32_t cc;
const sched_nr_interface::dl_res_t dl_cc_result;
const sched_nr_interface::ul_res_t* ul_cc_result;
sched_nr_cc_result_view(slot_point slot_,
uint32_t cc_,
sched_nr_interface::sched_rar_list_t& rar,
sched_nr_interface::dl_sched_t& dl_res,
sched_nr_interface::ul_res_t& ul_res) :
slot(slot_), cc(cc_), dl_cc_result(rar, dl_res), ul_cc_result(&ul_res)
{}
};
struct ue_nr_cc_ctxt_t {
@ -108,11 +116,12 @@ class sched_nr_base_tester
{
public:
struct cc_result_t {
slot_point slot_tx;
uint32_t cc;
sched_nr_interface::dl_sched_res_t dl_res;
sched_nr_interface::ul_sched_t ul_res;
std::chrono::nanoseconds cc_latency_ns;
slot_point slot_tx;
uint32_t cc;
sched_nr_interface::dl_sched_t dl_res;
sched_nr_interface::sched_rar_list_t rar;
sched_nr_interface::ul_res_t ul_res;
std::chrono::nanoseconds cc_latency_ns;
};
sched_nr_base_tester(const sched_nr_interface::sched_args_t& sched_args,

20
srsenb/test/mac/nr/sched_nr_test.cc
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@ -36,12 +36,17 @@ public:
})->cc_latency_ns.count();
for (auto& cc_out : cc_list) {
pdsch_count += cc_out.dl_res.dl_sched.pdcch_dl.size();
pdsch_count += cc_out.dl_res.pdcch_dl.size();
cc_res_count++;
TESTASSERT(cc_out.dl_res.dl_sched.pdcch_dl.size() <= 1);
if (srsran_duplex_nr_is_dl(&cell_params[cc_out.cc].cfg.duplex, 0, current_slot_tx.slot_idx())) {
TESTASSERT(cc_out.dl_res.dl_sched.pdcch_dl.size() == 1 or not cc_out.dl_res.dl_sched.ssb.empty());
bool is_dl_slot = srsran_duplex_nr_is_dl(&cell_params[cc_out.cc].cfg.duplex, 0, current_slot_tx.slot_idx());
if (is_dl_slot) {
if (cc_out.dl_res.ssb.empty()) {
TESTASSERT(slot_ctxt.ue_db.empty() or cc_out.dl_res.pdcch_dl.size() == 1);
} else {
TESTASSERT(cc_out.dl_res.pdcch_dl.size() == 0);
}
}
}
}
@ -76,12 +81,13 @@ void run_sched_nr_test(uint32_t nof_workers)
}
sched_nr_tester tester(cfg, cells_cfg, test_name, nof_workers);
sched_nr_interface::ue_cfg_t uecfg = get_default_ue_cfg(nof_sectors);
tester.add_user(rnti, uecfg, slot_point{0, 0}, 0);
for (uint32_t nof_slots = 0; nof_slots < max_nof_ttis; ++nof_slots) {
slot_point slot_rx(0, nof_slots % 10240);
slot_point slot_tx = slot_rx + TX_ENB_DELAY;
if (slot_rx.to_uint() == 9) {
sched_nr_interface::ue_cfg_t uecfg = get_default_ue_cfg(nof_sectors);
tester.add_user(rnti, uecfg, slot_rx, 0);
}
tester.run_slot(slot_tx);
}

2
srsenb/test/mac/nr/sched_nr_ue_ded_test_suite.cc
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@ -21,7 +21,7 @@ using namespace srsenb::sched_nr_impl;
void test_dl_sched_result(const sim_nr_enb_ctxt_t& enb_ctxt, const sched_nr_cc_result_view& cc_out)
{
slot_point pdcch_slot = cc_out.slot;
const pdcch_dl_list_t& pdcchs = cc_out.dl_cc_result->dl_sched.pdcch_dl;
const pdcch_dl_list_t& pdcchs = cc_out.dl_cc_result.dl_sched.pdcch_dl;
// Iterate over UE PDCCH allocations
for (const pdcch_dl_t& pdcch : pdcchs) {

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