Added 20MHz default configuration

master
Xavier Arteaga 3 years ago committed by Xavier Arteaga
parent ea802c23f2
commit dfa323df6b

@ -30,7 +30,17 @@ public:
* - SSB: 5ms
*/
R_CARRIER_CUSTOM_10MHZ = 0,
} carrier = R_CARRIER_CUSTOM_10MHZ;
/**
* @brief Carrier reference configuration for 10MHz serving cell bandwidth
* - BW: 20 MHZ (106 PRB)
* - PCI: 500
* - SCS: 15 kHz
* - SSB: 5ms
*/
R_CARRIER_CUSTOM_20MHZ,
R_CARRIER_COUNT
} carrier = R_CARRIER_CUSTOM_10MHZ;
const std::vector<std::string> R_CARRIER_STRING = {"10MHz", "20MHz", "Invalid"};
enum {
/**
@ -60,7 +70,7 @@ public:
/**
* @brief PDSCH parameters described in TS 38.101-4 Table 5.2.2.2.1-2 for the test described in table 5.2.2.2.1-3
*/
R_PDSCH_2_1_1_TDD,
R_PDSCH_TS38101_5_2_1,
/**
* @brief Invalid PDSCH reference channel
@ -68,7 +78,7 @@ public:
R_PDSCH_COUNT
} pdsch = R_PDSCH_DEFAULT;
const std::vector<std::string> R_PDSCH_STRING = {"default", "R.PDSCH.2-1.1 TDD", "Invalid"};
const std::vector<std::string> R_PDSCH_STRING = {"default", "ts38101/5.2-1", "Invalid"};
enum {
/**
@ -122,6 +132,7 @@ private:
* Carrier make helper methods
*/
static void make_carrier_custom_10MHz(srsran_carrier_nr_t& carrier);
static void make_carrier_custom_20MHz(srsran_carrier_nr_t& carrier);
/**
* TDD make helper methods

@ -37,7 +37,14 @@ phy_cfg_nr_default_t::reference_cfg_t::reference_cfg_t(const std::string& args)
srsran_terminate("Invalid reference argument '%s'", e.c_str());
}
if (param.front() == "pdsch") {
if (param.front() == "carrier") {
for (carrier = R_CARRIER_CUSTOM_10MHZ; carrier < R_CARRIER_COUNT; carrier = inc(carrier)) {
if (R_CARRIER_STRING[carrier] == param.back()) {
break;
}
}
srsran_assert(carrier != R_CARRIER_COUNT, "Invalid carrier reference configuration '%s'", param.back().c_str());
} else if (param.front() == "pdsch") {
for (pdsch = R_PDSCH_DEFAULT; pdsch < R_PDSCH_COUNT; pdsch = inc(pdsch)) {
if (R_PDSCH_STRING[pdsch] == param.back()) {
break;
@ -61,6 +68,17 @@ void phy_cfg_nr_default_t::make_carrier_custom_10MHz(srsran_carrier_nr_t& carrie
carrier.scs = srsran_subcarrier_spacing_15kHz;
}
void phy_cfg_nr_default_t::make_carrier_custom_20MHz(srsran_carrier_nr_t& carrier)
{
carrier.nof_prb = 106;
carrier.max_mimo_layers = 1;
carrier.pci = 500;
carrier.absolute_frequency_point_a = 633928;
carrier.absolute_frequency_ssb = 634176;
carrier.offset_to_carrier = 0;
carrier.scs = srsran_subcarrier_spacing_15kHz;
}
void phy_cfg_nr_default_t::make_tdd_custom_6_4(srsran_tdd_config_nr_t& tdd)
{
tdd.pattern1.period_ms = 10;
@ -315,7 +333,7 @@ void phy_cfg_nr_default_t::make_harq_auto(srsran_harq_ack_cfg_hl_t& harq,
void phy_cfg_nr_default_t::make_prach_default_lte(srsran_prach_cfg_t& prach)
{
prach.config_idx = 0;
prach.freq_offset = 2;
prach.freq_offset = 4;
prach.root_seq_idx = 0;
prach.is_nr = true;
}
@ -326,6 +344,11 @@ phy_cfg_nr_default_t::phy_cfg_nr_default_t(const reference_cfg_t& reference_cfg)
case reference_cfg_t::R_CARRIER_CUSTOM_10MHZ:
make_carrier_custom_10MHz(carrier);
break;
case reference_cfg_t::R_CARRIER_CUSTOM_20MHZ:
make_carrier_custom_20MHz(carrier);
break;
case reference_cfg_t::R_CARRIER_COUNT:
srsran_terminate("Invalid carrier reference");
}
switch (reference_cfg.tdd) {
@ -344,7 +367,7 @@ phy_cfg_nr_default_t::phy_cfg_nr_default_t(const reference_cfg_t& reference_cfg)
case reference_cfg_t::R_PDSCH_DEFAULT:
make_pdsch_default(pdsch);
break;
case reference_cfg_t::R_PDSCH_2_1_1_TDD:
case reference_cfg_t::R_PDSCH_TS38101_5_2_1:
make_pdsch_2_1_1_tdd(carrier, pdsch);
break;
case reference_cfg_t::R_PDSCH_COUNT:

@ -9,6 +9,7 @@
if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB)
set(NR_PHY_TEST_GNB_NOF_THREADS 1)
set(NR_PHY_TEST_UE_NOF_THREADS 1)
set(NR_PHY_TEST_BW 10MHz)
add_executable(nr_phy_test nr_phy_test.cc)
target_link_libraries(nr_phy_test
@ -24,32 +25,31 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB)
${Boost_LIBRARIES}
${ATOMIC_LIBS})
add_nr_test(nr_phy_test_10MHz_dl_default nr_phy_test
add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_dl_default nr_phy_test
--reference=carrier=${NR_PHY_TEST_BW}
--duration=100
--gnb.stack.pdsch.slots=\"0,1,2,3,4,5\"
--gnb.stack.pdsch.start=0 # Start at RB 0
--gnb.stack.pdsch.length=52 # Full 10 MHz BW
--gnb.stack.pdsch.mcs=28 # Maximum MCS
--gnb.stack.pdsch.slots=0,1,2,3,4,5
--gnb.stack.pusch.slots=none
--gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS}
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_R.PDSCH.2-1.1_TDD nr_phy_test
"--reference=pdsch=R.PDSCH.2-1.1 TDD"
add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_ts38101/5.2-1 nr_phy_test
--reference=carrier=${NR_PHY_TEST_BW},pdsch=ts38101/5.2-1
--duration=100
--gnb.stack.pdsch.mcs=27
--gnb.stack.pdsch.start=0
--gnb.stack.pdsch.length=52
--gnb.stack.pdsch.slots=\"0,1,2,3,4,5\"
--gnb.stack.pusch.slots=\"\"
--gnb.stack.pdsch.slots=0,1,2,3,4,5
--gnb.stack.pusch.slots=none
--gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS}
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_ul_only nr_phy_test
add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_ul_only nr_phy_test
--reference=carrier=${NR_PHY_TEST_BW}
--duration=100 # 100 slots
--gnb.stack.pdsch.slots=none
--gnb.stack.pdsch.slots=6 # No PDSCH
--gnb.stack.pusch.slots=6,7,8,9 # All possible UL slots
--gnb.stack.pusch.start=0 # Start at RB 0
--gnb.stack.pusch.length=52 # Full 10 MHz BW
@ -58,7 +58,8 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB)
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_bidir nr_phy_test
add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_bidir nr_phy_test
--reference=carrier=${NR_PHY_TEST_BW}
--duration=100 # 100 slots
--gnb.stack.pdsch.slots=0,1,2,3,4,5 # All possible DL slots
--gnb.stack.pdsch.start=0 # Start at RB 0
@ -87,7 +88,8 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB)
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_prach nr_phy_test
add_nr_test(nr_phy_test_${NR_PHY_TEST_BW}_prach nr_phy_test
--reference=carrier=${NR_PHY_TEST_BW}
--duration=1000 # 100 slots
--gnb.stack.pdsch.slots=none # No PDSCH
--gnb.stack.pusch.slots=none # No PUSCH
@ -96,25 +98,4 @@ if (RF_FOUND AND ENABLE_SRSUE AND ENABLE_SRSENB)
--ue.stack.prach.preamble=10 # Use preamble 10
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_sr nr_phy_test
--duration=1000 # 100 slots
--gnb.stack.pdsch.slots=none # No PDSCH
--gnb.stack.pusch.slots=none # No PUSCH
--gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS}
--ue.stack.sr.period=1 # Transmit SR every candidate
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
add_nr_test(nr_phy_test_10MHz_dl_sr nr_phy_test
--duration=100
--gnb.stack.pdsch.slots=\"0,1,2,3,4,5\"
--gnb.stack.pdsch.start=0 # Start at RB 0
--gnb.stack.pdsch.length=2 # Full 10 MHz BW
--gnb.stack.pdsch.mcs=1 # Minimum MCS
--gnb.stack.pusch.slots=none
--gnb.phy.nof_threads=${NR_PHY_TEST_GNB_NOF_THREADS}
--ue.stack.sr.period=1 # Transmit SR every candidate
--ue.phy.nof_threads=${NR_PHY_TEST_UE_NOF_THREADS}
)
endif ()

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